fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r423-tajo-167905976600354
Last Updated
May 14, 2023

About the Execution of LoLa+red for SieveSingleMsgMbox-PT-d0m04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
270.775 8669.00 18888.00 85.90 TFTTTFFTTTFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r423-tajo-167905976600354.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SieveSingleMsgMbox-PT-d0m04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-tajo-167905976600354
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 480K
-rw-r--r-- 1 mcc users 6.4K Feb 26 10:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 26 10:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 10:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 10:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:05 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:05 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:05 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:05 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 26 10:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K Feb 26 10:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.8K Feb 26 10:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Feb 26 10:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:05 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:05 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 57K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m04-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679246585217

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d0m04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 17:23:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 17:23:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 17:23:07] [INFO ] Load time of PNML (sax parser for PT used): 39 ms
[2023-03-19 17:23:07] [INFO ] Transformed 262 places.
[2023-03-19 17:23:07] [INFO ] Transformed 73 transitions.
[2023-03-19 17:23:07] [INFO ] Parsed PT model containing 262 places and 73 transitions and 292 arcs in 99 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Deduced a syphon composed of 190 places in 2 ms
Reduce places removed 190 places and 0 transitions.
Support contains 55 out of 72 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 72/72 places, 73/73 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 70 transition count 73
Applied a total of 2 rules in 12 ms. Remains 70 /72 variables (removed 2) and now considering 73/73 (removed 0) transitions.
// Phase 1: matrix 73 rows 70 cols
[2023-03-19 17:23:07] [INFO ] Computed 5 place invariants in 10 ms
[2023-03-19 17:23:07] [INFO ] Implicit Places using invariants in 176 ms returned []
[2023-03-19 17:23:07] [INFO ] Invariant cache hit.
[2023-03-19 17:23:07] [INFO ] State equation strengthened by 31 read => feed constraints.
[2023-03-19 17:23:07] [INFO ] Implicit Places using invariants and state equation in 96 ms returned []
Implicit Place search using SMT with State Equation took 298 ms to find 0 implicit places.
[2023-03-19 17:23:07] [INFO ] Invariant cache hit.
[2023-03-19 17:23:07] [INFO ] Dead Transitions using invariants and state equation in 54 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 70/72 places, 73/73 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 365 ms. Remains : 70/72 places, 73/73 transitions.
Support contains 55 out of 70 places after structural reductions.
[2023-03-19 17:23:07] [INFO ] Flatten gal took : 23 ms
[2023-03-19 17:23:07] [INFO ] Flatten gal took : 9 ms
[2023-03-19 17:23:08] [INFO ] Input system was already deterministic with 73 transitions.
Incomplete random walk after 10000 steps, including 2209 resets, run finished after 578 ms. (steps per millisecond=17 ) properties (out of 56) seen :18
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1001 steps, including 106 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1000 steps, including 48 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1000 steps, including 200 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 38) seen :0
Incomplete Best-First random walk after 1001 steps, including 102 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 38) seen :3
Incomplete Best-First random walk after 1000 steps, including 200 resets, run finished after 33 ms. (steps per millisecond=30 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 44 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1000 steps, including 92 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1000 steps, including 105 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 78 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1000 steps, including 42 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1000 steps, including 118 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1000 steps, including 110 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 63 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 45 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 35) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 35) seen :3
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 97 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1000 steps, including 43 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 103 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 96 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1000 steps, including 104 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 104 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1000 steps, including 112 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 55 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 32) seen :0
Incomplete Best-First random walk after 1001 steps, including 41 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 32) seen :0
Running SMT prover for 32 properties.
[2023-03-19 17:23:09] [INFO ] Invariant cache hit.
[2023-03-19 17:23:09] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:23:09] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 5 ms returned sat
[2023-03-19 17:23:09] [INFO ] After 794ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0 real:25
[2023-03-19 17:23:10] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-19 17:23:10] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-19 17:23:10] [INFO ] After 169ms SMT Verify possible using state equation in natural domain returned unsat :13 sat :19
[2023-03-19 17:23:10] [INFO ] State equation strengthened by 31 read => feed constraints.
[2023-03-19 17:23:10] [INFO ] After 157ms SMT Verify possible using 31 Read/Feed constraints in natural domain returned unsat :13 sat :19
[2023-03-19 17:23:10] [INFO ] After 337ms SMT Verify possible using trap constraints in natural domain returned unsat :13 sat :19
Attempting to minimize the solution found.
Minimization took 151 ms.
[2023-03-19 17:23:10] [INFO ] After 787ms SMT Verify possible using all constraints in natural domain returned unsat :13 sat :19
Fused 32 Parikh solutions to 18 different solutions.
Parikh walk visited 0 properties in 47 ms.
Support contains 21 out of 70 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 70/70 places, 73/73 transitions.
Graph (complete) has 187 edges and 70 vertex of which 69 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.0 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 3 place count 69 transition count 71
Discarding 4 places :
Symmetric choice reduction at 1 with 4 rule applications. Total rules 7 place count 65 transition count 67
Iterating global reduction 1 with 4 rules applied. Total rules applied 11 place count 65 transition count 67
Applied a total of 11 rules in 12 ms. Remains 65 /70 variables (removed 5) and now considering 67/73 (removed 6) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12 ms. Remains : 65/70 places, 67/73 transitions.
Incomplete random walk after 10000 steps, including 2239 resets, run finished after 246 ms. (steps per millisecond=40 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 54 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 116 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1000 steps, including 58 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 56 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 103 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 39 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 18) seen :6
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1000 steps, including 106 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1000 steps, including 96 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1000 steps, including 54 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
// Phase 1: matrix 67 rows 65 cols
[2023-03-19 17:23:11] [INFO ] Computed 4 place invariants in 2 ms
[2023-03-19 17:23:11] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 17:23:11] [INFO ] [Real]Absence check using 3 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-19 17:23:11] [INFO ] After 98ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:12
[2023-03-19 17:23:11] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 17:23:11] [INFO ] [Nat]Absence check using 3 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-19 17:23:11] [INFO ] After 105ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :12
[2023-03-19 17:23:11] [INFO ] State equation strengthened by 28 read => feed constraints.
[2023-03-19 17:23:11] [INFO ] After 101ms SMT Verify possible using 28 Read/Feed constraints in natural domain returned unsat :0 sat :12
[2023-03-19 17:23:11] [INFO ] After 211ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :12
Attempting to minimize the solution found.
Minimization took 76 ms.
[2023-03-19 17:23:11] [INFO ] After 449ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :12
Parikh walk visited 0 properties in 99 ms.
Support contains 13 out of 65 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 65/65 places, 67/67 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 64 transition count 66
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 64 transition count 66
Applied a total of 2 rules in 14 ms. Remains 64 /65 variables (removed 1) and now considering 66/67 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 14 ms. Remains : 64/65 places, 66/67 transitions.
Incomplete random walk after 10000 steps, including 2216 resets, run finished after 275 ms. (steps per millisecond=36 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 455 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 480 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 494 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 490 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 462 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 481 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 498 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 482 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 471 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 1038 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 1023 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 464 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 12) seen :0
Probably explored full state space saw : 702 states, properties seen :7
Probabilistic random walk after 1686 steps, saw 702 distinct states, run finished after 38 ms. (steps per millisecond=44 ) properties seen :7
Explored full state space saw : 702 states, properties seen :0
Exhaustive walk after 1686 steps, saw 702 distinct states, run finished after 16 ms. (steps per millisecond=105 ) properties seen :0
Successfully simplified 18 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:23:13] [INFO ] Initial state reduction rules for CTL removed 6 formulas.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 8 ms
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 5 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 73 transitions.
Support contains 28 out of 70 places (down from 38) after GAL structural reductions.
FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 10 stabilizing places and 13 stable transitions
Graph (complete) has 213 edges and 70 vertex of which 69 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Applied a total of 16 rules in 4 ms. Remains 62 /70 variables (removed 8) and now considering 65/73 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 62/70 places, 65/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 7 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 12 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 61 transition count 64
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 59 transition count 62
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 59 transition count 62
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 23 place count 59 transition count 61
Applied a total of 23 rules in 7 ms. Remains 59 /70 variables (removed 11) and now considering 61/73 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 59/70 places, 61/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 64 transition count 67
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 64 transition count 67
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 63 transition count 66
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 63 transition count 66
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 62 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 62 transition count 65
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 17 place count 62 transition count 64
Applied a total of 17 rules in 6 ms. Remains 62 /70 variables (removed 8) and now considering 64/73 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 62/70 places, 64/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 17 place count 61 transition count 64
Iterating global reduction 0 with 1 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 21 place count 60 transition count 62
Applied a total of 21 rules in 11 ms. Remains 60 /70 variables (removed 10) and now considering 62/73 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 60/70 places, 62/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 62 transition count 65
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 62 transition count 65
Applied a total of 16 rules in 2 ms. Remains 62 /70 variables (removed 8) and now considering 65/73 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 62/70 places, 65/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 70/70 places, 73/73 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 61 transition count 64
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 61 transition count 64
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 19 place count 60 transition count 63
Iterating global reduction 0 with 1 rules applied. Total rules applied 20 place count 60 transition count 63
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 21 place count 59 transition count 62
Iterating global reduction 0 with 1 rules applied. Total rules applied 22 place count 59 transition count 62
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 23 place count 59 transition count 61
Applied a total of 23 rules in 4 ms. Remains 59 /70 variables (removed 11) and now considering 61/73 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 59/70 places, 61/73 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 2 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 3 ms
[2023-03-19 17:23:13] [INFO ] Input system was already deterministic with 61 transitions.
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Flatten gal took : 4 ms
[2023-03-19 17:23:13] [INFO ] Export to MCC of 7 properties in file /home/mcc/execution/CTLFireability.sr.xml took 1 ms.
[2023-03-19 17:23:13] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 70 places, 73 transitions and 289 arcs took 0 ms.
Total runtime 6317 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SieveSingleMsgMbox-PT-d0m04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SieveSingleMsgMbox-PT-d0m04-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679246593886

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d0m04-CTLFireability-01
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-01
lola: result : false
lola: markings : 12
lola: fired transitions : 45
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m04-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-06
lola: result : false
lola: markings : 12
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 18 SieveSingleMsgMbox-PT-d0m04-CTLFireability-15
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 25 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-15
lola: result : true
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 SieveSingleMsgMbox-PT-d0m04-CTLFireability-14
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-14
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 SieveSingleMsgMbox-PT-d0m04-CTLFireability-11
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-11
lola: result : false
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 SieveSingleMsgMbox-PT-d0m04-CTLFireability-09
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-09
lola: result : true
lola: markings : 12
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 SieveSingleMsgMbox-PT-d0m04-CTLFireability-13
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SieveSingleMsgMbox-PT-d0m04-CTLFireability-13
lola: result : false
lola: markings : 12
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SieveSingleMsgMbox-PT-d0m04-CTLFireability-01: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-06: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-09: CTL true CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-11: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-13: AFAG false CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-14: CTL false CTL model checker
SieveSingleMsgMbox-PT-d0m04-CTLFireability-15: CONJ false state space /EXEF


Time elapsed: 0 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SieveSingleMsgMbox-PT-d0m04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-tajo-167905976600354"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m04.tgz
mv SieveSingleMsgMbox-PT-d0m04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;