fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r391-oct2-167903715400570
Last Updated
May 14, 2023

About the Execution of LoLa+red for ShieldPPPt-PT-003B

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2254.852 144064.00 151524.00 22.40 FF?FT?TFFT?TFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715400570.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldPPPt-PT-003B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715400570
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 4.9K Feb 25 21:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 44K Feb 25 21:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 21:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 21:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 21:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 21:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 25 21:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 56K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-00
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-01
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-02
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-03
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-04
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-05
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-06
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-07
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-08
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-09
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-10
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-11
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-12
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-13
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-14
FORMULA_NAME ShieldPPPt-PT-003B-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679278518968

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldPPPt-PT-003B
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 02:15:21] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 02:15:21] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 02:15:21] [INFO ] Load time of PNML (sax parser for PT used): 66 ms
[2023-03-20 02:15:21] [INFO ] Transformed 237 places.
[2023-03-20 02:15:21] [INFO ] Transformed 216 transitions.
[2023-03-20 02:15:21] [INFO ] Found NUPN structural information;
[2023-03-20 02:15:21] [INFO ] Parsed PT model containing 237 places and 216 transitions and 540 arcs in 195 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 18 ms.
Support contains 91 out of 237 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 237/237 places, 216/216 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 225 transition count 204
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 225 transition count 204
Applied a total of 24 rules in 28 ms. Remains 225 /237 variables (removed 12) and now considering 204/216 (removed 12) transitions.
// Phase 1: matrix 204 rows 225 cols
[2023-03-20 02:15:21] [INFO ] Computed 34 place invariants in 18 ms
[2023-03-20 02:15:22] [INFO ] Implicit Places using invariants in 504 ms returned []
[2023-03-20 02:15:22] [INFO ] Invariant cache hit.
[2023-03-20 02:15:22] [INFO ] Implicit Places using invariants and state equation in 317 ms returned []
Implicit Place search using SMT with State Equation took 847 ms to find 0 implicit places.
[2023-03-20 02:15:22] [INFO ] Invariant cache hit.
[2023-03-20 02:15:22] [INFO ] Dead Transitions using invariants and state equation in 181 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 225/237 places, 204/216 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1056 ms. Remains : 225/237 places, 204/216 transitions.
Support contains 91 out of 225 places after structural reductions.
[2023-03-20 02:15:22] [INFO ] Flatten gal took : 36 ms
[2023-03-20 02:15:22] [INFO ] Flatten gal took : 15 ms
[2023-03-20 02:15:22] [INFO ] Input system was already deterministic with 204 transitions.
Support contains 90 out of 225 places (down from 91) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 265 ms. (steps per millisecond=37 ) properties (out of 70) seen :69
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-20 02:15:23] [INFO ] Invariant cache hit.
[2023-03-20 02:15:23] [INFO ] After 54ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 02:15:23] [INFO ] [Nat]Absence check using 34 positive place invariants in 12 ms returned sat
[2023-03-20 02:15:23] [INFO ] After 82ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 19 places in 87 ms of which 6 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 19 places in 59 ms of which 1 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 18 places in 42 ms of which 0 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 12 places in 47 ms of which 1 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 13 places in 35 ms of which 0 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 19 places in 34 ms of which 1 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 17 places in 34 ms of which 1 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 18 places in 56 ms of which 1 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Deduced a trap composed of 21 places in 26 ms of which 0 ms to minimize.
[2023-03-20 02:15:23] [INFO ] Trap strengthening (SAT) tested/added 10/9 trap constraints in 519 ms
[2023-03-20 02:15:23] [INFO ] After 612ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-20 02:15:23] [INFO ] After 693ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 225/225 places, 204/204 transitions.
Drop transitions removed 51 transitions
Trivial Post-agglo rules discarded 51 transitions
Performed 51 trivial Post agglomeration. Transition count delta: 51
Iterating post reduction 0 with 51 rules applied. Total rules applied 51 place count 225 transition count 153
Reduce places removed 51 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 53 rules applied. Total rules applied 104 place count 174 transition count 151
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 2 rules applied. Total rules applied 106 place count 173 transition count 150
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 107 place count 172 transition count 150
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 15 Pre rules applied. Total rules applied 107 place count 172 transition count 135
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 4 with 30 rules applied. Total rules applied 137 place count 157 transition count 135
Discarding 13 places :
Symmetric choice reduction at 4 with 13 rule applications. Total rules 150 place count 144 transition count 122
Iterating global reduction 4 with 13 rules applied. Total rules applied 163 place count 144 transition count 122
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 7 Pre rules applied. Total rules applied 163 place count 144 transition count 115
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 4 with 14 rules applied. Total rules applied 177 place count 137 transition count 115
Performed 50 Post agglomeration using F-continuation condition.Transition count delta: 50
Deduced a syphon composed of 50 places in 0 ms
Reduce places removed 50 places and 0 transitions.
Iterating global reduction 4 with 100 rules applied. Total rules applied 277 place count 87 transition count 65
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 4 with 16 rules applied. Total rules applied 293 place count 79 transition count 65
Partial Free-agglomeration rule applied 8 times.
Drop transitions removed 8 transitions
Iterating global reduction 4 with 8 rules applied. Total rules applied 301 place count 79 transition count 65
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 302 place count 78 transition count 64
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 303 place count 77 transition count 64
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 2 Pre rules applied. Total rules applied 303 place count 77 transition count 62
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 307 place count 75 transition count 62
Applied a total of 307 rules in 44 ms. Remains 75 /225 variables (removed 150) and now considering 62/204 (removed 142) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 44 ms. Remains : 75/225 places, 62/204 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=1000 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1699609 steps, run timeout after 3001 ms. (steps per millisecond=566 ) properties seen :{}
Probabilistic random walk after 1699609 steps, saw 1022317 distinct states, run finished after 3009 ms. (steps per millisecond=564 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 62 rows 75 cols
[2023-03-20 02:15:26] [INFO ] Computed 33 place invariants in 1 ms
[2023-03-20 02:15:27] [INFO ] After 37ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 02:15:27] [INFO ] [Nat]Absence check using 33 positive place invariants in 6 ms returned sat
[2023-03-20 02:15:27] [INFO ] After 38ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:27] [INFO ] State equation strengthened by 4 read => feed constraints.
[2023-03-20 02:15:27] [INFO ] After 4ms SMT Verify possible using 4 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:27] [INFO ] After 10ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-20 02:15:27] [INFO ] After 111ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 75 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 75/75 places, 62/62 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2 ms. Remains : 75/75 places, 62/62 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 75/75 places, 62/62 transitions.
Applied a total of 0 rules in 2 ms. Remains 75 /75 variables (removed 0) and now considering 62/62 (removed 0) transitions.
[2023-03-20 02:15:27] [INFO ] Invariant cache hit.
[2023-03-20 02:15:27] [INFO ] Implicit Places using invariants in 76 ms returned [58, 62]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 77 ms to find 2 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 73/75 places, 62/62 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 71 transition count 60
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 71 transition count 60
Applied a total of 4 rules in 3 ms. Remains 71 /73 variables (removed 2) and now considering 60/62 (removed 2) transitions.
// Phase 1: matrix 60 rows 71 cols
[2023-03-20 02:15:27] [INFO ] Computed 31 place invariants in 0 ms
[2023-03-20 02:15:27] [INFO ] Implicit Places using invariants in 46 ms returned []
[2023-03-20 02:15:27] [INFO ] Invariant cache hit.
[2023-03-20 02:15:27] [INFO ] State equation strengthened by 2 read => feed constraints.
[2023-03-20 02:15:27] [INFO ] Implicit Places using invariants and state equation in 59 ms returned []
Implicit Place search using SMT with State Equation took 107 ms to find 0 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 2 : 71/75 places, 60/62 transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 189 ms. Remains : 71/75 places, 60/62 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=1111 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1673668 steps, run timeout after 3003 ms. (steps per millisecond=557 ) properties seen :{}
Probabilistic random walk after 1673668 steps, saw 1025362 distinct states, run finished after 3004 ms. (steps per millisecond=557 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-20 02:15:30] [INFO ] Invariant cache hit.
[2023-03-20 02:15:30] [INFO ] After 61ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 02:15:30] [INFO ] [Nat]Absence check using 31 positive place invariants in 4 ms returned sat
[2023-03-20 02:15:30] [INFO ] After 28ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:30] [INFO ] State equation strengthened by 2 read => feed constraints.
[2023-03-20 02:15:30] [INFO ] After 8ms SMT Verify possible using 2 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:30] [INFO ] After 19ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-20 02:15:30] [INFO ] After 100ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 71 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 71/71 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 71 /71 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 4 ms. Remains : 71/71 places, 60/60 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 71/71 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 71 /71 variables (removed 0) and now considering 60/60 (removed 0) transitions.
[2023-03-20 02:15:30] [INFO ] Invariant cache hit.
[2023-03-20 02:15:30] [INFO ] Implicit Places using invariants in 89 ms returned []
[2023-03-20 02:15:30] [INFO ] Invariant cache hit.
[2023-03-20 02:15:30] [INFO ] State equation strengthened by 2 read => feed constraints.
[2023-03-20 02:15:30] [INFO ] Implicit Places using invariants and state equation in 161 ms returned []
Implicit Place search using SMT with State Equation took 252 ms to find 0 implicit places.
[2023-03-20 02:15:30] [INFO ] Redundant transitions in 1 ms returned []
[2023-03-20 02:15:30] [INFO ] Invariant cache hit.
[2023-03-20 02:15:31] [INFO ] Dead Transitions using invariants and state equation in 586 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 851 ms. Remains : 71/71 places, 60/60 transitions.
Partial Free-agglomeration rule applied 13 times.
Drop transitions removed 13 transitions
Iterating global reduction 0 with 13 rules applied. Total rules applied 13 place count 71 transition count 60
Applied a total of 13 rules in 4 ms. Remains 71 /71 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 60 rows 71 cols
[2023-03-20 02:15:31] [INFO ] Computed 31 place invariants in 2 ms
[2023-03-20 02:15:31] [INFO ] After 26ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 02:15:31] [INFO ] [Nat]Absence check using 31 positive place invariants in 6 ms returned sat
[2023-03-20 02:15:31] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:31] [INFO ] State equation strengthened by 11 read => feed constraints.
[2023-03-20 02:15:31] [INFO ] After 4ms SMT Verify possible using 11 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:31] [INFO ] After 11ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-20 02:15:31] [INFO ] After 86ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 9 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 10 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 204 transitions.
Computed a total of 55 stabilizing places and 55 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 18 place count 207 transition count 186
Iterating global reduction 0 with 18 rules applied. Total rules applied 36 place count 207 transition count 186
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 37 place count 206 transition count 185
Iterating global reduction 0 with 1 rules applied. Total rules applied 38 place count 206 transition count 185
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 39 place count 205 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 40 place count 205 transition count 184
Applied a total of 40 rules in 14 ms. Remains 205 /225 variables (removed 20) and now considering 184/204 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 205/225 places, 184/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 8 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 8 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 205 transition count 184
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 43 place count 203 transition count 182
Iterating global reduction 0 with 1 rules applied. Total rules applied 44 place count 203 transition count 182
Applied a total of 44 rules in 14 ms. Remains 203 /225 variables (removed 22) and now considering 182/204 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 203/225 places, 182/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 206 transition count 185
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 206 transition count 185
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 39 place count 205 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 40 place count 205 transition count 184
Applied a total of 40 rules in 11 ms. Remains 205 /225 variables (removed 20) and now considering 184/204 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 205/225 places, 184/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 208 transition count 187
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 208 transition count 187
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 35 place count 207 transition count 186
Iterating global reduction 0 with 1 rules applied. Total rules applied 36 place count 207 transition count 186
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 37 place count 206 transition count 185
Iterating global reduction 0 with 1 rules applied. Total rules applied 38 place count 206 transition count 185
Applied a total of 38 rules in 15 ms. Remains 206 /225 variables (removed 19) and now considering 185/204 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 206/225 places, 185/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 185 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 205 transition count 184
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Applied a total of 42 rules in 10 ms. Remains 204 /225 variables (removed 21) and now considering 183/204 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 204/225 places, 183/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 183 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 18 place count 207 transition count 186
Iterating global reduction 0 with 18 rules applied. Total rules applied 36 place count 207 transition count 186
Applied a total of 36 rules in 7 ms. Remains 207 /225 variables (removed 18) and now considering 186/204 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 207/225 places, 186/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 44 transitions
Trivial Post-agglo rules discarded 44 transitions
Performed 44 trivial Post agglomeration. Transition count delta: 44
Iterating post reduction 0 with 44 rules applied. Total rules applied 44 place count 224 transition count 159
Reduce places removed 44 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 46 rules applied. Total rules applied 90 place count 180 transition count 157
Reduce places removed 1 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 2 with 5 rules applied. Total rules applied 95 place count 179 transition count 153
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 99 place count 175 transition count 153
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 14 Pre rules applied. Total rules applied 99 place count 175 transition count 139
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 4 with 28 rules applied. Total rules applied 127 place count 161 transition count 139
Discarding 13 places :
Symmetric choice reduction at 4 with 13 rule applications. Total rules 140 place count 148 transition count 126
Iterating global reduction 4 with 13 rules applied. Total rules applied 153 place count 148 transition count 126
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 6 Pre rules applied. Total rules applied 153 place count 148 transition count 120
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 165 place count 142 transition count 120
Performed 37 Post agglomeration using F-continuation condition.Transition count delta: 37
Deduced a syphon composed of 37 places in 0 ms
Reduce places removed 37 places and 0 transitions.
Iterating global reduction 4 with 74 rules applied. Total rules applied 239 place count 105 transition count 83
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 4 with 1 rules applied. Total rules applied 240 place count 105 transition count 83
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 242 place count 103 transition count 81
Applied a total of 242 rules in 22 ms. Remains 103 /225 variables (removed 122) and now considering 81/204 (removed 123) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 103/225 places, 81/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 4 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 4 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 209 transition count 188
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 209 transition count 188
Applied a total of 32 rules in 11 ms. Remains 209 /225 variables (removed 16) and now considering 188/204 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 209/225 places, 188/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 204 transition count 183
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 204 transition count 183
Applied a total of 42 rules in 7 ms. Remains 204 /225 variables (removed 21) and now considering 183/204 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 204/225 places, 183/204 transitions.
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:31] [INFO ] Input system was already deterministic with 183 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 205 transition count 184
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 43 place count 203 transition count 182
Iterating global reduction 0 with 1 rules applied. Total rules applied 44 place count 203 transition count 182
Applied a total of 44 rules in 13 ms. Remains 203 /225 variables (removed 22) and now considering 182/204 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 203/225 places, 182/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 204 transition count 183
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 204 transition count 183
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 43 place count 203 transition count 182
Iterating global reduction 0 with 1 rules applied. Total rules applied 44 place count 203 transition count 182
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 45 place count 202 transition count 181
Iterating global reduction 0 with 1 rules applied. Total rules applied 46 place count 202 transition count 181
Applied a total of 46 rules in 13 ms. Remains 202 /225 variables (removed 23) and now considering 181/204 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 202/225 places, 181/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 181 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 209 transition count 188
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 209 transition count 188
Applied a total of 32 rules in 6 ms. Remains 209 /225 variables (removed 16) and now considering 188/204 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 209/225 places, 188/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 5 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 52 transitions
Trivial Post-agglo rules discarded 52 transitions
Performed 52 trivial Post agglomeration. Transition count delta: 52
Iterating post reduction 0 with 52 rules applied. Total rules applied 52 place count 224 transition count 151
Reduce places removed 52 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 1 with 54 rules applied. Total rules applied 106 place count 172 transition count 149
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 107 place count 171 transition count 149
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 16 Pre rules applied. Total rules applied 107 place count 171 transition count 133
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 3 with 32 rules applied. Total rules applied 139 place count 155 transition count 133
Discarding 15 places :
Symmetric choice reduction at 3 with 15 rule applications. Total rules 154 place count 140 transition count 118
Iterating global reduction 3 with 15 rules applied. Total rules applied 169 place count 140 transition count 118
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 8 Pre rules applied. Total rules applied 169 place count 140 transition count 110
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 185 place count 132 transition count 110
Performed 43 Post agglomeration using F-continuation condition.Transition count delta: 43
Deduced a syphon composed of 43 places in 0 ms
Reduce places removed 43 places and 0 transitions.
Iterating global reduction 3 with 86 rules applied. Total rules applied 271 place count 89 transition count 67
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 272 place count 88 transition count 66
Applied a total of 272 rules in 17 ms. Remains 88 /225 variables (removed 137) and now considering 66/204 (removed 138) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 88/225 places, 66/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 3 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 3 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 206 transition count 185
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 206 transition count 185
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 39 place count 205 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Applied a total of 42 rules in 8 ms. Remains 204 /225 variables (removed 21) and now considering 183/204 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 204/225 places, 183/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 183 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 205 transition count 184
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 43 place count 203 transition count 182
Iterating global reduction 0 with 1 rules applied. Total rules applied 44 place count 203 transition count 182
Applied a total of 44 rules in 8 ms. Remains 203 /225 variables (removed 22) and now considering 182/204 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 203/225 places, 182/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 5 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 5 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 182 transitions.
Starting structural reductions in LTL mode, iteration 0 : 225/225 places, 204/204 transitions.
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 19 place count 206 transition count 185
Iterating global reduction 0 with 19 rules applied. Total rules applied 38 place count 206 transition count 185
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 39 place count 205 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 40 place count 205 transition count 184
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 41 place count 204 transition count 183
Iterating global reduction 0 with 1 rules applied. Total rules applied 42 place count 204 transition count 183
Applied a total of 42 rules in 8 ms. Remains 204 /225 variables (removed 21) and now considering 183/204 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 204/225 places, 183/204 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 6 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 5 ms
[2023-03-20 02:15:32] [INFO ] Input system was already deterministic with 183 transitions.
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:32] [INFO ] Flatten gal took : 7 ms
[2023-03-20 02:15:32] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-20 02:15:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 225 places, 204 transitions and 516 arcs took 1 ms.
Total runtime 11047 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldPPPt-PT-003B
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA ShieldPPPt-PT-003B-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPt-PT-003B-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679278663032

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 19 (type EXCL) for 18 ShieldPPPt-PT-003B-CTLFireability-06
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 19 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-06
lola: result : true
lola: markings : 4020
lola: fired transitions : 17099
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 ShieldPPPt-PT-003B-CTLFireability-09
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-09
lola: result : true
lola: markings : 113
lola: fired transitions : 275
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ShieldPPPt-PT-003B-CTLFireability-07
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 22 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-07
lola: result : false
lola: markings : 81
lola: fired transitions : 253
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ShieldPPPt-PT-003B-CTLFireability-02
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/257 5/32 ShieldPPPt-PT-003B-CTLFireability-02 1009013 m, 201802 m/sec, 3240594 t fired, .

Time elapsed: 5 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/257 10/32 ShieldPPPt-PT-003B-CTLFireability-02 2005049 m, 199207 m/sec, 6459434 t fired, .

Time elapsed: 10 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/257 15/32 ShieldPPPt-PT-003B-CTLFireability-02 3004455 m, 199881 m/sec, 9689438 t fired, .

Time elapsed: 15 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/257 20/32 ShieldPPPt-PT-003B-CTLFireability-02 3996338 m, 198376 m/sec, 12902244 t fired, .

Time elapsed: 20 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/257 24/32 ShieldPPPt-PT-003B-CTLFireability-02 4970852 m, 194902 m/sec, 16057849 t fired, .

Time elapsed: 25 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/257 29/32 ShieldPPPt-PT-003B-CTLFireability-02 5943163 m, 194462 m/sec, 19211404 t fired, .

Time elapsed: 30 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-13: CONJ 0 2 0 0 2 0 0 0
ShieldPPPt-PT-003B-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 35 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 49 ShieldPPPt-PT-003B-CTLFireability-15
lola: time limit : 274 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-15
lola: result : false
lola: markings : 81
lola: fired transitions : 81
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 ShieldPPPt-PT-003B-CTLFireability-14
lola: time limit : 297 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-14
lola: result : true
lola: markings : 81
lola: fired transitions : 81
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 39 ShieldPPPt-PT-003B-CTLFireability-13
lola: time limit : 324 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-13
lola: result : false
lola: markings : 428
lola: fired transitions : 594
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 ShieldPPPt-PT-003B-CTLFireability-11
lola: time limit : 396 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-11
lola: result : true
lola: markings : 649
lola: fired transitions : 733
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 ShieldPPPt-PT-003B-CTLFireability-10
lola: time limit : 445 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/445 4/32 ShieldPPPt-PT-003B-CTLFireability-10 718197 m, 143639 m/sec, 2676576 t fired, .

Time elapsed: 40 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/445 7/32 ShieldPPPt-PT-003B-CTLFireability-10 1359834 m, 128327 m/sec, 5223221 t fired, .

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/445 10/32 ShieldPPPt-PT-003B-CTLFireability-10 1975899 m, 123213 m/sec, 7690073 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/445 13/32 ShieldPPPt-PT-003B-CTLFireability-10 2566000 m, 118020 m/sec, 10098681 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/445 16/32 ShieldPPPt-PT-003B-CTLFireability-10 3144669 m, 115733 m/sec, 12477997 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/445 19/32 ShieldPPPt-PT-003B-CTLFireability-10 3706320 m, 112330 m/sec, 14812977 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 35/445 22/32 ShieldPPPt-PT-003B-CTLFireability-10 4262463 m, 111228 m/sec, 17133493 t fired, .

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 40/445 24/32 ShieldPPPt-PT-003B-CTLFireability-10 4808678 m, 109243 m/sec, 19439122 t fired, .

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 45/445 27/32 ShieldPPPt-PT-003B-CTLFireability-10 5351610 m, 108586 m/sec, 21721490 t fired, .

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 50/445 30/32 ShieldPPPt-PT-003B-CTLFireability-10 5891446 m, 107967 m/sec, 24001212 t fired, .

Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 55/445 32/32 ShieldPPPt-PT-003B-CTLFireability-10 6426660 m, 107042 m/sec, 26285130 t fired, .

Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 ShieldPPPt-PT-003B-CTLFireability-08
lola: time limit : 500 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-08
lola: result : false
lola: markings : 80
lola: fired transitions : 80
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 ShieldPPPt-PT-003B-CTLFireability-05
lola: time limit : 584 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/584 6/32 ShieldPPPt-PT-003B-CTLFireability-05 1137661 m, 227532 m/sec, 3018102 t fired, .

Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/584 11/32 ShieldPPPt-PT-003B-CTLFireability-05 2241301 m, 220728 m/sec, 5956772 t fired, .

Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/584 16/32 ShieldPPPt-PT-003B-CTLFireability-05 3306469 m, 213033 m/sec, 8804051 t fired, .

Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/584 21/32 ShieldPPPt-PT-003B-CTLFireability-05 4366614 m, 212029 m/sec, 11624980 t fired, .

Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/584 26/32 ShieldPPPt-PT-003B-CTLFireability-05 5427425 m, 212162 m/sec, 14434155 t fired, .

Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/584 31/32 ShieldPPPt-PT-003B-CTLFireability-05 6473289 m, 209172 m/sec, 17214896 t fired, .

Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPt-PT-003B-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ShieldPPPt-PT-003B-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPt-PT-003B-CTLFireability-12: AFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 ShieldPPPt-PT-003B-CTLFireability-04
lola: time limit : 694 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-04
lola: result : true
lola: markings : 1750
lola: fired transitions : 1931
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ShieldPPPt-PT-003B-CTLFireability-03
lola: time limit : 867 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-03
lola: result : false
lola: markings : 4804
lola: fired transitions : 9239
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ShieldPPPt-PT-003B-CTLFireability-01
lola: time limit : 1156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-01
lola: result : false
lola: markings : 1716
lola: fired transitions : 1886
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ShieldPPPt-PT-003B-CTLFireability-00
lola: time limit : 1735 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-00
lola: result : false
lola: markings : 1704
lola: fired transitions : 1874
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 ShieldPPPt-PT-003B-CTLFireability-12
lola: time limit : 3470 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ShieldPPPt-PT-003B-CTLFireability-12
lola: result : false
lola: markings : 11
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPt-PT-003B-CTLFireability-00: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-01: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-02: CTL unknown AGGR
ShieldPPPt-PT-003B-CTLFireability-03: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-04: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-05: CTL unknown AGGR
ShieldPPPt-PT-003B-CTLFireability-06: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-07: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-08: CTL false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-09: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-10: CTL unknown AGGR
ShieldPPPt-PT-003B-CTLFireability-11: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-12: AFAG false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-13: CONJ false CTL model checker
ShieldPPPt-PT-003B-CTLFireability-14: CTL true CTL model checker
ShieldPPPt-PT-003B-CTLFireability-15: CTL false CTL model checker


Time elapsed: 130 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldPPPt-PT-003B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldPPPt-PT-003B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715400570"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldPPPt-PT-003B.tgz
mv ShieldPPPt-PT-003B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;