fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r391-oct2-167903715400498
Last Updated
May 14, 2023

About the Execution of LoLa+red for ShieldPPPs-PT-050A

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2666.771 492383.00 943363.00 49.90 T?T?F???TT?F?F?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r391-oct2-167903715400498.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ShieldPPPs-PT-050A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r391-oct2-167903715400498
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 900K
-rw-r--r-- 1 mcc users 7.2K Feb 26 02:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 02:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 02:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 02:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 02:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 26 02:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 02:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 26 02:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 447K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-00
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-01
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-02
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-03
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-04
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-05
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-06
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-07
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-08
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-09
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-10
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-11
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-12
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-13
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-14
FORMULA_NAME ShieldPPPs-PT-050A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679276651651

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldPPPs-PT-050A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 01:44:13] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 01:44:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 01:44:13] [INFO ] Load time of PNML (sax parser for PT used): 127 ms
[2023-03-20 01:44:13] [INFO ] Transformed 1553 places.
[2023-03-20 01:44:13] [INFO ] Transformed 1303 transitions.
[2023-03-20 01:44:13] [INFO ] Found NUPN structural information;
[2023-03-20 01:44:13] [INFO ] Parsed PT model containing 1553 places and 1303 transitions and 5006 arcs in 238 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 7 ms.
Support contains 204 out of 1553 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 148 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
// Phase 1: matrix 1303 rows 1553 cols
[2023-03-20 01:44:14] [INFO ] Computed 551 place invariants in 27 ms
[2023-03-20 01:44:15] [INFO ] Implicit Places using invariants in 1559 ms returned []
[2023-03-20 01:44:15] [INFO ] Invariant cache hit.
[2023-03-20 01:44:17] [INFO ] Implicit Places using invariants and state equation in 2098 ms returned []
Implicit Place search using SMT with State Equation took 3685 ms to find 0 implicit places.
[2023-03-20 01:44:17] [INFO ] Invariant cache hit.
[2023-03-20 01:44:18] [INFO ] Dead Transitions using invariants and state equation in 809 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4648 ms. Remains : 1553/1553 places, 1303/1303 transitions.
Support contains 204 out of 1553 places after structural reductions.
[2023-03-20 01:44:19] [INFO ] Flatten gal took : 163 ms
[2023-03-20 01:44:19] [INFO ] Flatten gal took : 84 ms
[2023-03-20 01:44:19] [INFO ] Input system was already deterministic with 1303 transitions.
Support contains 195 out of 1553 places (down from 204) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 529 ms. (steps per millisecond=18 ) properties (out of 89) seen :84
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-20 01:44:20] [INFO ] Invariant cache hit.
[2023-03-20 01:44:21] [INFO ] [Real]Absence check using 551 positive place invariants in 276 ms returned sat
[2023-03-20 01:44:21] [INFO ] After 845ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-20 01:44:21] [INFO ] [Nat]Absence check using 551 positive place invariants in 137 ms returned sat
[2023-03-20 01:44:24] [INFO ] After 3055ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-20 01:44:25] [INFO ] Deduced a trap composed of 14 places in 61 ms of which 4 ms to minimize.
[2023-03-20 01:44:25] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 186 ms
[2023-03-20 01:44:27] [INFO ] After 5855ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 645 ms.
[2023-03-20 01:44:28] [INFO ] After 7173ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Parikh walk visited 1 properties in 554 ms.
Support contains 21 out of 1553 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 4 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 1551 transition count 1301
Partial Free-agglomeration rule applied 436 times.
Drop transitions removed 436 transitions
Iterating global reduction 0 with 436 rules applied. Total rules applied 440 place count 1551 transition count 1301
Applied a total of 440 rules in 190 ms. Remains 1551 /1553 variables (removed 2) and now considering 1301/1303 (removed 2) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 191 ms. Remains : 1551/1553 places, 1301/1303 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 277 ms. (steps per millisecond=36 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 1301 rows 1551 cols
[2023-03-20 01:44:29] [INFO ] Computed 551 place invariants in 100 ms
[2023-03-20 01:44:30] [INFO ] [Real]Absence check using 523 positive place invariants in 142 ms returned sat
[2023-03-20 01:44:30] [INFO ] [Real]Absence check using 523 positive and 28 generalized place invariants in 36 ms returned sat
[2023-03-20 01:44:30] [INFO ] After 627ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-20 01:44:30] [INFO ] [Nat]Absence check using 523 positive place invariants in 133 ms returned sat
[2023-03-20 01:44:30] [INFO ] [Nat]Absence check using 523 positive and 28 generalized place invariants in 6 ms returned sat
[2023-03-20 01:44:35] [INFO ] After 4104ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-20 01:44:37] [INFO ] Deduced a trap composed of 11 places in 115 ms of which 2 ms to minimize.
[2023-03-20 01:44:37] [INFO ] Deduced a trap composed of 11 places in 95 ms of which 3 ms to minimize.
[2023-03-20 01:44:37] [INFO ] Deduced a trap composed of 11 places in 99 ms of which 1 ms to minimize.
[2023-03-20 01:44:37] [INFO ] Deduced a trap composed of 11 places in 65 ms of which 1 ms to minimize.
[2023-03-20 01:44:38] [INFO ] Deduced a trap composed of 11 places in 37 ms of which 1 ms to minimize.
[2023-03-20 01:44:38] [INFO ] Trap strengthening (SAT) tested/added 6/5 trap constraints in 972 ms
[2023-03-20 01:44:39] [INFO ] Deduced a trap composed of 10 places in 103 ms of which 1 ms to minimize.
[2023-03-20 01:44:39] [INFO ] Deduced a trap composed of 17 places in 104 ms of which 3 ms to minimize.
[2023-03-20 01:44:40] [INFO ] Deduced a trap composed of 11 places in 58 ms of which 1 ms to minimize.
[2023-03-20 01:44:40] [INFO ] Deduced a trap composed of 11 places in 49 ms of which 1 ms to minimize.
[2023-03-20 01:44:40] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 919 ms
[2023-03-20 01:44:45] [INFO ] Deduced a trap composed of 11 places in 172 ms of which 0 ms to minimize.
[2023-03-20 01:44:45] [INFO ] Deduced a trap composed of 11 places in 76 ms of which 1 ms to minimize.
[2023-03-20 01:44:45] [INFO ] Deduced a trap composed of 17 places in 90 ms of which 0 ms to minimize.
[2023-03-20 01:44:45] [INFO ] Deduced a trap composed of 11 places in 100 ms of which 1 ms to minimize.
[2023-03-20 01:44:45] [INFO ] Deduced a trap composed of 11 places in 107 ms of which 1 ms to minimize.
[2023-03-20 01:44:46] [INFO ] Deduced a trap composed of 11 places in 132 ms of which 1 ms to minimize.
[2023-03-20 01:44:46] [INFO ] Deduced a trap composed of 11 places in 84 ms of which 1 ms to minimize.
[2023-03-20 01:44:46] [INFO ] Deduced a trap composed of 11 places in 61 ms of which 1 ms to minimize.
[2023-03-20 01:44:46] [INFO ] Trap strengthening (SAT) tested/added 9/8 trap constraints in 1708 ms
[2023-03-20 01:44:46] [INFO ] After 15739ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 2045 ms.
[2023-03-20 01:44:48] [INFO ] After 18360ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 419 ms.
Support contains 18 out of 1551 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1551/1551 places, 1301/1301 transitions.
Partial Free-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 1551 transition count 1301
Applied a total of 1 rules in 100 ms. Remains 1551 /1551 variables (removed 0) and now considering 1301/1301 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 100 ms. Remains : 1551/1551 places, 1301/1301 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 177 ms. (steps per millisecond=56 ) properties (out of 3) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 1301 rows 1551 cols
[2023-03-20 01:44:49] [INFO ] Computed 551 place invariants in 78 ms
[2023-03-20 01:44:50] [INFO ] [Real]Absence check using 522 positive place invariants in 101 ms returned sat
[2023-03-20 01:44:50] [INFO ] [Real]Absence check using 522 positive and 29 generalized place invariants in 13 ms returned sat
[2023-03-20 01:44:50] [INFO ] After 1255ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-20 01:44:51] [INFO ] [Nat]Absence check using 522 positive place invariants in 81 ms returned sat
[2023-03-20 01:44:51] [INFO ] [Nat]Absence check using 522 positive and 29 generalized place invariants in 5 ms returned sat
[2023-03-20 01:44:53] [INFO ] After 2259ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-20 01:44:53] [INFO ] Deduced a trap composed of 11 places in 108 ms of which 1 ms to minimize.
[2023-03-20 01:44:54] [INFO ] Deduced a trap composed of 11 places in 74 ms of which 1 ms to minimize.
[2023-03-20 01:44:54] [INFO ] Deduced a trap composed of 20 places in 74 ms of which 1 ms to minimize.
[2023-03-20 01:44:54] [INFO ] Deduced a trap composed of 11 places in 59 ms of which 1 ms to minimize.
[2023-03-20 01:44:54] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 864 ms
[2023-03-20 01:44:54] [INFO ] After 3407ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1021 ms.
[2023-03-20 01:44:55] [INFO ] After 4771ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 127 ms.
Support contains 4 out of 1551 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1551/1551 places, 1301/1301 transitions.
Partial Free-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 1551 transition count 1301
Applied a total of 4 rules in 93 ms. Remains 1551 /1551 variables (removed 0) and now considering 1301/1301 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 102 ms. Remains : 1551/1551 places, 1301/1301 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 138 ms. (steps per millisecond=72 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 1) seen :0
Finished probabilistic random walk after 78959 steps, run visited all 1 properties in 1351 ms. (steps per millisecond=58 )
Probabilistic random walk after 78959 steps, saw 75000 distinct states, run finished after 1351 ms. (steps per millisecond=58 ) properties seen :1
[2023-03-20 01:44:57] [INFO ] Flatten gal took : 101 ms
[2023-03-20 01:44:57] [INFO ] Flatten gal took : 89 ms
[2023-03-20 01:44:57] [INFO ] Input system was already deterministic with 1303 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 46 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:44:57] [INFO ] Flatten gal took : 71 ms
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 62 ms
[2023-03-20 01:44:58] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 4 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 1551 transition count 1301
Applied a total of 4 rules in 110 ms. Remains 1551 /1553 variables (removed 2) and now considering 1301/1303 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 110 ms. Remains : 1551/1553 places, 1301/1303 transitions.
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 69 ms
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 58 ms
[2023-03-20 01:44:58] [INFO ] Input system was already deterministic with 1301 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 4 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 1551 transition count 1301
Applied a total of 4 rules in 100 ms. Remains 1551 /1553 variables (removed 2) and now considering 1301/1303 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 100 ms. Remains : 1551/1553 places, 1301/1303 transitions.
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 54 ms
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 103 ms
[2023-03-20 01:44:58] [INFO ] Input system was already deterministic with 1301 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 37 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 49 ms
[2023-03-20 01:44:58] [INFO ] Flatten gal took : 51 ms
[2023-03-20 01:44:59] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 47 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 52 ms
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 54 ms
[2023-03-20 01:44:59] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 47 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 53 ms
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 58 ms
[2023-03-20 01:44:59] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 47 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 47 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 52 ms
[2023-03-20 01:44:59] [INFO ] Flatten gal took : 55 ms
[2023-03-20 01:44:59] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 42 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 51 ms
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 56 ms
[2023-03-20 01:45:00] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 31 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 45 ms
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 48 ms
[2023-03-20 01:45:00] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 31 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 46 ms
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 48 ms
[2023-03-20 01:45:00] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 30 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 46 ms
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 48 ms
[2023-03-20 01:45:00] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 39 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 39 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 45 ms
[2023-03-20 01:45:00] [INFO ] Flatten gal took : 62 ms
[2023-03-20 01:45:01] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 31 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 46 ms
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 48 ms
[2023-03-20 01:45:01] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 31 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 47 ms
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 46 ms
[2023-03-20 01:45:01] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Applied a total of 0 rules in 31 ms. Remains 1553 /1553 variables (removed 0) and now considering 1303/1303 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1553/1553 places, 1303/1303 transitions.
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 45 ms
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 47 ms
[2023-03-20 01:45:01] [INFO ] Input system was already deterministic with 1303 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1553/1553 places, 1303/1303 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 4 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 1551 transition count 1301
Applied a total of 4 rules in 113 ms. Remains 1551 /1553 variables (removed 2) and now considering 1301/1303 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 113 ms. Remains : 1551/1553 places, 1301/1303 transitions.
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 50 ms
[2023-03-20 01:45:01] [INFO ] Flatten gal took : 55 ms
[2023-03-20 01:45:01] [INFO ] Input system was already deterministic with 1301 transitions.
[2023-03-20 01:45:02] [INFO ] Flatten gal took : 54 ms
[2023-03-20 01:45:02] [INFO ] Flatten gal took : 53 ms
[2023-03-20 01:45:02] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-20 01:45:02] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1553 places, 1303 transitions and 5006 arcs took 6 ms.
Total runtime 48448 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ShieldPPPs-PT-050A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/380
CTLFireability

FORMULA ShieldPPPs-PT-050A-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ShieldPPPs-PT-050A-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679277144034

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/380/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/380/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/380/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 11 (type EXCL) for 10 ShieldPPPs-PT-050A-CTLFireability-02
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type FNDP) for 28 ShieldPPPs-PT-050A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type EQUN) for 28 ShieldPPPs-PT-050A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SRCH) for 28 ShieldPPPs-PT-050A-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 59 (type SRCH) for ShieldPPPs-PT-050A-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/380/CTLFireability-57.sara.
lola: FINISHED task # 56 (type FNDP) for ShieldPPPs-PT-050A-CTLFireability-08
lola: result : true
lola: fired transitions : 89
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 57 (type EQUN) for ShieldPPPs-PT-050A-CTLFireability-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 11 (type EXCL) for ShieldPPPs-PT-050A-CTLFireability-02
lola: result : true
lola: markings : 6007
lola: fired transitions : 11919
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 ShieldPPPs-PT-050A-CTLFireability-04
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 17 (type EXCL) for ShieldPPPs-PT-050A-CTLFireability-04
lola: result : false
lola: markings : 6162
lola: fired transitions : 6384
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 45 (type EXCL) for 44 ShieldPPPs-PT-050A-CTLFireability-12
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:714
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-050A-CTLFireability-02: CTL true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-050A-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
ShieldPPPs-PT-050A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-08: CONJ 0 1 0 0 4 0 0 2
ShieldPPPs-PT-050A-CTLFireability-09: EXEF 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 3/239 3/32 ShieldPPPs-PT-050A-CTLFireability-12 132118 m, 26423 m/sec, 515305 t fired, .

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ShieldPPPs-PT-050A-CTLFireability-02: CTL true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldPPPs-PT-050A-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-08: CONJ 0 1 0 0 4 0 0 2
ShieldPPPs-PT-050A-CTLFireability-09: EXEF 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 8/239 6/32 ShieldPPPs-PT-050A-CTLFireability-12 311843 m, 35945 m/sec, 1376565 t fired, .

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ShieldPPPs-PT-050A-CTLFireability-04: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ShieldPPPs-PT-050A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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ShieldPPPs-PT-050A-CTLFireability-08: CONJ 0 1 0 0 4 0 0 2
ShieldPPPs-PT-050A-CTLFireability-09: EXEF 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 13/239 9/32 ShieldPPPs-PT-050A-CTLFireability-12 498792 m, 37389 m/sec, 2236840 t fired, .

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ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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45 CTL EXCL 18/239 12/32 ShieldPPPs-PT-050A-CTLFireability-12 676725 m, 35586 m/sec, 3092425 t fired, .

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ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
54 CTL EXCL 35/3199 31/32 ShieldPPPs-PT-050A-CTLFireability-15 1766343 m, 44435 m/sec, 6126718 t fired, .

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lola: CANCELED task # 54 (type EXCL) for ShieldPPPs-PT-050A-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-050A-CTLFireability-00: DISJ true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-02: CTL true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-04: CTL false CTL model checker
ShieldPPPs-PT-050A-CTLFireability-08: CONJ true CONJ
ShieldPPPs-PT-050A-CTLFireability-09: EXEF true state space /EXEF
ShieldPPPs-PT-050A-CTLFireability-11: CTL false CTL model checker
ShieldPPPs-PT-050A-CTLFireability-13: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ShieldPPPs-PT-050A-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
ShieldPPPs-PT-050A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ShieldPPPs-PT-050A-CTLFireability-00: DISJ true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-01: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-02: CTL true CTL model checker
ShieldPPPs-PT-050A-CTLFireability-03: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-04: CTL false CTL model checker
ShieldPPPs-PT-050A-CTLFireability-05: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-06: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-07: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-08: CONJ true CONJ
ShieldPPPs-PT-050A-CTLFireability-09: EXEF true state space /EXEF
ShieldPPPs-PT-050A-CTLFireability-10: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-11: CTL false CTL model checker
ShieldPPPs-PT-050A-CTLFireability-12: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-13: CTL false CTL model checker
ShieldPPPs-PT-050A-CTLFireability-14: CTL unknown AGGR
ShieldPPPs-PT-050A-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldPPPs-PT-050A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ShieldPPPs-PT-050A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r391-oct2-167903715400498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldPPPs-PT-050A.tgz
mv ShieldPPPs-PT-050A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;