Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r361-smll-167891811900658.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is SharedMemory-PT-000005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r361-smll-167891811900658
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 872K
-rw-r--r-- 1 mcc users 20K Feb 25 14:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 135K Feb 25 14:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 27K Feb 25 13:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 142K Feb 25 13:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 44K Feb 25 16:52 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 16:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:52 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 25 14:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 25 14:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 30K Feb 25 14:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 150K Feb 25 14:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:52 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.7K Feb 25 16:52 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 83K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-00
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-01
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-02
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-03
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-04
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-05
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-06
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-07
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-08
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-09
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-10
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-11
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-12
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-13
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-14
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679444258252

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000005
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-22 00:17:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 00:17:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 00:17:42] [INFO ] Load time of PNML (sax parser for PT used): 93 ms
[2023-03-22 00:17:42] [INFO ] Transformed 41 places.
[2023-03-22 00:17:42] [INFO ] Transformed 55 transitions.
[2023-03-22 00:17:42] [INFO ] Found NUPN structural information;
[2023-03-22 00:17:42] [INFO ] Parsed PT model containing 41 places and 55 transitions and 200 arcs in 253 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 38 ms.
Initial state reduction rules removed 3 formulas.
FORMULA SharedMemory-PT-000005-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000005-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 41 out of 41 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 20 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
// Phase 1: matrix 55 rows 41 cols
[2023-03-22 00:17:43] [INFO ] Computed 11 place invariants in 15 ms
[2023-03-22 00:17:43] [INFO ] Implicit Places using invariants in 307 ms returned []
[2023-03-22 00:17:43] [INFO ] Invariant cache hit.
[2023-03-22 00:17:43] [INFO ] Implicit Places using invariants and state equation in 128 ms returned []
Implicit Place search using SMT with State Equation took 512 ms to find 0 implicit places.
[2023-03-22 00:17:43] [INFO ] Invariant cache hit.
[2023-03-22 00:17:43] [INFO ] Dead Transitions using invariants and state equation in 169 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 705 ms. Remains : 41/41 places, 55/55 transitions.
Support contains 41 out of 41 places after structural reductions.
[2023-03-22 00:17:44] [INFO ] Flatten gal took : 64 ms
[2023-03-22 00:17:44] [INFO ] Flatten gal took : 48 ms
[2023-03-22 00:17:44] [INFO ] Input system was already deterministic with 55 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 439 ms. (steps per millisecond=22 ) properties (out of 69) seen :66
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 120 ms. (steps per millisecond=83 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-22 00:17:45] [INFO ] Invariant cache hit.
[2023-03-22 00:17:45] [INFO ] After 68ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:2
[2023-03-22 00:17:45] [INFO ] [Nat]Absence check using 11 positive place invariants in 4 ms returned sat
[2023-03-22 00:17:45] [INFO ] After 57ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 13 simplifications.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 11 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 13 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 6 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 7 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 8 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 5 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 6 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 2 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 4 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:45] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:17:46] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 0 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:46] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:17:46] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 41/41 places, 55/55 transitions.
Applied a total of 0 rules in 1 ms. Remains 41 /41 variables (removed 0) and now considering 55/55 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 41/41 places, 55/55 transitions.
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:17:46] [INFO ] Input system was already deterministic with 55 transitions.
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 9 ms
[2023-03-22 00:17:46] [INFO ] Flatten gal took : 9 ms
[2023-03-22 00:17:46] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 17 ms.
[2023-03-22 00:17:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 41 places, 55 transitions and 200 arcs took 1 ms.
Total runtime 3535 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/470/ctl_0_ --ctl=/tmp/470/ctl_1_ --ctl=/tmp/470/ctl_2_ --ctl=/tmp/470/ctl_3_ --ctl=/tmp/470/ctl_4_ --ctl=/tmp/470/ctl_5_ --ctl=/tmp/470/ctl_6_ --ctl=/tmp/470/ctl_7_ --ctl=/tmp/470/ctl_8_ --ctl=/tmp/470/ctl_9_ --ctl=/tmp/470/ctl_10_ --ctl=/tmp/470/ctl_11_ --ctl=/tmp/470/ctl_12_ --mu-par --mu-opt
FORMULA SharedMemory-PT-000005-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA SharedMemory-PT-000005-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN

BK_STOP 1679444268026

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name SharedMemory-PT-000005-CTLFireability-02
ctl formula formula --ctl=/tmp/470/ctl_0_
ctl formula name SharedMemory-PT-000005-CTLFireability-03
ctl formula formula --ctl=/tmp/470/ctl_1_
ctl formula name SharedMemory-PT-000005-CTLFireability-04
ctl formula formula --ctl=/tmp/470/ctl_2_
ctl formula name SharedMemory-PT-000005-CTLFireability-05
ctl formula formula --ctl=/tmp/470/ctl_3_
ctl formula name SharedMemory-PT-000005-CTLFireability-06
ctl formula formula --ctl=/tmp/470/ctl_4_
ctl formula name SharedMemory-PT-000005-CTLFireability-07
ctl formula formula --ctl=/tmp/470/ctl_5_
ctl formula name SharedMemory-PT-000005-CTLFireability-08
ctl formula formula --ctl=/tmp/470/ctl_6_
ctl formula name SharedMemory-PT-000005-CTLFireability-09
ctl formula formula --ctl=/tmp/470/ctl_7_
ctl formula name SharedMemory-PT-000005-CTLFireability-10
ctl formula formula --ctl=/tmp/470/ctl_8_
ctl formula name SharedMemory-PT-000005-CTLFireability-11
ctl formula formula --ctl=/tmp/470/ctl_9_
ctl formula name SharedMemory-PT-000005-CTLFireability-12
ctl formula formula --ctl=/tmp/470/ctl_10_
ctl formula name SharedMemory-PT-000005-CTLFireability-14
ctl formula formula --ctl=/tmp/470/ctl_11_
ctl formula name SharedMemory-PT-000005-CTLFireability-15
ctl formula formula --ctl=/tmp/470/ctl_12_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 41 places, 55 transitions and 200 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.010 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 55->50 groups
pnml2lts-sym: Regrouping took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state vector length is 41; there are 50 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 568 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.050 real 0.140 user 0.050 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 1863 states, 389 nodes
pnml2lts-sym: Formula /tmp/470/ctl_2_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_0_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_3_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_1_ holds for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_7_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_11_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_9_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_8_ holds for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_5_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/470/ctl_10_ does not hold for the initial state
pnml2lts-sym: group_next: 464 nodes total
pnml2lts-sym: group_explored: 510 nodes, 325 short vectors total
pnml2lts-sym: max token count: 1
free(): invalid pointer
free(): invalid pointer
free(): invalid pointer

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is SharedMemory-PT-000005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r361-smll-167891811900658"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000005.tgz
mv SharedMemory-PT-000005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;