About the Execution of LoLa+red for SharedMemory-PT-000050
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16218.203 | 862120.00 | 908992.00 | 16035.60 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891809400682.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SharedMemory-PT-000050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891809400682
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 41M
-rw-r--r-- 1 mcc users 685K Feb 25 16:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 2.6M Feb 25 16:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.6M Feb 25 15:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 6.1M Feb 25 15:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 665K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.8M Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 480K Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.4M Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.5M Feb 25 18:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.7M Feb 25 18:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3M Feb 25 17:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13M Feb 25 17:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.9K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 2.6M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-00
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-01
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-02
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-03
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-04
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-05
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-06
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-07
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-08
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-09
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-10
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-11
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-12
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-13
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-14
FORMULA_NAME SharedMemory-PT-000050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679278076826
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 02:07:59] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 02:07:59] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 02:07:59] [INFO ] Load time of PNML (sax parser for PT used): 397 ms
[2023-03-20 02:07:59] [INFO ] Transformed 2651 places.
[2023-03-20 02:07:59] [INFO ] Transformed 5050 transitions.
[2023-03-20 02:07:59] [INFO ] Found NUPN structural information;
[2023-03-20 02:07:59] [INFO ] Completing missing partition info from NUPN : creating a component with [Ext_Mem_Acc_8_2, Ext_Mem_Acc_7_2, Ext_Mem_Acc_20_3, Ext_Mem_Acc_19_3, Ext_Mem_Acc_24_4, Ext_Mem_Acc_15_4, Ext_Mem_Acc_13_5, Ext_Mem_Acc_14_5, Ext_Mem_Acc_17_6, Ext_Mem_Acc_14_6, Ext_Mem_Acc_2_8, Ext_Mem_Acc_1_8, Ext_Mem_Acc_16_9, Ext_Mem_Acc_21_9, Ext_Mem_Acc_26_9, Ext_Mem_Acc_25_9, Ext_Mem_Acc_6_11, Ext_Mem_Acc_7_11, Ext_Mem_Acc_27_11, Ext_Mem_Acc_28_11, Ext_Mem_Acc_40_13, Ext_Mem_Acc_39_13, Ext_Mem_Acc_39_14, Ext_Mem_Acc_38_14, Ext_Mem_Acc_20_14, Ext_Mem_Acc_21_14, Ext_Mem_Acc_43_15, Ext_Mem_Acc_44_15, Ext_Mem_Acc_49_16, Ext_Mem_Acc_48_16, Ext_Mem_Acc_40_18, Ext_Mem_Acc_41_18, Ext_Mem_Acc_13_20, Ext_Mem_Acc_14_20, Ext_Mem_Acc_37_21, Ext_Mem_Acc_38_21, Ext_Mem_Acc_41_20, Ext_Mem_Acc_40_20, Ext_Mem_Acc_45_23, Ext_Mem_Acc_46_23, Ext_Mem_Acc_16_22, Ext_Mem_Acc_15_22, Ext_Mem_Acc_11_26, Ext_Mem_Acc_12_26, Ext_Mem_Acc_31_24, Ext_Mem_Acc_30_24, Ext_Mem_Acc_31_25, Ext_Mem_Acc_32_25, Ext_Mem_Acc_21_29, Ext_Mem_Acc_20_29, Ext_Mem_Acc_13_28, Ext_Mem_Acc_16_28, Ext_Mem_Acc_15_31, Ext_Mem_Acc_14_31, Ext_Mem_Acc_16_30, Ext_Mem_Acc_13_30, Ext_Mem_Acc_24_34, Ext_Mem_Acc_21_34, Ext_Mem_Acc_9_34, Ext_Mem_Acc_12_34, Ext_Mem_Acc_20_32, Ext_Mem_Acc_21_32, Ext_Mem_Acc_25_37, Ext_Mem_Acc_22_37, Ext_Mem_Acc_2_36, Ext_Mem_Acc_49_35, Ext_Mem_Acc_6_40, Ext_Mem_Acc_5_40, Ext_Mem_Acc_42_38, Ext_Mem_Acc_43_38, Ext_Mem_Acc_44_37, Ext_Mem_Acc_43_37, Ext_Mem_Acc_38_41, Ext_Mem_Acc_39_41, Ext_Mem_Acc_43_40, Ext_Mem_Acc_42_40, Ext_Mem_Acc_36_45, Ext_Mem_Acc_37_45, Ext_Mem_Acc_6_46, Ext_Mem_Acc_5_46, Ext_Mem_Acc_29_47, Ext_Mem_Acc_28_47, Ext_Mem_Acc_41_43, Ext_Mem_Acc_40_43, Ext_Mem_Acc_17_44, Ext_Mem_Acc_18_44, Ext_Mem_Acc_34_50, Ext_Mem_Acc_33_50, Ext_Mem_Acc_44_48, Ext_Mem_Acc_45_48, Ext_Mem_Acc_2_50, Ext_Mem_Acc_3_50]
[2023-03-20 02:07:59] [INFO ] Parsed PT model containing 2651 places and 5050 transitions and 20000 arcs in 534 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 275 ms.
Support contains 2651 out of 2651 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 55 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
// Phase 1: matrix 5050 rows 2651 cols
[2023-03-20 02:08:05] [INFO ] Computed 101 place invariants in 400 ms
[2023-03-20 02:08:06] [INFO ] Implicit Places using invariants in 1471 ms returned []
[2023-03-20 02:08:06] [INFO ] Invariant cache hit.
[2023-03-20 02:08:06] [INFO ] Implicit Places using invariants and state equation in 685 ms returned []
Implicit Place search using SMT with State Equation took 2204 ms to find 0 implicit places.
[2023-03-20 02:08:06] [INFO ] Invariant cache hit.
[2023-03-20 02:08:11] [INFO ] Dead Transitions using invariants and state equation in 5078 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7344 ms. Remains : 2651/2651 places, 5050/5050 transitions.
Support contains 2651 out of 2651 places after structural reductions.
[2023-03-20 02:08:13] [INFO ] Flatten gal took : 771 ms
[2023-03-20 02:08:17] [INFO ] Flatten gal took : 754 ms
[2023-03-20 02:08:22] [INFO ] Input system was already deterministic with 5050 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 4985 ms. (steps per millisecond=2 ) properties (out of 77) seen :63
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 13) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 12) seen :1
Running SMT prover for 11 properties.
[2023-03-20 02:08:28] [INFO ] Invariant cache hit.
[2023-03-20 02:08:29] [INFO ] [Real]Absence check using 101 positive place invariants in 144 ms returned sat
[2023-03-20 02:08:34] [INFO ] After 3972ms SMT Verify possible using state equation in real domain returned unsat :4 sat :7
[2023-03-20 02:08:36] [INFO ] After 6543ms SMT Verify possible using trap constraints in real domain returned unsat :4 sat :7
Attempting to minimize the solution found.
Minimization took 1393 ms.
[2023-03-20 02:08:38] [INFO ] After 9967ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :7
Fused 11 Parikh solutions to 7 different solutions.
Finished Parikh walk after 22 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=11 )
Parikh walk visited 7 properties in 53 ms.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
[2023-03-20 02:08:41] [INFO ] Flatten gal took : 466 ms
[2023-03-20 02:08:45] [INFO ] Flatten gal took : 676 ms
[2023-03-20 02:08:49] [INFO ] Input system was already deterministic with 5050 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 19 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:50] [INFO ] Flatten gal took : 206 ms
[2023-03-20 02:08:51] [INFO ] Flatten gal took : 309 ms
[2023-03-20 02:08:52] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 384 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 386 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:52] [INFO ] Flatten gal took : 151 ms
[2023-03-20 02:08:52] [INFO ] Flatten gal took : 166 ms
[2023-03-20 02:08:53] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 18 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:54] [INFO ] Flatten gal took : 228 ms
[2023-03-20 02:08:54] [INFO ] Flatten gal took : 343 ms
[2023-03-20 02:08:55] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 17 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:55] [INFO ] Flatten gal took : 171 ms
[2023-03-20 02:08:56] [INFO ] Flatten gal took : 199 ms
[2023-03-20 02:08:56] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 17 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:56] [INFO ] Flatten gal took : 179 ms
[2023-03-20 02:08:57] [INFO ] Flatten gal took : 219 ms
[2023-03-20 02:08:57] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 12 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:57] [INFO ] Flatten gal took : 188 ms
[2023-03-20 02:08:58] [INFO ] Flatten gal took : 243 ms
[2023-03-20 02:08:58] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 212 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 214 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:08:59] [INFO ] Flatten gal took : 153 ms
[2023-03-20 02:08:59] [INFO ] Flatten gal took : 178 ms
[2023-03-20 02:08:59] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 248 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 248 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:00] [INFO ] Flatten gal took : 136 ms
[2023-03-20 02:09:00] [INFO ] Flatten gal took : 150 ms
[2023-03-20 02:09:00] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 223 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 223 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:01] [INFO ] Flatten gal took : 137 ms
[2023-03-20 02:09:01] [INFO ] Flatten gal took : 153 ms
[2023-03-20 02:09:01] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 217 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 217 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:01] [INFO ] Flatten gal took : 137 ms
[2023-03-20 02:09:01] [INFO ] Flatten gal took : 151 ms
[2023-03-20 02:09:02] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 936 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 937 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:03] [INFO ] Flatten gal took : 136 ms
[2023-03-20 02:09:03] [INFO ] Flatten gal took : 148 ms
[2023-03-20 02:09:03] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 217 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 218 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:04] [INFO ] Flatten gal took : 135 ms
[2023-03-20 02:09:04] [INFO ] Flatten gal took : 149 ms
[2023-03-20 02:09:04] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 874 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 874 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:05] [INFO ] Flatten gal took : 138 ms
[2023-03-20 02:09:05] [INFO ] Flatten gal took : 149 ms
[2023-03-20 02:09:06] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 788 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 791 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:06] [INFO ] Flatten gal took : 133 ms
[2023-03-20 02:09:07] [INFO ] Flatten gal took : 149 ms
[2023-03-20 02:09:07] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 212 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 213 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:07] [INFO ] Flatten gal took : 143 ms
[2023-03-20 02:09:07] [INFO ] Flatten gal took : 155 ms
[2023-03-20 02:09:08] [INFO ] Input system was already deterministic with 5050 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Applied a total of 0 rules in 358 ms. Remains 2651 /2651 variables (removed 0) and now considering 5050/5050 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 358 ms. Remains : 2651/2651 places, 5050/5050 transitions.
[2023-03-20 02:09:08] [INFO ] Flatten gal took : 159 ms
[2023-03-20 02:09:09] [INFO ] Flatten gal took : 169 ms
[2023-03-20 02:09:09] [INFO ] Input system was already deterministic with 5050 transitions.
[2023-03-20 02:09:10] [INFO ] Flatten gal took : 700 ms
[2023-03-20 02:09:15] [INFO ] Flatten gal took : 690 ms
[2023-03-20 02:09:19] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 279 ms.
[2023-03-20 02:09:19] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2651 places, 5050 transitions and 20000 arcs took 28 ms.
Total runtime 79940 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SharedMemory-PT-000050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
BK_STOP 1679278938946
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 489 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SharedMemory-PT-000050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891809400682"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000050.tgz
mv SharedMemory-PT-000050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;