fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r358-smll-167891807400186
Last Updated
May 14, 2023

About the Execution of LoLA for RwMutex-PT-r1000w0010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16215.552 665585.00 714984.00 11903.00 F?????F?FFT?FTF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r358-smll-167891807400186.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RwMutex-PT-r1000w0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r358-smll-167891807400186
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.7M
-rw-r--r-- 1 mcc users 6.2K Feb 25 22:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 25 22:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 22:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 25 22:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 23:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 147K Feb 25 23:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 23:03 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 101K Feb 25 23:03 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 2.2M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-00
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-01
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-02
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-03
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-04
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-05
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-06
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-07
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-08
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-09
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-10
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-11
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-12
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-13
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-14
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678977047096

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r1000w0010
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT RwMutex-PT-r1000w0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA RwMutex-PT-r1000w0010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r1000w0010-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678977712681

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r1000w0010-CTLFireability-00: AGAF 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-01: DISJ 0 0 0 0 2 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-08: CONJ 0 0 0 0 2 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r1000w0010-CTLFireability-00: AGAF false state space /EFEG
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker

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RwMutex-PT-r1000w0010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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23 CTL EXCL 1/237 1/32 RwMutex-PT-r1000w0010-CTLFireability-06 69253 m, 13850 m/sec, 138731 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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23 CTL EXCL 6/237 2/32 RwMutex-PT-r1000w0010-CTLFireability-06 260190 m, 38187 m/sec, 450059 t fired, .

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23 CTL EXCL 11/237 3/32 RwMutex-PT-r1000w0010-CTLFireability-06 419155 m, 31793 m/sec, 697174 t fired, .

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23 CTL EXCL 16/237 4/32 RwMutex-PT-r1000w0010-CTLFireability-06 561718 m, 28512 m/sec, 918762 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker

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54 CTL EXCL 3/253 1/32 RwMutex-PT-r1000w0010-CTLFireability-15 130366 m, 26073 m/sec, 235477 t fired, .

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54 CTL EXCL 8/253 3/32 RwMutex-PT-r1000w0010-CTLFireability-15 326082 m, 39143 m/sec, 536513 t fired, .

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54 CTL EXCL 13/253 4/32 RwMutex-PT-r1000w0010-CTLFireability-15 514778 m, 37739 m/sec, 839138 t fired, .

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54 CTL EXCL 18/253 6/32 RwMutex-PT-r1000w0010-CTLFireability-15 745014 m, 46047 m/sec, 1559881 t fired, .

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54 CTL EXCL 23/253 7/32 RwMutex-PT-r1000w0010-CTLFireability-15 913732 m, 33743 m/sec, 2564468 t fired, .

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54 CTL EXCL 28/253 9/32 RwMutex-PT-r1000w0010-CTLFireability-15 1075831 m, 32419 m/sec, 3569529 t fired, .

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54 CTL EXCL 33/253 11/32 RwMutex-PT-r1000w0010-CTLFireability-15 1234503 m, 31734 m/sec, 4558180 t fired, .

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54 CTL EXCL 38/253 12/32 RwMutex-PT-r1000w0010-CTLFireability-15 1390982 m, 31295 m/sec, 5559155 t fired, .

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54 CTL EXCL 43/253 14/32 RwMutex-PT-r1000w0010-CTLFireability-15 1543209 m, 30445 m/sec, 6547260 t fired, .

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54 CTL EXCL 48/253 15/32 RwMutex-PT-r1000w0010-CTLFireability-15 1696232 m, 30604 m/sec, 7534313 t fired, .

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lola: FINISHED task # 33 (type EXCL) for RwMutex-PT-r1000w0010-CTLFireability-08
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r1000w0010-CTLFireability-00: AGAF false state space /EFEG
RwMutex-PT-r1000w0010-CTLFireability-06: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-08: CONJ 0 0 1 0 3 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 4/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 44073 m, 8814 m/sec, 44377 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-10: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 9/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 53700 m, 1925 m/sec, 54035 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL true CTL model checker
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31 CTL EXCL 14/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 60392 m, 1338 m/sec, 60747 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-10: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 19/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 66055 m, 1132 m/sec, 66426 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-10: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 24/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 71242 m, 1037 m/sec, 71627 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 29/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 76243 m, 1000 m/sec, 76641 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 34/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 81311 m, 1013 m/sec, 81722 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 39/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 86160 m, 969 m/sec, 86583 t fired, .

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31 CTL EXCL 44/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 91041 m, 976 m/sec, 91476 t fired, .

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31 CTL EXCL 49/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 96228 m, 1037 m/sec, 96676 t fired, .

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31 CTL EXCL 54/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 101449 m, 1044 m/sec, 101910 t fired, .

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31 CTL EXCL 59/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 106703 m, 1050 m/sec, 107177 t fired, .

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31 CTL EXCL 69/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 117971 m, 1129 m/sec, 118473 t fired, .

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31 CTL EXCL 74/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 123691 m, 1144 m/sec, 124207 t fired, .

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31 CTL EXCL 84/486 1/32 RwMutex-PT-r1000w0010-CTLFireability-08 136223 m, 1289 m/sec, 136770 t fired, .

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31 CTL EXCL 109/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 175617 m, 1841 m/sec, 176262 t fired, .

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31 CTL EXCL 134/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 218910 m, 890 m/sec, 219669 t fired, .

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31 CTL EXCL 139/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 223361 m, 890 m/sec, 224131 t fired, .

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31 CTL EXCL 144/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 227741 m, 876 m/sec, 228522 t fired, .

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31 CTL EXCL 149/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 232191 m, 890 m/sec, 232983 t fired, .

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31 CTL EXCL 154/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 236646 m, 891 m/sec, 237449 t fired, .

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31 CTL EXCL 159/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 241103 m, 891 m/sec, 241917 t fired, .

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31 CTL EXCL 164/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 256282 m, 3035 m/sec, 257194 t fired, .

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31 CTL EXCL 174/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 265182 m, 890 m/sec, 266116 t fired, .

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31 CTL EXCL 179/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 269636 m, 890 m/sec, 270581 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 199/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 287674 m, 887 m/sec, 288664 t fired, .

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31 CTL EXCL 204/486 2/32 RwMutex-PT-r1000w0010-CTLFireability-08 292111 m, 887 m/sec, 293112 t fired, .

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lola: FINISHED task # 31 (type EXCL) for RwMutex-PT-r1000w0010-CTLFireability-08
lola: result : false
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26 CTL EXCL 16/532 1/32 RwMutex-PT-r1000w0010-CTLFireability-07 44693 m, 2598 m/sec, 403749 t fired, .

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26 CTL EXCL 21/532 1/32 RwMutex-PT-r1000w0010-CTLFireability-07 57665 m, 2594 m/sec, 529661 t fired, .

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26 CTL EXCL 26/532 1/32 RwMutex-PT-r1000w0010-CTLFireability-07 70668 m, 2600 m/sec, 655065 t fired, .

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26 CTL EXCL 31/532 1/32 RwMutex-PT-r1000w0010-CTLFireability-07 83659 m, 2598 m/sec, 777747 t fired, .

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26 CTL EXCL 36/532 2/32 RwMutex-PT-r1000w0010-CTLFireability-07 96636 m, 2595 m/sec, 901781 t fired, .

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26 CTL EXCL 41/532 2/32 RwMutex-PT-r1000w0010-CTLFireability-07 108620 m, 2396 m/sec, 1020048 t fired, .

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26 CTL EXCL 51/532 2/32 RwMutex-PT-r1000w0010-CTLFireability-07 133559 m, 2450 m/sec, 1266394 t fired, .

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26 CTL EXCL 56/532 2/32 RwMutex-PT-r1000w0010-CTLFireability-07 144734 m, 2235 m/sec, 1371672 t fired, .

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26 CTL EXCL 76/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 194139 m, 2425 m/sec, 1882995 t fired, .

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26 CTL EXCL 86/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 219186 m, 2492 m/sec, 2123276 t fired, .

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26 CTL EXCL 91/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 231774 m, 2517 m/sec, 2248462 t fired, .

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26 CTL EXCL 96/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 244110 m, 2467 m/sec, 2376344 t fired, .

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26 CTL EXCL 101/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 256539 m, 2485 m/sec, 2504426 t fired, .

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26 CTL EXCL 106/532 3/32 RwMutex-PT-r1000w0010-CTLFireability-07 269105 m, 2513 m/sec, 2636514 t fired, .

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26 CTL EXCL 191/532 6/32 RwMutex-PT-r1000w0010-CTLFireability-07 478201 m, 2156 m/sec, 4783556 t fired, .

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RwMutex-PT-r1000w0010-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r1000w0010-CTLFireability-01: DISJ 0 1 0 0 3 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 CTL EXCL 257/532 7/32 RwMutex-PT-r1000w0010-CTLFireability-07 619761 m, 2030 m/sec, 6211155 t fired, .

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/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 371 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r1000w0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RwMutex-PT-r1000w0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r358-smll-167891807400186"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r1000w0010.tgz
mv RwMutex-PT-r1000w0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;