MCC'2023- Execution of r358-smll-167891807100058

About the Execution of LoLA for RobotManipulation-PT-00200

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
4621.487	3600000.00	261084.00	9907.20	???TTTT????TFFFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r358-smll-1
Waiting for the VM to be ready (probing ssh)
.............................................
.......................
.............................................
.............................................
=============================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RobotManipulation-PT-00200,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r358-smll-167891
=============================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 408K
-rw-r--r-- 1 mcc users 6.3K Feb 26 05:33
-rw-r--r-- 1 mcc users 61K Feb 26 05:33
-rw-r--r-- 1 mcc users 5.7K Feb 26 05:32
-rw-r--r-- 1 mcc users 46K Feb 26 05:32
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:47
-rw-r--r-- 1 mcc users 25K Feb 25 16:47
-rw-r--r-- 1 mcc users 2.6K Feb 25 16:48
-rw-r--r-- 1 mcc users 17K Feb 25 16:48
-rw-r--r-- 1 mcc users 8.2K Feb 26 05:34
-rw-r--r-- 1 mcc users 74K Feb 26 05:34
-rw-r--r-- 1 mcc users 11K Feb 26 05:34
-rw-r--r-- 1 mcc users 78K Feb 26 05:34
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:48
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:48
-rw-r--r-- 1 mcc users 6 Mar 5 18:23
-rw-r--r-- 1 mcc users 6 Mar 5 18:23
-rw-r--r-- 1 mcc users 6 Mar 5 18:23
-rw-r--r-- 1 mcc users 6.4K Mar 5 18:23

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi
FORMULA_NAME RobotManipulation-PT-00200-CTLFi

=== Now, execution of the tool begins

BK_START 1678959025088

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RobotManipulation-PT-00200
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT RobotManipulation-PT-00200
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lol
current directory: /home/mcc/execution
CTLFireability

FORMULA RobotManipulation-PT-00200-CTLFireability-06

FORMULA RobotManipulation-PT-00200-CTLFireability-15

FORMULA RobotManipulation-PT-00200-CTLFireability-14

FORMULA RobotManipulation-PT-00200-CTLFireability-13

FORMULA RobotManipulation-PT-00200-CTLFireability-04

FORMULA RobotManipulation-PT-00200-CTLFireability-12

FORMULA RobotManipulation-PT-00200-CTLFireability-11

FORMULA RobotManipulation-PT-00200-CTLFireability-05

FORMULA RobotManipulation-PT-00200-CTLFireability-03
TIME LIMIT: Killed by timeout after
MemTotal: 16393216 kB
MemFree: 11598440 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16166380 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution/m
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execut
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: LAUNCH task # 4 (type EXCL)
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST)
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 28 (type CNST)
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewri
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: LAUNCH task # 100 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
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lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: FINISHED task # 106 (type SRCH)
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: FINISHED task # 100 (type FNDP)
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: result : true
lola: fired transitions : 400
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 101 (type EQUN)
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
lola: rewrite Frontend/Parser/formula_rewri
sara: try reading problem file /home/mcc/exec

lola: FINISHED task # 101 (type EQUN)
lola: result : true
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RobotManipulation-PT-00200-CTLFireability-09: AGEFAG
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======================== examination is CTLFireability 807100058 ======================== CTLCardinality.txt CTLCardinality.xml CTLFireability.txt CTLFireability.xml GenericPropertiesDefinition.xml GenericPropertiesVerdict.xml LTLCardinality.txt LTLCardinality.xml LTLFireability.txt LTLFireability.xml ReachabilityCardinality.txt ReachabilityCardinality.xml ReachabilityFireability.txt ReachabilityFireability.xml UpperBounds.txt UpperBounds.xml equiv_col instance iscolored model.pnml by BenchKit (invocation template) result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N a/bin/ TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT 3600 seconds model.pnml net odel.pnml ion/CTLFireability.xml te.k:457 te.k:322 te.k:328 te.k:296 te.k:322 te.k:328 te.k:325 te.k:331 te.k:322 te.k:334 te.k:296 te.k:451 te.k:391 te.k:322 te.k:334 te.k:296 te.k:391 te.k:469 te.k:322 te.k:337 te.k:296 te.k:296 te.k:314 te.k:317 te.k:296 te.k:325 te.k:334 te.k:296 te.k:325 te.k:340 te.k:299 te.k:299 te.k:478 te.k:472 te.k:325 te.k:331 te.k:296 te.k:463 te.k:415 te.k:147 te.k:296 te.k:322 te.k:328 te.k:296 te.k:325 te.k:334 te.k:296 te.k:250 te.k:250 te.k:250 te.k:322 te.k:334 te.k:296 te.k:250 te.k:250 te.k:250 te.k:250 te.k:550 te.k:550 te.k:550 te.k:550 te.k:550 te.k:550 te.k:448 te.k:250 te.k:250 te.k:250 te.k:250 te.k:250 te.k:250 te.k:415 te.k:147 te.k:400 te.k:325 te.k:331 te.k:314 te.k:296 te.k:325 te.k:331 te.k:296 te.k:391 te.k:322 te.k:331 te.k:325 te.k:334 te.k:296 te.k:322 te.k:337 te.k:296 te.k:296 te.k:325 te.k:337 te.k:296 te.k:296 te.k:325 te.k:328 te.k:296 te.k:314 te.k:322 te.k:334 te.k:322 te.k:328 te.k:296 te.k:325 te.k:334 te.k:296 te.k:325 te.k:331 te.k:314 te.k:322 te.k:334 te.k:322 te.k:331 te.k:299 te.k:317 te.k:325 te.k:334 te.k:325 te.k:331 te.k:299 te.k:322 te.k:334 te.k:299 places removed te.k:807 te.k:813 te.k:806 te.k:813 te.k:811 te.k:811 te.k:809 te.k:811 for 3 RobotManipulation-PT-00200-CTLFireability-01 for 25 RobotManipulation-PT-00200-CTLFireability-07 for RobotManipulation-PT-00200-CTLFireability-07 te.k:812 te.k:806 te.k:811 te.k:806 te.k:813 te.k:808 te.k:814 te.k:808 te.k:812 te.k:806 te.k:813 te.k:811 te.k:813 te.k:814 te.k:809 te.k:813 te.k:806 te.k:812 te.k:814 te.k:811 te.k:806 te.k:812 te.k:813 te.k:753 te.k:787 te.k:814 te.k:813 te.k:807 te.k:811 te.k:809 te.k:813 te.k:814 te.k:809 te.k:811 te.k:721 te.k:787 te.k:749 te.k:787 te.k:754 te.k:787 te.k:812 te.k:812 te.k:753 te.k:787 te.k:807 te.k:812 te.k:812 te.k:808 te.k:721 te.k:787 te.k:679 te.k:679 te.k:721 te.k:787 te.k:746 te.k:788 te.k:812 for 18 RobotManipulation-PT-00200-CTLFireability-06 for 18 RobotManipulation-PT-00200-CTLFireability-06 for 18 RobotManipulation-PT-00200-CTLFireability-06 te.k:810 te.k:815 te.k:807 te.k:808 te.k:811 te.k:811 te.k:808 te.k:807 te.k:813 te.k:812 te.k:807 te.k:813 te.k:721 te.k:787 for RobotManipulation-PT-00200-CTLFireability-06 te.k:806 te.k:808 for RobotManipulation-PT-00200-CTLFireability-06 te.k:754 te.k:787 te.k:806 te.k:809 te.k:808 for RobotManipulation-PT-00200-CTLFireability-06 (obsolete) te.k:813 te.k:807 te.k:809 te.k:814 te.k:811 te.k:808 te.k:814 te.k:814 ution/CTLFireability-101.sara. for RobotManipulation-PT-00200-CTLFireability-06 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 RobotManipulation-PT-00200-CTLFireability-01 961774 m, 192354 m/sec, 4861309 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 RobotManipulation-PT-00200-CTLFireability-01 1864060 m, 180457 m/sec, 9638715 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 2732868 m, 173761 m/sec, 14309341 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 3568158 m, 167058 m/sec, 18833093 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 4344920 m, 155352 m/sec, 23072600 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 5035408 m, 138097 m/sec, 26871039 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 5726349 m, 138188 m/sec, 30667325 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 6426120 m, 139954 m/sec, 34535306 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-01 7121355 m, 139047 m/sec, 38381796 t fired, . for RobotManipulation-PT-00200-CTLFireability-01 (memory limit exceeded) VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 5 0 0 1 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 10 0 0 10 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 48 RobotManipulation-PT-00200-CTLFireability-12 for RobotManipulation-PT-00200-CTLFireability-12 for 18 RobotManipulation-PT-00200-CTLFireability-06 for RobotManipulation-PT-00200-CTLFireability-06 for 93 RobotManipulation-PT-00200-CTLFireability-15 for RobotManipulation-PT-00200-CTLFireability-15 for 90 RobotManipulation-PT-00200-CTLFireability-14 for RobotManipulation-PT-00200-CTLFireability-14 for 87 RobotManipulation-PT-00200-CTLFireability-13 for RobotManipulation-PT-00200-CTLFireability-13 for 48 RobotManipulation-PT-00200-CTLFireability-12 for RobotManipulation-PT-00200-CTLFireability-12 for 42 RobotManipulation-PT-00200-CTLFireability-10 VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-10 2319882 m, 463976 m/sec, 4319884 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-10 5063336 m, 548690 m/sec, 9792566 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-10 7660473 m, 519427 m/sec, 14972633 t fired, . for RobotManipulation-PT-00200-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS for 36 RobotManipulation-PT-00200-CTLFireability-08 VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS 5/32 RobotManipulation-PT-00200-CTLFireability-08 1170056 m, 234011 m/sec, 5330390 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS 9/32 RobotManipulation-PT-00200-CTLFireability-08 2072501 m, 180489 m/sec, 9766682 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 2999249 m, 185349 m/sec, 14351603 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 3889407 m, 178031 m/sec, 18835831 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 4758286 m, 173775 m/sec, 23242262 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 5573075 m, 162957 m/sec, 27414614 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 6359281 m, 157241 m/sec, 31510719 t fired, . VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-08 7130376 m, 154219 m/sec, 35479593 t fired, . for RobotManipulation-PT-00200-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS for 12 RobotManipulation-PT-00200-CTLFireability-04 for RobotManipulation-PT-00200-CTLFireability-04 for 0 RobotManipulation-PT-00200-CTLFireability-00 VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS 6/32 RobotManipulation-PT-00200-CTLFireability-00 1396840 m, 279368 m/sec, 4230530 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-00 2483806 m, 217393 m/sec, 8096942 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-00 3696188 m, 242476 m/sec, 12409179 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-00 4817645 m, 224291 m/sec, 16478574 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-00 5899058 m, 216282 m/sec, 20426515 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-00 6976691 m, 215526 m/sec, 24353972 t fired, . for RobotManipulation-PT-00200-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS for 39 RobotManipulation-PT-00200-CTLFireability-09 VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-09 3696636 m, 739327 m/sec, 6471776 t fired, . VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-09 6979445 m, 656561 m/sec, 12201724 t fired, . for RobotManipulation-PT-00200-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker DISJ true state space /EXEG CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 7 MEM PG/PGLIMIT FORMULA STATUS for 25 RobotManipulation-PT-00200-CTLFireability-07 for RobotManipulation-PT-00200-CTLFireability-07 for 48 RobotManipulation-PT-00200-CTLFireability-12 for RobotManipulation-PT-00200-CTLFireability-12 for 45 RobotManipulation-PT-00200-CTLFireability-11 for RobotManipulation-PT-00200-CTLFireability-11 for 15 RobotManipulation-PT-00200-CTLFireability-05 for RobotManipulation-PT-00200-CTLFireability-05 for 9 RobotManipulation-PT-00200-CTLFireability-03 for RobotManipulation-PT-00200-CTLFireability-03 for 25 RobotManipulation-PT-00200-CTLFireability-07 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 RobotManipulation-PT-00200-CTLFireability-07 1161246 m, 232249 m/sec, 5924772 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 2269920 m, 221734 m/sec, 12877448 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 3264285 m, 198873 m/sec, 19182580 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 4237291 m, 194601 m/sec, 25510610 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 5127494 m, 178040 m/sec, 31749329 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 6268409 m, 228183 m/sec, 38520634 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-07 7207061 m, 187730 m/sec, 44736998 t fired, . for RobotManipulation-PT-00200-CTLFireability-07 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS for 6 RobotManipulation-PT-00200-CTLFireability-02 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 RobotManipulation-PT-00200-CTLFireability-02 1003116 m, 200623 m/sec, 5884638 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 RobotManipulation-PT-00200-CTLFireability-02 1904817 m, 180340 m/sec, 11094069 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 2767399 m, 172516 m/sec, 16049721 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 3618707 m, 170261 m/sec, 20930121 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 4464611 m, 169180 m/sec, 25762026 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 5334197 m, 173917 m/sec, 30725574 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 6194730 m, 172106 m/sec, 35626016 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS RobotManipulation-PT-00200-CTLFireability-02 7048011 m, 170656 m/sec, 40491903 t fired, . for RobotManipulation-PT-00200-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker DISJ true state space /EXEG CTL true CTL model checker DISJ false DISJ CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 ======

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RobotManipulation-PT-00200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RobotManipulation-PT-00200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r358-smll-167891807100058"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RobotManipulation-PT-00200.tgz
mv RobotManipulation-PT-00200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;