fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r357-smll-167891806900692
Last Updated
May 14, 2023

About the Execution of ITS-Tools for SharedMemory-PT-000100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16218.884 3600000.00 1860938.00 1655765.80 FFT????T?F?????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r357-smll-167891806900692.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool itstools
Input is SharedMemory-PT-000100, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-smll-167891806900692
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 151M
-rw-r--r-- 1 mcc users 3.9M Feb 26 00:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15M Feb 26 00:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2M Feb 25 22:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 12M Feb 25 22:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 849K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.3M Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2M Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3M Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.0M Feb 26 08:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33M Feb 26 08:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11M Feb 26 04:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41M Feb 26 04:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 11M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-00
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-01
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-02
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-03
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-04
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-05
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-06
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-07
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-08
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-09
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-10
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-11
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-12
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-13
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-14
FORMULA_NAME SharedMemory-PT-000100-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679383131462

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-PT-000100
Not applying reductions.
Model is PT
LTLFireability PT
Running Version 202303021504
[2023-03-21 07:18:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2023-03-21 07:18:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 07:18:55] [INFO ] Load time of PNML (sax parser for PT used): 930 ms
[2023-03-21 07:18:55] [INFO ] Transformed 10301 places.
[2023-03-21 07:18:55] [INFO ] Transformed 20100 transitions.
[2023-03-21 07:18:55] [INFO ] Found NUPN structural information;
[2023-03-21 07:18:55] [INFO ] Completing missing partition info from NUPN : creating a component with [Ext_Mem_Acc_57_1, Ext_Mem_Acc_56_1, Ext_Mem_Acc_19_2, Ext_Mem_Acc_18_2, Ext_Mem_Acc_72_2, Ext_Mem_Acc_63_2, Ext_Mem_Acc_11_3, Ext_Mem_Acc_12_3, Ext_Mem_Acc_64_3, Ext_Mem_Acc_61_3, Ext_Mem_Acc_49_4, Ext_Mem_Acc_48_4, Ext_Mem_Acc_12_5, Ext_Mem_Acc_17_5, Ext_Mem_Acc_22_5, Ext_Mem_Acc_21_5, Ext_Mem_Acc_95_5, Ext_Mem_Acc_98_5, Ext_Mem_Acc_28_6, Ext_Mem_Acc_29_6, Ext_Mem_Acc_41_7, Ext_Mem_Acc_80_6, Ext_Mem_Acc_2_8, Ext_Mem_Acc_99_7, Ext_Mem_Acc_47_8, Ext_Mem_Acc_46_8, Ext_Mem_Acc_23_9, Ext_Mem_Acc_26_9, Ext_Mem_Acc_84_8, Ext_Mem_Acc_85_8, Ext_Mem_Acc_39_9, Ext_Mem_Acc_40_9, Ext_Mem_Acc_28_10, Ext_Mem_Acc_29_10, Ext_Mem_Acc_3_11, Ext_Mem_Acc_2_11, Ext_Mem_Acc_99_11, Ext_Mem_Acc_100_11, Ext_Mem_Acc_42_11, Ext_Mem_Acc_43_11, Ext_Mem_Acc_95_11, Ext_Mem_Acc_94_11, Ext_Mem_Acc_73_13, Ext_Mem_Acc_72_13, Ext_Mem_Acc_91_12, Ext_Mem_Acc_92_12, Ext_Mem_Acc_71_14, Ext_Mem_Acc_68_14, Ext_Mem_Acc_22_14, Ext_Mem_Acc_21_14, Ext_Mem_Acc_25_14, Ext_Mem_Acc_26_14, Ext_Mem_Acc_43_16, Ext_Mem_Acc_44_16, Ext_Mem_Acc_69_15, Ext_Mem_Acc_70_15, Ext_Mem_Acc_71_17, Ext_Mem_Acc_78_17, Ext_Mem_Acc_90_16, Ext_Mem_Acc_91_16, Ext_Mem_Acc_73_16, Ext_Mem_Acc_72_16, Ext_Mem_Acc_59_18, Ext_Mem_Acc_58_18, Ext_Mem_Acc_86_17, Ext_Mem_Acc_85_17, Ext_Mem_Acc_19_20, Ext_Mem_Acc_21_20, Ext_Mem_Acc_64_19, Ext_Mem_Acc_63_19, Ext_Mem_Acc_8_19, Ext_Mem_Acc_9_19, Ext_Mem_Acc_3_21, Ext_Mem_Acc_2_21, Ext_Mem_Acc_54_20, Ext_Mem_Acc_55_20, Ext_Mem_Acc_99_22, Ext_Mem_Acc_98_22, Ext_Mem_Acc_79_23, Ext_Mem_Acc_80_23, Ext_Mem_Acc_86_21, Ext_Mem_Acc_85_21, Ext_Mem_Acc_3_22, Ext_Mem_Acc_4_22, Ext_Mem_Acc_93_22, Ext_Mem_Acc_92_22, Ext_Mem_Acc_75_25, Ext_Mem_Acc_76_25, Ext_Mem_Acc_48_26, Ext_Mem_Acc_49_26, Ext_Mem_Acc_30_24, Ext_Mem_Acc_31_24, Ext_Mem_Acc_85_24, Ext_Mem_Acc_84_24, Ext_Mem_Acc_33_25, Ext_Mem_Acc_34_25, Ext_Mem_Acc_43_28, Ext_Mem_Acc_44_28, Ext_Mem_Acc_25_29, Ext_Mem_Acc_24_29, Ext_Mem_Acc_48_27, Ext_Mem_Acc_47_27, Ext_Mem_Acc_92_26, Ext_Mem_Acc_93_26, Ext_Mem_Acc_49_27, Ext_Mem_Acc_50_27, Ext_Mem_Acc_83_30, Ext_Mem_Acc_82_30, Ext_Mem_Acc_85_31, Ext_Mem_Acc_86_31, Ext_Mem_Acc_83_29, Ext_Mem_Acc_84_29, Ext_Mem_Acc_40_30, Ext_Mem_Acc_41_30, Ext_Mem_Acc_31_30, Ext_Mem_Acc_29_30, Ext_Mem_Acc_58_34, Ext_Mem_Acc_59_34, Ext_Mem_Acc_41_33, Ext_Mem_Acc_44_33, Ext_Mem_Acc_85_32, Ext_Mem_Acc_84_32, Ext_Mem_Acc_28_32, Ext_Mem_Acc_27_32, Ext_Mem_Acc_46_32, Ext_Mem_Acc_47_32, Ext_Mem_Acc_98_36, Ext_Mem_Acc_1_37, Ext_Mem_Acc_20_36, Ext_Mem_Acc_17_36, Ext_Mem_Acc_56_35, Ext_Mem_Acc_55_35, Ext_Mem_Acc_74_34, Ext_Mem_Acc_75_34, Ext_Mem_Acc_9_35, Ext_Mem_Acc_8_35, Ext_Mem_Acc_41_39, Ext_Mem_Acc_42_39, Ext_Mem_Acc_68_38, Ext_Mem_Acc_69_38, Ext_Mem_Acc_29_38, Ext_Mem_Acc_30_38, Ext_Mem_Acc_74_37, Ext_Mem_Acc_73_37, Ext_Mem_Acc_18_37, Ext_Mem_Acc_19_37, Ext_Mem_Acc_89_41, Ext_Mem_Acc_90_41, Ext_Mem_Acc_9_41, Ext_Mem_Acc_8_41, Ext_Mem_Acc_91_40, Ext_Mem_Acc_90_40, Ext_Mem_Acc_9_40, Ext_Mem_Acc_10_40, Ext_Mem_Acc_42_45, Ext_Mem_Acc_43_45, Ext_Mem_Acc_94_44, Ext_Mem_Acc_1_45, Ext_Mem_Acc_76_45, Ext_Mem_Acc_89_45, Ext_Mem_Acc_59_46, Ext_Mem_Acc_60_46, Ext_Mem_Acc_38_47, Ext_Mem_Acc_32_47, Ext_Mem_Acc_68_42, Ext_Mem_Acc_75_42, Ext_Mem_Acc_59_42, Ext_Mem_Acc_60_42, Ext_Mem_Acc_14_43, Ext_Mem_Acc_9_43, Ext_Mem_Acc_17_44, Ext_Mem_Acc_73_43, Ext_Mem_Acc_90_44, Ext_Mem_Acc_89_44, Ext_Mem_Acc_28_50, Ext_Mem_Acc_41_50, Ext_Mem_Acc_58_50, Ext_Mem_Acc_53_50, Ext_Mem_Acc_39_51, Ext_Mem_Acc_9_51, Ext_Mem_Acc_3_52, Ext_Mem_Acc_98_51, Ext_Mem_Acc_18_52, Ext_Mem_Acc_7_52, Ext_Mem_Acc_67_47, Ext_Mem_Acc_62_47, Ext_Mem_Acc_10_48, Ext_Mem_Acc_18_48, Ext_Mem_Acc_66_48, Ext_Mem_Acc_67_48, Ext_Mem_Acc_22_49, Ext_Mem_Acc_23_49, Ext_Mem_Acc_66_49, Ext_Mem_Acc_65_49, Ext_Mem_Acc_43_56, Ext_Mem_Acc_44_56, Ext_Mem_Acc_87_55, Ext_Mem_Acc_88_55, Ext_Mem_Acc_42_55, Ext_Mem_Acc_41_55, Ext_Mem_Acc_53_57, Ext_Mem_Acc_52_57, Ext_Mem_Acc_2_57, Ext_Mem_Acc_3_57, Ext_Mem_Acc_97_53, Ext_Mem_Acc_98_53, Ext_Mem_Acc_17_53, Ext_Mem_Acc_16_53, Ext_Mem_Acc_86_52, Ext_Mem_Acc_87_52, Ext_Mem_Acc_72_54, Ext_Mem_Acc_73_54, Ext_Mem_Acc_99_53, Ext_Mem_Acc_100_53, Ext_Mem_Acc_25_61, Ext_Mem_Acc_24_61, Ext_Mem_Acc_68_60, Ext_Mem_Acc_69_60, Ext_Mem_Acc_79_60, Ext_Mem_Acc_78_60, Ext_Mem_Acc_72_62, Ext_Mem_Acc_73_62, Ext_Mem_Acc_24_62, Ext_Mem_Acc_23_62, Ext_Mem_Acc_68_58, Ext_Mem_Acc_69_58, Ext_Mem_Acc_88_57, Ext_Mem_Acc_87_57, Ext_Mem_Acc_81_59, Ext_Mem_Acc_82_59, Ext_Mem_Acc_36_60, Ext_Mem_Acc_35_60, Ext_Mem_Acc_49_59, Ext_Mem_Acc_63_59, Ext_Mem_Acc_43_67, Ext_Mem_Acc_42_67, Ext_Mem_Acc_91_67, Ext_Mem_Acc_92_67, Ext_Mem_Acc_98_65, Ext_Mem_Acc_97_65, Ext_Mem_Acc_83_65, Ext_Mem_Acc_84_65, Ext_Mem_Acc_40_66, Ext_Mem_Acc_39_66, Ext_Mem_Acc_70_64, Ext_Mem_Acc_71_64, Ext_Mem_Acc_42_65, Ext_Mem_Acc_43_65, Ext_Mem_Acc_56_63, Ext_Mem_Acc_57_63, Ext_Mem_Acc_15_63, Ext_Mem_Acc_14_63, Ext_Mem_Acc_95_63, Ext_Mem_Acc_96_63, Ext_Mem_Acc_55_72, Ext_Mem_Acc_56_72, Ext_Mem_Acc_3_73, Ext_Mem_Acc_2_73, Ext_Mem_Acc_93_70, Ext_Mem_Acc_92_70, Ext_Mem_Acc_38_71, Ext_Mem_Acc_39_71, Ext_Mem_Acc_94_71, Ext_Mem_Acc_95_71, Ext_Mem_Acc_9_70, Ext_Mem_Acc_8_70, Ext_Mem_Acc_16_70, Ext_Mem_Acc_17_70, Ext_Mem_Acc_45_68, Ext_Mem_Acc_46_68, Ext_Mem_Acc_61_68, Ext_Mem_Acc_2_69, Ext_Mem_Acc_18_69, Ext_Mem_Acc_25_69, Ext_Mem_Acc_92_77, Ext_Mem_Acc_5_78, Ext_Mem_Acc_85_77, Ext_Mem_Acc_88_77, Ext_Mem_Acc_96_76, Ext_Mem_Acc_22_77, Ext_Mem_Acc_39_76, Ext_Mem_Acc_42_76, Ext_Mem_Acc_26_76, Ext_Mem_Acc_15_76, Ext_Mem_Acc_62_75, Ext_Mem_Acc_57_75, Ext_Mem_Acc_13_75, Ext_Mem_Acc_85_74, Ext_Mem_Acc_48_74, Ext_Mem_Acc_47_74, Ext_Mem_Acc_99_73, Ext_Mem_Acc_100_73, Ext_Mem_Acc_38_73, Ext_Mem_Acc_41_73, Ext_Mem_Acc_52_83, Ext_Mem_Acc_53_83, Ext_Mem_Acc_67_82, Ext_Mem_Acc_79_82, Ext_Mem_Acc_4_82, Ext_Mem_Acc_9_82, Ext_Mem_Acc_22_81, Ext_Mem_Acc_21_81, Ext_Mem_Acc_69_81, Ext_Mem_Acc_62_81, Ext_Mem_Acc_10_81, Ext_Mem_Acc_84_80, Ext_Mem_Acc_37_80, Ext_Mem_Acc_36_80, Ext_Mem_Acc_35_79, Ext_Mem_Acc_34_79, Ext_Mem_Acc_76_78, Ext_Mem_Acc_77_78, Ext_Mem_Acc_90_78, Ext_Mem_Acc_89_78, Ext_Mem_Acc_72_89, Ext_Mem_Acc_71_89, Ext_Mem_Acc_93_88, Ext_Mem_Acc_90_88, Ext_Mem_Acc_33_91, Ext_Mem_Acc_34_91, Ext_Mem_Acc_51_90, Ext_Mem_Acc_54_90, Ext_Mem_Acc_63_92, Ext_Mem_Acc_62_92, Ext_Mem_Acc_18_92, Ext_Mem_Acc_19_92, Ext_Mem_Acc_76_91, Ext_Mem_Acc_79_91, Ext_Mem_Acc_80_93, Ext_Mem_Acc_79_93, Ext_Mem_Acc_24_93, Ext_Mem_Acc_23_93, Ext_Mem_Acc_40_84, Ext_Mem_Acc_37_84, Ext_Mem_Acc_98_84, Ext_Mem_Acc_1_85, Ext_Mem_Acc_18_84, Ext_Mem_Acc_19_84, Ext_Mem_Acc_12_86, Ext_Mem_Acc_11_86, Ext_Mem_Acc_32_85, Ext_Mem_Acc_33_85, Ext_Mem_Acc_25_87, Ext_Mem_Acc_24_87, Ext_Mem_Acc_38_87, Ext_Mem_Acc_39_87, Ext_Mem_Acc_92_86, Ext_Mem_Acc_65_86, Ext_Mem_Acc_85_88, Ext_Mem_Acc_86_88, Ext_Mem_Acc_72_87, Ext_Mem_Acc_75_87, Ext_Mem_Acc_61_99, Ext_Mem_Acc_62_99, Ext_Mem_Acc_42_99, Ext_Mem_Acc_41_99, Ext_Mem_Acc_93_99, Ext_Mem_Acc_16_100, Ext_Mem_Acc_76_100, Ext_Mem_Acc_73_100, Ext_Mem_Acc_51_94, Ext_Mem_Acc_52_94, Ext_Mem_Acc_95_94, Ext_Mem_Acc_93_94, Ext_Mem_Acc_51_95, Ext_Mem_Acc_50_95, Ext_Mem_Acc_100_95, Ext_Mem_Acc_8_96, Ext_Mem_Acc_56_96, Ext_Mem_Acc_49_96, Ext_Mem_Acc_26_97, Ext_Mem_Acc_17_97, Ext_Mem_Acc_37_97, Ext_Mem_Acc_30_97, Ext_Mem_Acc_26_98, Ext_Mem_Acc_95_97, Ext_Mem_Acc_82_98, Ext_Mem_Acc_75_98, Ext_Mem_Acc_91_98, Ext_Mem_Acc_7_99]
[2023-03-21 07:18:55] [INFO ] Parsed PT model containing 10301 places and 20100 transitions and 80000 arcs in 1223 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 479 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
FORMULA SharedMemory-PT-000100-LTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000100-LTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 10301 out of 10301 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 10301/10301 places, 20100/20100 transitions.
Applied a total of 0 rules in 125 ms. Remains 10301 /10301 variables (removed 0) and now considering 20100/20100 (removed 0) transitions.
// Phase 1: matrix 20100 rows 10301 cols
[2023-03-21 07:19:02] [INFO ] Computed 201 place invariants in 4036 ms
[2023-03-21 07:19:05] [INFO ] Implicit Places using invariants in 6842 ms returned []
Implicit Place search using SMT only with invariants took 6895 ms to find 0 implicit places.
[2023-03-21 07:19:05] [INFO ] Invariant cache hit.
[2023-03-21 07:19:08] [INFO ] Dead Transitions using invariants and state equation in 2463 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9493 ms. Remains : 10301/10301 places, 20100/20100 transitions.
Support contains 10301 out of 10301 places after structural reductions.
[2023-03-21 07:19:10] [INFO ] Flatten gal took : 1427 ms
[2023-03-21 07:19:15] [INFO ] Flatten gal took : 1374 ms
[2023-03-21 07:19:21] [INFO ] Input system was already deterministic with 20100 transitions.
Interrupted random walk after 5144 steps, including 1 resets, run timeout after 30001 ms. (steps per millisecond=0 ) properties seen 18
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-21 07:19:52] [INFO ] Invariant cache hit.
[2023-03-21 07:19:57] [INFO ] [Real]Absence check using 201 positive place invariants in 1064 ms returned sat
[2023-03-21 07:20:17] [INFO ] After 18724ms SMT Verify possible using state equation in real domain returned unsat :1 sat :2
[2023-03-21 07:20:17] [INFO ] After 18803ms SMT Verify possible using trap constraints in real domain returned unsat :1 sat :2
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-21 07:20:17] [INFO ] After 25117ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :2
Fused 4 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 1 ms.
Support contains 3 out of 10301 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 10301/10301 places, 20100/20100 transitions.
Drop transitions removed 9897 transitions
Trivial Post-agglo rules discarded 9897 transitions
Performed 9897 trivial Post agglomeration. Transition count delta: 9897
Iterating post reduction 0 with 9897 rules applied. Total rules applied 9897 place count 10301 transition count 10203
Discarding 291 places :
Also discarding 288 output transitions
Drop transitions removed 288 transitions
Remove reverse transitions (loop back) rule discarded transition t18460 and 291 places that fell out of Prefix Of Interest.
Drop transitions removed 9606 transitions
Ensure Unique test removed 285 transitions
Reduce isomorphic transitions removed 9891 transitions.
Graph (trivial) has 9 edges and 16 vertex of which 6 / 16 are part of one of the 3 SCC in 7 ms
Free SCC test removed 3 places
Iterating post reduction 1 with 9893 rules applied. Total rules applied 19790 place count 13 transition count 24
Drop transitions removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 19796 place count 13 transition count 18
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 19796 place count 13 transition count 15
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 19802 place count 10 transition count 15
Drop transitions removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 3 with 9 rules applied. Total rules applied 19811 place count 10 transition count 6
Ensure Unique test removed 3 places
Iterating post reduction 4 with 3 rules applied. Total rules applied 19814 place count 7 transition count 6
Applied a total of 19814 rules in 703 ms. Remains 7 /10301 variables (removed 10294) and now considering 6/20100 (removed 20094) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 704 ms. Remains : 7/10301 places, 6/20100 transitions.
Finished random walk after 29 steps, including 0 resets, run visited all 3 properties in 2 ms. (steps per millisecond=14 )
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
FORMULA SharedMemory-PT-000100-LTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X(X(X(p0)))&&F(p1)))'
Support contains 10100 out of 10301 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 10301/10301 places, 20100/20100 transitions.
Applied a total of 0 rules in 158 ms. Remains 10301 /10301 variables (removed 0) and now considering 20100/20100 (removed 0) transitions.
[2023-03-21 07:20:20] [INFO ] Invariant cache hit.
[2023-03-21 07:20:22] [INFO ] Implicit Places using invariants in 2361 ms returned []
Implicit Place search using SMT only with invariants took 2364 ms to find 0 implicit places.
[2023-03-21 07:20:22] [INFO ] Invariant cache hit.
[2023-03-21 07:20:24] [INFO ] Dead Transitions using invariants and state equation in 1990 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4519 ms. Remains : 10301/10301 places, 20100/20100 transitions.
Stuttering acceptance computed with spot in 396 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1), (NOT p0), (NOT p0), true]
Running random walk in product with property : SharedMemory-PT-000100-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=true, acceptance={} source=1 dest: 3}], [{ cond=(NOT p1), acceptance={} source=2 dest: 2}], [{ cond=true, acceptance={} source=3 dest: 4}], [{ cond=(NOT p0), acceptance={} source=4 dest: 5}], [{ cond=true, acceptance={} source=5 dest: 5}]], initial=0, aps=[p1:(AND (NEQ s1366 1) (NEQ s326 1) (NEQ s4486 1) (NEQ s2406 1) (NEQ s3446 1) (NEQ s7606 1) (NEQ s6566 1) (NEQ s5526 1) (NEQ s9345 1) (NEQ s7265 1) (NEQ s6...], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 11 steps with 2 reset in 15 ms.
FORMULA SharedMemory-PT-000100-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SharedMemory-PT-000100-LTLFireability-00 finished in 5122 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 10101 out of 10301 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 10301/10301 places, 20100/20100 transitions.
Applied a total of 0 rules in 63 ms. Remains 10301 /10301 variables (removed 0) and now considering 20100/20100 (removed 0) transitions.
[2023-03-21 07:20:25] [INFO ] Invariant cache hit.
[2023-03-21 07:20:27] [INFO ] Implicit Places using invariants in 2266 ms returned []
Implicit Place search using SMT only with invariants took 2267 ms to find 0 implicit places.
[2023-03-21 07:20:27] [INFO ] Invariant cache hit.
[2023-03-21 07:20:29] [INFO ] Dead Transitions using invariants and state equation in 2116 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4461 ms. Remains : 10301/10301 places, 20100/20100 transitions.
Stuttering acceptance computed with spot in 76 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SharedMemory-PT-000100-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (EQ s1366 0) (EQ s326 0) (EQ s4486 0) (EQ s2406 0) (EQ s3446 0) (EQ s7606 0) (EQ s6566 0) (EQ s5526 0) (EQ s9345 0) (EQ s7265 0) (EQ s6225 0) (EQ ...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration timeout after 1780 steps with 1 reset in 10082 ms.
Stack based approach found an accepted trace after 222 steps with 0 reset with depth 223 and stack size 223 in 101 ms.
FORMULA SharedMemory-PT-000100-LTLFireability-01 FALSE TECHNIQUES STACK_TEST
Treatment of property SharedMemory-PT-000100-LTLFireability-01 finished in 14951 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0 U p1)||G(F(p2))))'
Support contains 401 out of 10301 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 10301/10301 places, 20100/20100 transitions.
Applied a total of 0 rules in 4648 ms. Remains 10301 /10301 variables (removed 0) and now considering 20100/20100 (removed 0) transitions.
[2023-03-21 07:20:44] [INFO ] Invariant cache hit.
[2023-03-21 07:20:47] [INFO ] Implicit Places using invariants in 2191 ms returned []
Implicit Place search using SMT only with invariants took 2193 ms to find 0 implicit places.
[2023-03-21 07:20:47] [INFO ] Invariant cache hit.
[2023-03-21 07:20:49] [INFO ] Dead Transitions using invariants and state equation in 2170 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9014 ms. Remains : 10301/10301 places, 20100/20100 transitions.
Stuttering acceptance computed with spot in 165 ms :[(AND (NOT p1) (NOT p2)), (NOT p2), (NOT p2), (AND (NOT p1) (NOT p2))]
Running random walk in product with property : SharedMemory-PT-000100-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p1) p0), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0) (NOT p2)), acceptance={} source=0 dest: 1}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 2}, { cond=(AND (NOT p1) p0 (NOT p2)), acceptance={} source=0 dest: 3}], [{ cond=(NOT p2), acceptance={0} source=1 dest: 1}], [{ cond=(NOT p2), acceptance={} source=2 dest: 1}, { cond=true, acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p2)), acceptance={0} source=3 dest: 1}, { cond=(AND (NOT p1) p0 (NOT p2)), acceptance={0} source=3 dest: 3}]], initial=0, aps=[p1:(OR (AND (EQ s9425 1) (EQ s10285 1)) (AND (EQ s9365 1) (EQ s9688 1)) (AND (EQ s9422 1) (EQ s10251 1)) (AND (EQ s9430 1) (EQ s10290 1)) (AND (EQ s9418 1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][true, true, true, true]]
Product exploration timeout after 11420 steps with 4306 reset in 10014 ms.
Product exploration timeout after 11830 steps with 4493 reset in 10002 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) p0 (NOT p2)), (X (NOT (AND (NOT p1) p0 (NOT p2)))), (X (NOT (AND (NOT p1) (NOT p0) (NOT p2)))), (X (NOT (AND (NOT p1) (NOT p0)))), true, (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2))))), (X (X (NOT (AND (NOT p1) (NOT p0)))))]
False Knowledge obtained : [(X (NOT p2)), (X p2), (X (AND (NOT p1) p0)), (X (NOT (AND (NOT p1) p0))), (X (X (AND (NOT p1) p0 (NOT p2)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2))))), (X (X (NOT p2))), (X (X p2)), (X (X (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) p0))))]
Knowledge based reduction with 7 factoid took 659 ms. Reduced automaton from 4 states, 9 edges and 3 AP (stutter insensitive) to 4 states, 9 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 226 ms :[(AND (NOT p1) (NOT p2)), (NOT p2), (NOT p2), (AND (NOT p1) (NOT p2))]
Finished random walk after 410 steps, including 0 resets, run visited all 5 properties in 676 ms. (steps per millisecond=0 )
Knowledge obtained : [(AND (NOT p1) p0 (NOT p2)), (X (NOT (AND (NOT p1) p0 (NOT p2)))), (X (NOT (AND (NOT p1) (NOT p0) (NOT p2)))), (X (NOT (AND (NOT p1) (NOT p0)))), true, (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2))))), (X (X (NOT (AND (NOT p1) (NOT p0)))))]
False Knowledge obtained : [(X (NOT p2)), (X p2), (X (AND (NOT p1) p0)), (X (NOT (AND (NOT p1) p0))), (X (X (AND (NOT p1) p0 (NOT p2)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2))))), (X (X (NOT p2))), (X (X p2)), (X (X (AND (NOT p1) p0))), (X (X (NOT (AND (NOT p1) p0)))), (F p2), (F (NOT (AND (NOT p2) p0 (NOT p1)))), (F (NOT (AND p0 (NOT p1)))), (F (AND (NOT p0) (NOT p1))), (F (AND (NOT p2) (NOT p0) (NOT p1)))]
Knowledge based reduction with 7 factoid took 951 ms. Reduced automaton from 4 states, 9 edges and 3 AP (stutter insensitive) to 4 states, 9 edges and 3 AP (stutter insensitive).
Stuttering acceptance computed with spot in 207 ms :[(AND (NOT p1) (NOT p2)), (NOT p2), (NOT p2), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 210 ms :[(AND (NOT p1) (NOT p2)), (NOT p2), (NOT p2), (AND (NOT p1) (NOT p2))]
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 135364 kB
After kill :
MemTotal: 16393216 kB
MemFree: 138632 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000100"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool itstools"
echo " Input is SharedMemory-PT-000100, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-smll-167891806900692"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000100.tgz
mv SharedMemory-PT-000100 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;