Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r329-tall-167889202400722.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is ResAllocation-PT-R003C100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r329-tall-167889202400722
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 7.4K Feb 25 15:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 15:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 15:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 15:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 25 15:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 721K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679165991024

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R003C100
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-18 18:59:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-18 18:59:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 18:59:52] [INFO ] Load time of PNML (sax parser for PT used): 108 ms
[2023-03-18 18:59:52] [INFO ] Transformed 600 places.
[2023-03-18 18:59:52] [INFO ] Transformed 400 transitions.
[2023-03-18 18:59:52] [INFO ] Parsed PT model containing 600 places and 400 transitions and 1794 arcs in 178 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 196 out of 600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 600/600 places, 400/400 transitions.
Applied a total of 0 rules in 49 ms. Remains 600 /600 variables (removed 0) and now considering 400/400 (removed 0) transitions.
// Phase 1: matrix 400 rows 600 cols
[2023-03-18 18:59:53] [INFO ] Computed 300 place invariants in 18 ms
[2023-03-18 18:59:53] [INFO ] Implicit Places using invariants in 453 ms returned [595, 597, 599]
Discarding 3 places :
Implicit Place search using SMT only with invariants took 689 ms to find 3 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 597/600 places, 400/400 transitions.
Applied a total of 0 rules in 15 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 753 ms. Remains : 597/600 places, 400/400 transitions.
Support contains 196 out of 597 places after structural reductions.
[2023-03-18 18:59:53] [INFO ] Flatten gal took : 79 ms
[2023-03-18 18:59:54] [INFO ] Flatten gal took : 37 ms
[2023-03-18 18:59:54] [INFO ] Input system was already deterministic with 400 transitions.
Incomplete random walk after 10000 steps, including 48 resets, run finished after 598 ms. (steps per millisecond=16 ) properties (out of 87) seen :84
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 400 rows 597 cols
[2023-03-18 18:59:54] [INFO ] Computed 297 place invariants in 14 ms
[2023-03-18 18:59:55] [INFO ] [Real]Absence check using 297 positive place invariants in 42 ms returned sat
[2023-03-18 18:59:55] [INFO ] After 522ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-18 18:59:55] [INFO ] [Nat]Absence check using 297 positive place invariants in 39 ms returned sat
[2023-03-18 18:59:55] [INFO ] After 233ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-18 18:59:55] [INFO ] Deduced a trap composed of 4 places in 43 ms of which 5 ms to minimize.
[2023-03-18 18:59:55] [INFO ] Deduced a trap composed of 4 places in 45 ms of which 1 ms to minimize.
[2023-03-18 18:59:56] [INFO ] Deduced a trap composed of 4 places in 26 ms of which 1 ms to minimize.
[2023-03-18 18:59:56] [INFO ] Deduced a trap composed of 4 places in 28 ms of which 1 ms to minimize.
[2023-03-18 18:59:56] [INFO ] Deduced a trap composed of 4 places in 27 ms of which 3 ms to minimize.
[2023-03-18 18:59:56] [INFO ] Deduced a trap composed of 4 places in 23 ms of which 0 ms to minimize.
[2023-03-18 18:59:56] [INFO ] Trap strengthening (SAT) tested/added 7/6 trap constraints in 334 ms
[2023-03-18 18:59:56] [INFO ] After 657ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 64 ms.
[2023-03-18 18:59:56] [INFO ] After 897ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Fused 3 Parikh solutions to 1 different solutions.
Finished Parikh walk after 108 steps, including 0 resets, run visited all 3 properties in 4 ms. (steps per millisecond=27 )
Parikh walk visited 3 properties in 6 ms.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 28 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 29 ms
[2023-03-18 18:59:56] [INFO ] Input system was already deterministic with 400 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 9 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 23 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 23 ms
[2023-03-18 18:59:56] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 10 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 20 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 21 ms
[2023-03-18 18:59:56] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 12 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 18 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 18 ms
[2023-03-18 18:59:56] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 65 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 65 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 11 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 12 ms
[2023-03-18 18:59:56] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 48 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 12 ms
[2023-03-18 18:59:56] [INFO ] Flatten gal took : 12 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 17 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 8 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 22 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 8 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 1 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 29 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 11 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 12 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 6 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 7 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 89 Post agglomeration using F-continuation condition.Transition count delta: 89
Deduced a syphon composed of 89 places in 0 ms
Reduce places removed 89 places and 0 transitions.
Iterating global reduction 0 with 178 rules applied. Total rules applied 178 place count 508 transition count 311
Applied a total of 178 rules in 21 ms. Remains 508 /597 variables (removed 89) and now considering 311/400 (removed 89) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 508/597 places, 311/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 10 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 11 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 311 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 16 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 13 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 14 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 14 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 15 ms
[2023-03-18 18:59:57] [INFO ] Input system was already deterministic with 400 transitions.
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 17 ms
[2023-03-18 18:59:57] [INFO ] Flatten gal took : 17 ms
[2023-03-18 18:59:57] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-18 18:59:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 597 places, 400 transitions and 1788 arcs took 3 ms.
Total runtime 5465 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/481/ctl_0_ --ctl=/tmp/481/ctl_1_ --ctl=/tmp/481/ctl_2_ --ctl=/tmp/481/ctl_3_ --ctl=/tmp/481/ctl_4_ --ctl=/tmp/481/ctl_5_ --ctl=/tmp/481/ctl_6_ --ctl=/tmp/481/ctl_7_ --ctl=/tmp/481/ctl_8_ --ctl=/tmp/481/ctl_9_ --ctl=/tmp/481/ctl_10_ --ctl=/tmp/481/ctl_11_ --ctl=/tmp/481/ctl_12_ --ctl=/tmp/481/ctl_13_ --ctl=/tmp/481/ctl_14_ --ctl=/tmp/481/ctl_15_ --mu-par --mu-opt
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-00
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-01
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-02
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-03
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-04
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-05
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-06
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-07
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-08
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-09
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-10
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-11
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-12
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-13
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-14
Could not compute solution for formula : ResAllocation-PT-R003C100-CTLFireability-15

BK_STOP 1679165999585

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name ResAllocation-PT-R003C100-CTLFireability-00
ctl formula formula --ctl=/tmp/481/ctl_0_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-01
ctl formula formula --ctl=/tmp/481/ctl_1_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-02
ctl formula formula --ctl=/tmp/481/ctl_2_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-03
ctl formula formula --ctl=/tmp/481/ctl_3_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-04
ctl formula formula --ctl=/tmp/481/ctl_4_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-05
ctl formula formula --ctl=/tmp/481/ctl_5_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-06
ctl formula formula --ctl=/tmp/481/ctl_6_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-07
ctl formula formula --ctl=/tmp/481/ctl_7_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-08
ctl formula formula --ctl=/tmp/481/ctl_8_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-09
ctl formula formula --ctl=/tmp/481/ctl_9_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-10
ctl formula formula --ctl=/tmp/481/ctl_10_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-11
ctl formula formula --ctl=/tmp/481/ctl_11_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-12
ctl formula formula --ctl=/tmp/481/ctl_12_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-13
ctl formula formula --ctl=/tmp/481/ctl_13_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-14
ctl formula formula --ctl=/tmp/481/ctl_14_
ctl formula name ResAllocation-PT-R003C100-CTLFireability-15
ctl formula formula --ctl=/tmp/481/ctl_15_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 597 places, 400 transitions and 1788 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.010 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 400->200 groups
pnml2lts-sym: Regrouping took 0.080 real 0.080 user 0.000 sys
pnml2lts-sym: state vector length is 597; there are 200 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 2680 group checks and 0 next state calls
pnml2lts-sym: reachability took 0.270 real 0.950 user 0.140 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.010 real 0.010 user 0.000 sys
pnml2lts-sym: state space has 1.41951197160194e+57 states, 5336 nodes
double free or corruption (out)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is ResAllocation-PT-R003C100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r329-tall-167889202400722"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C100.tgz
mv ResAllocation-PT-R003C100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;