About the Execution of LoLa+red for RingSingleMessageInMbox-PT-d0m080
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2419.943 | 128349.00 | 126838.00 | 923.10 | F?F?FTFF??FFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200100818.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RingSingleMessageInMbox-PT-d0m080, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200100818
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 532K
-rw-r--r-- 1 mcc users 7.7K Feb 26 05:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 26 05:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 26 05:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 26 05:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 05:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 134K Feb 26 05:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 26 05:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 86K Feb 26 05:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 64K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-00
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-01
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-02
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-03
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-04
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-05
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-06
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-07
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-08
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-09
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-10
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-11
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-12
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-13
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-14
FORMULA_NAME RingSingleMessageInMbox-PT-d0m080-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679058500975
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RingSingleMessageInMbox-PT-d0m080
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 13:08:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 13:08:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 13:08:22] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-17 13:08:22] [INFO ] Transformed 385 places.
[2023-03-17 13:08:22] [INFO ] Transformed 59 transitions.
[2023-03-17 13:08:22] [INFO ] Parsed PT model containing 385 places and 59 transitions and 236 arcs in 100 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Deduced a syphon composed of 329 places in 1 ms
Reduce places removed 329 places and 0 transitions.
Support contains 50 out of 56 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 59/59 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 54 transition count 59
Applied a total of 2 rules in 10 ms. Remains 54 /56 variables (removed 2) and now considering 59/59 (removed 0) transitions.
// Phase 1: matrix 59 rows 54 cols
[2023-03-17 13:08:22] [INFO ] Computed 3 place invariants in 11 ms
[2023-03-17 13:08:22] [INFO ] Implicit Places using invariants in 152 ms returned []
[2023-03-17 13:08:22] [INFO ] Invariant cache hit.
[2023-03-17 13:08:22] [INFO ] State equation strengthened by 27 read => feed constraints.
[2023-03-17 13:08:22] [INFO ] Implicit Places using invariants and state equation in 78 ms returned []
Implicit Place search using SMT with State Equation took 254 ms to find 0 implicit places.
[2023-03-17 13:08:22] [INFO ] Invariant cache hit.
[2023-03-17 13:08:22] [INFO ] Dead Transitions using invariants and state equation in 60 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 54/56 places, 59/59 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 326 ms. Remains : 54/56 places, 59/59 transitions.
Support contains 50 out of 54 places after structural reductions.
[2023-03-17 13:08:23] [INFO ] Flatten gal took : 21 ms
[2023-03-17 13:08:23] [INFO ] Flatten gal took : 9 ms
[2023-03-17 13:08:23] [INFO ] Input system was already deterministic with 59 transitions.
Incomplete random walk after 10000 steps, including 2168 resets, run finished after 454 ms. (steps per millisecond=22 ) properties (out of 63) seen :32
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 47 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 53 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 105 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 31) seen :1
Incomplete Best-First random walk after 1001 steps, including 88 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1000 steps, including 200 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 30) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 30) seen :1
Incomplete Best-First random walk after 1001 steps, including 50 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 53 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 99 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 48 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 106 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 29) seen :0
Incomplete Best-First random walk after 1001 steps, including 46 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 29) seen :2
Incomplete Best-First random walk after 1001 steps, including 76 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 99 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 159 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 97 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 47 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 54 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 41 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 42 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 76 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 82 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 41 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 29 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 101 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 27) seen :0
Running SMT prover for 27 properties.
[2023-03-17 13:08:23] [INFO ] Invariant cache hit.
[2023-03-17 13:08:24] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:24] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:24] [INFO ] After 129ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:22
[2023-03-17 13:08:24] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:24] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:24] [INFO ] After 103ms SMT Verify possible using state equation in natural domain returned unsat :12 sat :15
[2023-03-17 13:08:24] [INFO ] State equation strengthened by 27 read => feed constraints.
[2023-03-17 13:08:24] [INFO ] After 81ms SMT Verify possible using 27 Read/Feed constraints in natural domain returned unsat :12 sat :15
[2023-03-17 13:08:24] [INFO ] Deduced a trap composed of 27 places in 33 ms of which 4 ms to minimize.
[2023-03-17 13:08:24] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 39 ms
[2023-03-17 13:08:24] [INFO ] After 233ms SMT Verify possible using trap constraints in natural domain returned unsat :12 sat :15
Attempting to minimize the solution found.
Minimization took 66 ms.
[2023-03-17 13:08:24] [INFO ] After 488ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :15
Fused 27 Parikh solutions to 13 different solutions.
Parikh walk visited 0 properties in 110 ms.
Support contains 18 out of 54 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 51 transition count 54
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 51 transition count 54
Applied a total of 6 rules in 9 ms. Remains 51 /54 variables (removed 3) and now considering 54/59 (removed 5) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 9 ms. Remains : 51/54 places, 54/59 transitions.
Incomplete random walk after 10000 steps, including 2138 resets, run finished after 151 ms. (steps per millisecond=66 ) properties (out of 15) seen :5
Incomplete Best-First random walk after 10001 steps, including 532 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2000 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 495 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 457 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 10) seen :4
Incomplete Best-First random walk after 10001 steps, including 961 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10001 steps, including 514 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 951 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
// Phase 1: matrix 54 rows 51 cols
[2023-03-17 13:08:25] [INFO ] Computed 3 place invariants in 2 ms
[2023-03-17 13:08:25] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:25] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:25] [INFO ] After 150ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-17 13:08:25] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:25] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:25] [INFO ] After 40ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-17 13:08:25] [INFO ] State equation strengthened by 24 read => feed constraints.
[2023-03-17 13:08:25] [INFO ] After 32ms SMT Verify possible using 24 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-03-17 13:08:25] [INFO ] Deduced a trap composed of 27 places in 32 ms of which 0 ms to minimize.
[2023-03-17 13:08:25] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 44 ms
[2023-03-17 13:08:25] [INFO ] After 112ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 33 ms.
[2023-03-17 13:08:25] [INFO ] After 242ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Parikh walk visited 0 properties in 78 ms.
Support contains 9 out of 51 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 51/51 places, 54/54 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 50 transition count 53
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 50 transition count 53
Applied a total of 2 rules in 9 ms. Remains 50 /51 variables (removed 1) and now considering 53/54 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 9 ms. Remains : 50/51 places, 53/54 transitions.
Incomplete random walk after 10000 steps, including 2123 resets, run finished after 90 ms. (steps per millisecond=111 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 469 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 483 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 850 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 499 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 914 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 5) seen :0
Interrupted probabilistic random walk after 3582356 steps, run timeout after 3001 ms. (steps per millisecond=1193 ) properties seen :{0=1, 2=1, 3=1, 4=1}
Probabilistic random walk after 3582356 steps, saw 1376678 distinct states, run finished after 3001 ms. (steps per millisecond=1193 ) properties seen :4
Running SMT prover for 1 properties.
// Phase 1: matrix 53 rows 50 cols
[2023-03-17 13:08:28] [INFO ] Computed 3 place invariants in 4 ms
[2023-03-17 13:08:28] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:28] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:28] [INFO ] After 51ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-17 13:08:29] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-17 13:08:29] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:29] [INFO ] After 16ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-17 13:08:29] [INFO ] State equation strengthened by 23 read => feed constraints.
[2023-03-17 13:08:29] [INFO ] After 5ms SMT Verify possible using 23 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-17 13:08:29] [INFO ] After 10ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-17 13:08:29] [INFO ] After 54ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 50 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 50/50 places, 53/53 transitions.
Graph (complete) has 132 edges and 50 vertex of which 49 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.1 ms
Discarding 1 places :
Also discarding 0 output transitions
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 4 place count 49 transition count 50
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 6 place count 47 transition count 48
Iterating global reduction 1 with 2 rules applied. Total rules applied 8 place count 47 transition count 48
Applied a total of 8 rules in 8 ms. Remains 47 /50 variables (removed 3) and now considering 48/53 (removed 5) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 8 ms. Remains : 47/50 places, 48/53 transitions.
Incomplete random walk after 10000 steps, including 2167 resets, run finished after 10 ms. (steps per millisecond=1000 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 488 resets, run finished after 5 ms. (steps per millisecond=2000 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 4006065 steps, run timeout after 3001 ms. (steps per millisecond=1334 ) properties seen :{}
Probabilistic random walk after 4006065 steps, saw 1525161 distinct states, run finished after 3001 ms. (steps per millisecond=1334 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 48 rows 47 cols
[2023-03-17 13:08:32] [INFO ] Computed 4 place invariants in 5 ms
[2023-03-17 13:08:32] [INFO ] [Real]Absence check using 1 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] [Real]Absence check using 1 positive and 3 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] After 65ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-17 13:08:32] [INFO ] [Nat]Absence check using 1 positive place invariants in 0 ms returned sat
[2023-03-17 13:08:32] [INFO ] [Nat]Absence check using 1 positive and 3 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] After 14ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-17 13:08:32] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-17 13:08:32] [INFO ] After 5ms SMT Verify possible using 19 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-17 13:08:32] [INFO ] After 10ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-17 13:08:32] [INFO ] After 66ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 47 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 47/47 places, 48/48 transitions.
Applied a total of 0 rules in 3 ms. Remains 47 /47 variables (removed 0) and now considering 48/48 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3 ms. Remains : 47/47 places, 48/48 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 47/47 places, 48/48 transitions.
Applied a total of 0 rules in 3 ms. Remains 47 /47 variables (removed 0) and now considering 48/48 (removed 0) transitions.
[2023-03-17 13:08:32] [INFO ] Invariant cache hit.
[2023-03-17 13:08:32] [INFO ] Implicit Places using invariants in 32 ms returned []
[2023-03-17 13:08:32] [INFO ] Invariant cache hit.
[2023-03-17 13:08:32] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-17 13:08:32] [INFO ] Implicit Places using invariants and state equation in 52 ms returned []
Implicit Place search using SMT with State Equation took 90 ms to find 0 implicit places.
[2023-03-17 13:08:32] [INFO ] Redundant transitions in 1 ms returned []
[2023-03-17 13:08:32] [INFO ] Invariant cache hit.
[2023-03-17 13:08:32] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 145 ms. Remains : 47/47 places, 48/48 transitions.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 47 transition count 46
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 46 transition count 46
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 7 Pre rules applied. Total rules applied 3 place count 46 transition count 39
Deduced a syphon composed of 7 places in 1 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 14 rules applied. Total rules applied 17 place count 39 transition count 39
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 25 place count 35 transition count 35
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 27 place count 34 transition count 35
Applied a total of 27 rules in 10 ms. Remains 34 /47 variables (removed 13) and now considering 35/48 (removed 13) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 35 rows 34 cols
[2023-03-17 13:08:32] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-17 13:08:32] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] [Real]Absence check using 3 positive and 2 generalized place invariants in 0 ms returned sat
[2023-03-17 13:08:32] [INFO ] After 32ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-17 13:08:32] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] [Nat]Absence check using 3 positive and 2 generalized place invariants in 1 ms returned sat
[2023-03-17 13:08:32] [INFO ] After 11ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-17 13:08:32] [INFO ] Deduced a trap composed of 17 places in 26 ms of which 0 ms to minimize.
[2023-03-17 13:08:32] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 29 ms
[2023-03-17 13:08:32] [INFO ] After 44ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :0
[2023-03-17 13:08:32] [INFO ] After 68ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0
Successfully simplified 13 atomic propositions for a total of 16 simplifications.
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 13:08:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 8 ms
[2023-03-17 13:08:32] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 6 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 59 transitions.
Support contains 36 out of 54 places (down from 40) after GAL structural reductions.
Computed a total of 6 stabilizing places and 12 stable transitions
Graph (complete) has 164 edges and 54 vertex of which 53 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 48 transition count 53
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 48 transition count 53
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 47 transition count 52
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 47 transition count 52
Applied a total of 14 rules in 9 ms. Remains 47 /54 variables (removed 7) and now considering 52/59 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 47/54 places, 52/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 4 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 4 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 48 transition count 51
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 48 transition count 51
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 47 transition count 50
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 47 transition count 50
Applied a total of 14 rules in 4 ms. Remains 47 /54 variables (removed 7) and now considering 50/59 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 47/54 places, 50/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 7 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 2 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 2 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 48 transition count 51
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 48 transition count 51
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 13 place count 47 transition count 50
Iterating global reduction 0 with 1 rules applied. Total rules applied 14 place count 47 transition count 50
Applied a total of 14 rules in 6 ms. Remains 47 /54 variables (removed 7) and now considering 50/59 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 47/54 places, 50/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 50 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 3 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 2 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 49 transition count 54
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 49 transition count 54
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 48 transition count 53
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 48 transition count 53
Applied a total of 12 rules in 3 ms. Remains 48 /54 variables (removed 6) and now considering 53/59 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 48/54 places, 53/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 49 transition count 54
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 49 transition count 54
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 48 transition count 53
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 48 transition count 53
Applied a total of 12 rules in 6 ms. Remains 48 /54 variables (removed 6) and now considering 53/59 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 48/54 places, 53/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 51 transition count 56
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 51 transition count 56
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 50 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 50 transition count 55
Applied a total of 8 rules in 13 ms. Remains 50 /54 variables (removed 4) and now considering 55/59 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 50/54 places, 55/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 13 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 47 transition count 50
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 47 transition count 50
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 15 place count 46 transition count 49
Iterating global reduction 0 with 1 rules applied. Total rules applied 16 place count 46 transition count 49
Applied a total of 16 rules in 2 ms. Remains 46 /54 variables (removed 8) and now considering 49/59 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 46/54 places, 49/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 59/59 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 49 transition count 54
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 49 transition count 54
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 11 place count 48 transition count 53
Iterating global reduction 0 with 1 rules applied. Total rules applied 12 place count 48 transition count 53
Applied a total of 12 rules in 13 ms. Remains 48 /54 variables (removed 6) and now considering 53/59 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 48/54 places, 53/59 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 3 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Input system was already deterministic with 53 transitions.
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 17 ms
[2023-03-17 13:08:32] [INFO ] Flatten gal took : 4 ms
[2023-03-17 13:08:32] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 13:08:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 59 transitions and 231 arcs took 1 ms.
Total runtime 10530 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RingSingleMessageInMbox-PT-d0m080
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RingSingleMessageInMbox-PT-d0m080-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679058629324
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 12 (type EXCL) for 11 RingSingleMessageInMbox-PT-d0m080-CTLFireability-01
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
12 CTL EXCL 5/240 5/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-01 1110739 m, 222147 m/sec, 4532934 t fired, .
Time elapsed: 5 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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lola: result : false
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 10/441 15/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-03 3510297 m, 345893 m/sec, 9375085 t fired, .
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 15/441 22/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-03 5214776 m, 340895 m/sec, 13953928 t fired, .
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 20/441 30/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-03 6917541 m, 340553 m/sec, 18517303 t fired, .
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# running tasks: 1 of 4 Visible: 13
lola: CANCELED task # 15 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 9 (type EXCL) for 0 RingSingleMessageInMbox-PT-d0m080-CTLFireability-00
lola: time limit : 501 sec
lola: memory limit: 32 pages
lola: FINISHED task # 9 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-00
lola: result : false
lola: markings : 89
lola: fired transitions : 97
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 20 RingSingleMessageInMbox-PT-d0m080-CTLFireability-07
lola: time limit : 585 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-07
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 0 RingSingleMessageInMbox-PT-d0m080-CTLFireability-00
lola: time limit : 702 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-00
lola: result : false
lola: markings : 50
lola: fired transitions : 67
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 RingSingleMessageInMbox-PT-d0m080-CTLFireability-08
lola: time limit : 1170 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 5/1170 8/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-08 1711172 m, 342234 m/sec, 4877993 t fired, .
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 10/1170 15/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-08 3366370 m, 331039 m/sec, 9626630 t fired, .
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 15/1170 22/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-08 5020850 m, 330896 m/sec, 14357877 t fired, .
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RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 20/1170 29/32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-08 6669622 m, 329754 m/sec, 19080559 t fired, .
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lola: CANCELED task # 24 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 33 (type EXCL) for 32 RingSingleMessageInMbox-PT-d0m080-CTLFireability-11
lola: time limit : 1742 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-11
lola: result : false
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 RingSingleMessageInMbox-PT-d0m080-CTLFireability-13
lola: time limit : 3485 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for RingSingleMessageInMbox-PT-d0m080-CTLFireability-13
lola: result : false
lola: markings : 13
lola: fired transitions : 34
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RingSingleMessageInMbox-PT-d0m080-CTLFireability-00: DISJ false DISJ
RingSingleMessageInMbox-PT-d0m080-CTLFireability-01: CTL unknown AGGR
RingSingleMessageInMbox-PT-d0m080-CTLFireability-03: CTL unknown AGGR
RingSingleMessageInMbox-PT-d0m080-CTLFireability-06: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-07: F false state space / EG
RingSingleMessageInMbox-PT-d0m080-CTLFireability-08: CTL unknown AGGR
RingSingleMessageInMbox-PT-d0m080-CTLFireability-09: CTL unknown AGGR
RingSingleMessageInMbox-PT-d0m080-CTLFireability-10: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-11: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-12: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-13: CTL false CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-14: CTL true CTL model checker
RingSingleMessageInMbox-PT-d0m080-CTLFireability-15: CTL false CTL model checker
Time elapsed: 115 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RingSingleMessageInMbox-PT-d0m080"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RingSingleMessageInMbox-PT-d0m080, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200100818"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RingSingleMessageInMbox-PT-d0m080.tgz
mv RingSingleMessageInMbox-PT-d0m080 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;