fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r327-tall-167889200000769
Last Updated
May 14, 2023

About the Execution of LoLa+red for ResAllocation-PT-R100C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2715.995 322440.00 320685.00 1210.20 ?F???TTFFF?FF?TT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000769.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R100C002, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000769
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 828K
-rw-r--r-- 1 mcc users 8.8K Feb 25 15:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 15:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 15:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 15:34 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 15:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 55K Feb 25 15:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 15:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 15:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:45 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 422K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-00
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-01
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-02
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-03
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-04
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-05
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-06
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-07
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-08
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-09
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-10
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-11
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-12
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-13
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-14
FORMULA_NAME ResAllocation-PT-R100C002-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679056751654

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R100C002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:39:13] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-17 12:39:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:39:13] [INFO ] Load time of PNML (sax parser for PT used): 82 ms
[2023-03-17 12:39:13] [INFO ] Transformed 400 places.
[2023-03-17 12:39:13] [INFO ] Transformed 202 transitions.
[2023-03-17 12:39:13] [INFO ] Parsed PT model containing 400 places and 202 transitions and 1000 arcs in 141 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 10 ms.
Support contains 159 out of 400 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 400/400 places, 202/202 transitions.
Applied a total of 0 rules in 28 ms. Remains 400 /400 variables (removed 0) and now considering 202/202 (removed 0) transitions.
// Phase 1: matrix 202 rows 400 cols
[2023-03-17 12:39:13] [INFO ] Computed 200 place invariants in 18 ms
[2023-03-17 12:39:13] [INFO ] Implicit Places using invariants in 330 ms returned [203, 205, 207, 213, 221, 227, 229, 235, 243, 247, 249, 251, 253, 257, 261, 263, 265, 267, 277, 279, 281, 283, 287, 289, 291, 295, 297, 303, 305, 307, 309, 313, 323, 327, 329, 331, 333, 335, 337, 339, 341, 345, 347, 353, 355, 359, 361, 365, 367, 369, 371, 373, 375, 379, 387, 389, 393]
Discarding 57 places :
Implicit Place search using SMT only with invariants took 359 ms to find 57 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 343/400 places, 202/202 transitions.
Applied a total of 0 rules in 11 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 399 ms. Remains : 343/400 places, 202/202 transitions.
Support contains 159 out of 343 places after structural reductions.
[2023-03-17 12:39:14] [INFO ] Flatten gal took : 44 ms
[2023-03-17 12:39:14] [INFO ] Flatten gal took : 19 ms
[2023-03-17 12:39:14] [INFO ] Input system was already deterministic with 202 transitions.
Support contains 156 out of 343 places (down from 159) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 594 ms. (steps per millisecond=16 ) properties (out of 103) seen :58
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 45) seen :0
Running SMT prover for 45 properties.
// Phase 1: matrix 202 rows 343 cols
[2023-03-17 12:39:15] [INFO ] Computed 143 place invariants in 2 ms
[2023-03-17 12:39:15] [INFO ] After 359ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:45
[2023-03-17 12:39:15] [INFO ] [Nat]Absence check using 143 positive place invariants in 20 ms returned sat
[2023-03-17 12:39:16] [INFO ] After 439ms SMT Verify possible using state equation in natural domain returned unsat :17 sat :28
[2023-03-17 12:39:16] [INFO ] Deduced a trap composed of 4 places in 42 ms of which 4 ms to minimize.
[2023-03-17 12:39:16] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 61 ms
[2023-03-17 12:39:17] [INFO ] Deduced a trap composed of 4 places in 43 ms of which 1 ms to minimize.
[2023-03-17 12:39:17] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 66 ms
[2023-03-17 12:39:17] [INFO ] After 1158ms SMT Verify possible using trap constraints in natural domain returned unsat :17 sat :28
Attempting to minimize the solution found.
Minimization took 340 ms.
[2023-03-17 12:39:17] [INFO ] After 1959ms SMT Verify possible using all constraints in natural domain returned unsat :17 sat :28
Fused 45 Parikh solutions to 26 different solutions.
Parikh walk visited 24 properties in 459 ms.
Support contains 13 out of 343 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 343/343 places, 202/202 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 341 transition count 201
Free-agglomeration rule applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 341 transition count 200
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 339 transition count 200
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 8 place count 338 transition count 199
Free-agglomeration rule applied 1 times.
Iterating global reduction 1 with 1 rules applied. Total rules applied 9 place count 338 transition count 198
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 11 place count 336 transition count 198
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 13 place count 335 transition count 197
Free-agglomeration rule applied 1 times.
Iterating global reduction 2 with 1 rules applied. Total rules applied 14 place count 335 transition count 196
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 16 place count 333 transition count 196
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 18 place count 332 transition count 195
Free-agglomeration rule applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 19 place count 332 transition count 194
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 21 place count 330 transition count 194
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 3 rules applied. Total rules applied 24 place count 328 transition count 193
Free-agglomeration rule applied 1 times.
Iterating global reduction 4 with 1 rules applied. Total rules applied 25 place count 328 transition count 192
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 4 with 2 rules applied. Total rules applied 27 place count 326 transition count 192
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 3 rules applied. Total rules applied 30 place count 324 transition count 191
Free-agglomeration rule applied 1 times.
Iterating global reduction 5 with 1 rules applied. Total rules applied 31 place count 324 transition count 190
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 33 place count 322 transition count 190
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 35 place count 321 transition count 189
Free-agglomeration rule applied 1 times.
Iterating global reduction 6 with 1 rules applied. Total rules applied 36 place count 321 transition count 188
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 38 place count 319 transition count 188
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 7 with 3 rules applied. Total rules applied 41 place count 317 transition count 187
Free-agglomeration rule applied 1 times.
Iterating global reduction 7 with 1 rules applied. Total rules applied 42 place count 317 transition count 186
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 44 place count 315 transition count 186
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 8 with 3 rules applied. Total rules applied 47 place count 313 transition count 185
Free-agglomeration rule applied 1 times.
Iterating global reduction 8 with 1 rules applied. Total rules applied 48 place count 313 transition count 184
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 8 with 2 rules applied. Total rules applied 50 place count 311 transition count 184
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 9 with 3 rules applied. Total rules applied 53 place count 309 transition count 183
Free-agglomeration rule applied 1 times.
Iterating global reduction 9 with 1 rules applied. Total rules applied 54 place count 309 transition count 182
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 9 with 2 rules applied. Total rules applied 56 place count 307 transition count 182
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 10 with 2 rules applied. Total rules applied 58 place count 306 transition count 181
Free-agglomeration rule applied 1 times.
Iterating global reduction 10 with 1 rules applied. Total rules applied 59 place count 306 transition count 180
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 10 with 2 rules applied. Total rules applied 61 place count 304 transition count 180
Free-agglomeration rule applied 1 times.
Iterating global reduction 11 with 1 rules applied. Total rules applied 62 place count 304 transition count 179
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 11 with 1 rules applied. Total rules applied 63 place count 303 transition count 179
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 12 with 1 rules applied. Total rules applied 64 place count 303 transition count 178
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 12 with 2 rules applied. Total rules applied 66 place count 301 transition count 178
Applied a total of 66 rules in 232 ms. Remains 301 /343 variables (removed 42) and now considering 178/202 (removed 24) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 233 ms. Remains : 301/343 places, 178/202 transitions.
Incomplete random walk after 10000 steps, including 5 resets, run finished after 146 ms. (steps per millisecond=68 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 588120 steps, run timeout after 3001 ms. (steps per millisecond=195 ) properties seen :{}
Probabilistic random walk after 588120 steps, saw 162988 distinct states, run finished after 3002 ms. (steps per millisecond=195 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 178 rows 301 cols
[2023-03-17 12:39:21] [INFO ] Computed 125 place invariants in 4 ms
[2023-03-17 12:39:21] [INFO ] After 62ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:39:21] [INFO ] [Nat]Absence check using 125 positive place invariants in 15 ms returned sat
[2023-03-17 12:39:21] [INFO ] After 125ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:39:21] [INFO ] Deduced a trap composed of 4 places in 31 ms of which 2 ms to minimize.
[2023-03-17 12:39:21] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 54 ms
[2023-03-17 12:39:21] [INFO ] After 248ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 44 ms.
[2023-03-17 12:39:21] [INFO ] After 383ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 56 ms.
Support contains 13 out of 301 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 301/301 places, 178/178 transitions.
Applied a total of 0 rules in 5 ms. Remains 301 /301 variables (removed 0) and now considering 178/178 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 5 ms. Remains : 301/301 places, 178/178 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 301/301 places, 178/178 transitions.
Applied a total of 0 rules in 5 ms. Remains 301 /301 variables (removed 0) and now considering 178/178 (removed 0) transitions.
[2023-03-17 12:39:21] [INFO ] Invariant cache hit.
[2023-03-17 12:39:22] [INFO ] Implicit Places using invariants in 143 ms returned [180, 186, 189, 191, 193, 202, 205, 211, 213, 215, 217, 223, 228, 232, 234, 240, 243, 245, 247, 249, 252, 262, 266, 268, 272, 276, 284, 287, 289, 291, 295, 298, 300]
Discarding 33 places :
Implicit Place search using SMT only with invariants took 150 ms to find 33 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 268/301 places, 178/178 transitions.
Applied a total of 0 rules in 5 ms. Remains 268 /268 variables (removed 0) and now considering 178/178 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 160 ms. Remains : 268/301 places, 178/178 transitions.
Incomplete random walk after 10000 steps, including 5 resets, run finished after 141 ms. (steps per millisecond=70 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 545210 steps, run timeout after 3001 ms. (steps per millisecond=181 ) properties seen :{}
Probabilistic random walk after 545210 steps, saw 153392 distinct states, run finished after 3002 ms. (steps per millisecond=181 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 178 rows 268 cols
[2023-03-17 12:39:25] [INFO ] Computed 92 place invariants in 5 ms
[2023-03-17 12:39:25] [INFO ] After 54ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:39:25] [INFO ] [Nat]Absence check using 92 positive place invariants in 14 ms returned sat
[2023-03-17 12:39:25] [INFO ] After 141ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:39:25] [INFO ] After 251ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 38 ms.
[2023-03-17 12:39:25] [INFO ] After 379ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 47 ms.
Support contains 13 out of 268 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 268/268 places, 178/178 transitions.
Applied a total of 0 rules in 7 ms. Remains 268 /268 variables (removed 0) and now considering 178/178 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 8 ms. Remains : 268/268 places, 178/178 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 268/268 places, 178/178 transitions.
Applied a total of 0 rules in 4 ms. Remains 268 /268 variables (removed 0) and now considering 178/178 (removed 0) transitions.
[2023-03-17 12:39:25] [INFO ] Invariant cache hit.
[2023-03-17 12:39:26] [INFO ] Implicit Places using invariants in 137 ms returned []
[2023-03-17 12:39:26] [INFO ] Invariant cache hit.
[2023-03-17 12:39:26] [INFO ] Implicit Places using invariants and state equation in 256 ms returned []
Implicit Place search using SMT with State Equation took 396 ms to find 0 implicit places.
[2023-03-17 12:39:26] [INFO ] Redundant transitions in 5 ms returned []
[2023-03-17 12:39:26] [INFO ] Invariant cache hit.
[2023-03-17 12:39:26] [INFO ] Dead Transitions using invariants and state equation in 94 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 505 ms. Remains : 268/268 places, 178/178 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 267 transition count 178
Free-agglomeration rule applied 2 times.
Iterating global reduction 1 with 2 rules applied. Total rules applied 3 place count 267 transition count 176
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 265 transition count 176
Applied a total of 5 rules in 11 ms. Remains 265 /268 variables (removed 3) and now considering 176/178 (removed 2) transitions.
Running SMT prover for 4 properties.
// Phase 1: matrix 176 rows 265 cols
[2023-03-17 12:39:26] [INFO ] Computed 91 place invariants in 1 ms
[2023-03-17 12:39:26] [INFO ] After 48ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:39:26] [INFO ] [Nat]Absence check using 91 positive place invariants in 10 ms returned sat
[2023-03-17 12:39:26] [INFO ] After 119ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:39:26] [INFO ] Deduced a trap composed of 4 places in 35 ms of which 0 ms to minimize.
[2023-03-17 12:39:26] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 56 ms
[2023-03-17 12:39:26] [INFO ] After 249ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 47 ms.
[2023-03-17 12:39:26] [INFO ] After 371ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Successfully simplified 17 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA ResAllocation-PT-R100C002-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R100C002-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 12:39:26] [INFO ] Flatten gal took : 15 ms
[2023-03-17 12:39:26] [INFO ] Flatten gal took : 16 ms
[2023-03-17 12:39:26] [INFO ] Input system was already deterministic with 202 transitions.
Support contains 114 out of 343 places (down from 116) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:26] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:39:26] [INFO ] Flatten gal took : 14 ms
[2023-03-17 12:39:26] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:26] [INFO ] Flatten gal took : 24 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 26 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 3 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 18 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 12 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 340 transition count 200
Applied a total of 5 rules in 11 ms. Remains 340 /343 variables (removed 3) and now considering 200/202 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 340/343 places, 200/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 200 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 3 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 2 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 3 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
Starting structural reductions in LTL mode, iteration 0 : 343/343 places, 202/202 transitions.
Applied a total of 0 rules in 4 ms. Remains 343 /343 variables (removed 0) and now considering 202/202 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 343/343 places, 202/202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Input system was already deterministic with 202 transitions.
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:39:27] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:39:27] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-17 12:39:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 343 places, 202 transitions and 886 arcs took 2 ms.
Total runtime 14295 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R100C002
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376

FORMULA ResAllocation-PT-R100C002-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R100C002-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679057074094

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 33 (type EXCL) for 32 ResAllocation-PT-R100C002-CTLCardinality-09
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 33 (type EXCL) for ResAllocation-PT-R100C002-CTLCardinality-09
lola: result : false
lola: markings : 441
lola: fired transitions : 440
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 ResAllocation-PT-R100C002-CTLCardinality-10
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type FNDP) for 41 ResAllocation-PT-R100C002-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 41 ResAllocation-PT-R100C002-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 78 (type SRCH) for 41 ResAllocation-PT-R100C002-CTLCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 74 (type FNDP) for ResAllocation-PT-R100C002-CTLCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 75 (type EQUN) for ResAllocation-PT-R100C002-CTLCardinality-12 (obsolete)
lola: CANCELED task # 78 (type SRCH) for ResAllocation-PT-R100C002-CTLCardinality-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 78 (type SRCH) for ResAllocation-PT-R100C002-CTLCardinality-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 75 (type EQUN) for ResAllocation-PT-R100C002-CTLCardinality-12
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 80 (type FNDP) for 25 ResAllocation-PT-R100C002-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type EQUN) for 25 ResAllocation-PT-R100C002-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 83 (type SRCH) for 25 ResAllocation-PT-R100C002-CTLCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type SRCH) for ResAllocation-PT-R100C002-CTLCardinality-08
lola: result : unknown
lola: time used : 0.000000
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lola: FINISHED task # 80 (type FNDP) for ResAllocation-PT-R100C002-CTLCardinality-08
lola: result : true
lola: fired transitions : 45
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 81 (type EQUN) for ResAllocation-PT-R100C002-CTLCardinality-08 (obsolete)
sara: try reading problem file /home/mcc/execution/376/CTLCardinality-81.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 81 (type EQUN) for ResAllocation-PT-R100C002-CTLCardinality-08
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 5/200 4/32 ResAllocation-PT-R100C002-CTLCardinality-10 669371 m, 133874 m/sec, 2368244 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 10/200 8/32 ResAllocation-PT-R100C002-CTLCardinality-10 1312861 m, 128698 m/sec, 4847988 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R100C002-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 15/200 11/32 ResAllocation-PT-R100C002-CTLCardinality-10 1942936 m, 126015 m/sec, 7369438 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R100C002-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 20/200 15/32 ResAllocation-PT-R100C002-CTLCardinality-10 2605045 m, 132421 m/sec, 10012154 t fired, .

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 25/200 18/32 ResAllocation-PT-R100C002-CTLCardinality-10 3246981 m, 128387 m/sec, 12554428 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R100C002-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 30/200 22/32 ResAllocation-PT-R100C002-CTLCardinality-10 3857769 m, 122157 m/sec, 15030017 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 35/200 25/32 ResAllocation-PT-R100C002-CTLCardinality-10 4471210 m, 122688 m/sec, 17608663 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 40/200 28/32 ResAllocation-PT-R100C002-CTLCardinality-10 5078538 m, 121465 m/sec, 20113540 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 1 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 45/200 32/32 ResAllocation-PT-R100C002-CTLCardinality-10 5705715 m, 125435 m/sec, 22755337 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 4 0 0 4 0 0 0

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lola: result : true
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ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R100C002-CTLCardinality-06: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 3 0 0 7 0 0 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

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57 CTL EXCL 5/253 6/32 ResAllocation-PT-R100C002-CTLCardinality-13 1408678 m, 281735 m/sec, 3339630 t fired, .

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57 CTL EXCL 10/253 11/32 ResAllocation-PT-R100C002-CTLCardinality-13 2676854 m, 253635 m/sec, 6608334 t fired, .

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57 CTL EXCL 25/253 26/32 ResAllocation-PT-R100C002-CTLCardinality-13 6353687 m, 235412 m/sec, 16328478 t fired, .

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57 CTL EXCL 30/253 31/32 ResAllocation-PT-R100C002-CTLCardinality-13 7593361 m, 247934 m/sec, 19524799 t fired, .

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48 CTL EXCL 5/270 5/32 ResAllocation-PT-R100C002-CTLCardinality-12 901373 m, 180274 m/sec, 2791154 t fired, .

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48 CTL EXCL 10/270 9/32 ResAllocation-PT-R100C002-CTLCardinality-12 1658812 m, 151487 m/sec, 5571551 t fired, .

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48 CTL EXCL 15/270 13/32 ResAllocation-PT-R100C002-CTLCardinality-12 2410503 m, 150338 m/sec, 8315043 t fired, .

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13 CTL EXCL 30/386 32/32 ResAllocation-PT-R100C002-CTLCardinality-04 6276405 m, 189943 m/sec, 15257570 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/668 10/32 ResAllocation-PT-R100C002-CTLCardinality-00 1737375 m, 175050 m/sec, 6151783 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-01: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-02: CTL 0 0 0 0 1 0 1 0
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ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/668 13/32 ResAllocation-PT-R100C002-CTLCardinality-00 2423090 m, 137143 m/sec, 9248003 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-01: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/668 17/32 ResAllocation-PT-R100C002-CTLCardinality-00 3167235 m, 148829 m/sec, 12325659 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/668 21/32 ResAllocation-PT-R100C002-CTLCardinality-00 3866625 m, 139878 m/sec, 15413397 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/668 24/32 ResAllocation-PT-R100C002-CTLCardinality-00 4593963 m, 145467 m/sec, 18479139 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-01: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-04: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R100C002-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/668 28/32 ResAllocation-PT-R100C002-CTLCardinality-00 5223234 m, 125854 m/sec, 21559380 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ 0 1 0 0 6 0 0 1

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/668 31/32 ResAllocation-PT-R100C002-CTLCardinality-00 5875609 m, 130475 m/sec, 24581436 t fired, .

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ResAllocation-PT-R100C002-CTLCardinality-01: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker

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ResAllocation-PT-R100C002-CTLCardinality-12: CONJ 0 2 0 0 7 0 1 1
ResAllocation-PT-R100C002-CTLCardinality-13: CTL 0 0 0 0 1 0 1 0
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lola: result : false
lola: markings : 4323
lola: fired transitions : 4323
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lola: result : true
lola: markings : 5588
lola: fired transitions : 20508
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 14

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R100C002-CTLCardinality-00: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-01: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-02: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-03: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-04: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-05: CTL true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-06: DISJ true CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-08: CONJ false findpath
ResAllocation-PT-R100C002-CTLCardinality-09: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-10: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-11: CTL false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-12: CONJ false CTL model checker
ResAllocation-PT-R100C002-CTLCardinality-13: CTL unknown AGGR
ResAllocation-PT-R100C002-CTLCardinality-14: DISJ true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R100C002"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R100C002, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000769"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R100C002.tgz
mv ResAllocation-PT-R100C002 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;