Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000754.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R020C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000754
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 8.5K Feb 25 15:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 15:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 15:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 25 15:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 15:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 15:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 15:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Feb 25 15:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:45 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 85K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679056196020

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R020C002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:29:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 12:29:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:29:57] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-17 12:29:57] [INFO ] Transformed 80 places.
[2023-03-17 12:29:57] [INFO ] Transformed 42 transitions.
[2023-03-17 12:29:57] [INFO ] Parsed PT model containing 80 places and 42 transitions and 200 arcs in 99 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 76 out of 80 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 42/42 transitions.
Applied a total of 0 rules in 10 ms. Remains 80 /80 variables (removed 0) and now considering 42/42 (removed 0) transitions.
// Phase 1: matrix 42 rows 80 cols
[2023-03-17 12:29:57] [INFO ] Computed 40 place invariants in 10 ms
[2023-03-17 12:29:57] [INFO ] Implicit Places using invariants in 156 ms returned [71]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 179 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 79/80 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 191 ms. Remains : 79/80 places, 42/42 transitions.
Support contains 76 out of 79 places after structural reductions.
[2023-03-17 12:29:58] [INFO ] Flatten gal took : 21 ms
[2023-03-17 12:29:58] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:29:58] [INFO ] Input system was already deterministic with 42 transitions.
Incomplete random walk after 10000 steps, including 86 resets, run finished after 535 ms. (steps per millisecond=18 ) properties (out of 52) seen :34
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :3
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 15) seen :5
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
// Phase 1: matrix 42 rows 79 cols
[2023-03-17 12:29:58] [INFO ] Computed 39 place invariants in 2 ms
[2023-03-17 12:29:58] [INFO ] [Real]Absence check using 39 positive place invariants in 13 ms returned sat
[2023-03-17 12:29:58] [INFO ] After 37ms SMT Verify possible using state equation in real domain returned unsat :3 sat :3 real:2
[2023-03-17 12:29:58] [INFO ] After 54ms SMT Verify possible using trap constraints in real domain returned unsat :3 sat :3 real:2
Attempting to minimize the solution found.
Minimization took 15 ms.
[2023-03-17 12:29:58] [INFO ] After 188ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :2 real:3
[2023-03-17 12:29:58] [INFO ] [Nat]Absence check using 39 positive place invariants in 5 ms returned sat
[2023-03-17 12:29:59] [INFO ] After 38ms SMT Verify possible using state equation in natural domain returned unsat :3 sat :5
[2023-03-17 12:29:59] [INFO ] Deduced a trap composed of 4 places in 26 ms of which 1 ms to minimize.
[2023-03-17 12:29:59] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 36 ms
[2023-03-17 12:29:59] [INFO ] After 114ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :5
Attempting to minimize the solution found.
Minimization took 23 ms.
[2023-03-17 12:29:59] [INFO ] After 194ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :5
Fused 8 Parikh solutions to 5 different solutions.
Parikh walk visited 1 properties in 27 ms.
Support contains 16 out of 79 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 77 transition count 41
Free-agglomeration rule applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 77 transition count 40
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 6 place count 75 transition count 40
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 1 with 1 rules applied. Total rules applied 7 place count 75 transition count 39
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 9 place count 73 transition count 39
Applied a total of 9 rules in 20 ms. Remains 73 /79 variables (removed 6) and now considering 39/42 (removed 3) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 20 ms. Remains : 73/79 places, 39/42 transitions.
Incomplete random walk after 10000 steps, including 105 resets, run finished after 218 ms. (steps per millisecond=45 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 25 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 21 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 1155943 steps, run timeout after 3001 ms. (steps per millisecond=385 ) properties seen :{}
Probabilistic random walk after 1155943 steps, saw 202120 distinct states, run finished after 3002 ms. (steps per millisecond=385 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 39 rows 73 cols
[2023-03-17 12:30:02] [INFO ] Computed 36 place invariants in 4 ms
[2023-03-17 12:30:02] [INFO ] [Real]Absence check using 36 positive place invariants in 5 ms returned sat
[2023-03-17 12:30:02] [INFO ] After 33ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:2
[2023-03-17 12:30:02] [INFO ] After 46ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :2 real:2
Attempting to minimize the solution found.
Minimization took 8 ms.
[2023-03-17 12:30:02] [INFO ] After 110ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :2 real:2
[2023-03-17 12:30:02] [INFO ] [Nat]Absence check using 36 positive place invariants in 4 ms returned sat
[2023-03-17 12:30:02] [INFO ] After 27ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:30:02] [INFO ] After 47ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 15 ms.
[2023-03-17 12:30:02] [INFO ] After 104ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 11 ms.
Support contains 16 out of 73 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 73/73 places, 39/39 transitions.
Applied a total of 0 rules in 3 ms. Remains 73 /73 variables (removed 0) and now considering 39/39 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3 ms. Remains : 73/73 places, 39/39 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 73/73 places, 39/39 transitions.
Applied a total of 0 rules in 5 ms. Remains 73 /73 variables (removed 0) and now considering 39/39 (removed 0) transitions.
[2023-03-17 12:30:02] [INFO ] Invariant cache hit.
[2023-03-17 12:30:02] [INFO ] Implicit Places using invariants in 55 ms returned [41, 43, 45, 47, 53, 55, 57, 59, 61, 63, 65, 68, 70, 72]
Discarding 14 places :
Implicit Place search using SMT only with invariants took 57 ms to find 14 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 59/73 places, 39/39 transitions.
Applied a total of 0 rules in 2 ms. Remains 59 /59 variables (removed 0) and now considering 39/39 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 64 ms. Remains : 59/73 places, 39/39 transitions.
Incomplete random walk after 10000 steps, including 105 resets, run finished after 147 ms. (steps per millisecond=68 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 26 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 21 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 1116123 steps, run timeout after 3001 ms. (steps per millisecond=371 ) properties seen :{}
Probabilistic random walk after 1116123 steps, saw 194937 distinct states, run finished after 3001 ms. (steps per millisecond=371 ) properties seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 39 rows 59 cols
[2023-03-17 12:30:06] [INFO ] Computed 22 place invariants in 1 ms
[2023-03-17 12:30:06] [INFO ] [Real]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 12:30:06] [INFO ] After 73ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:30:06] [INFO ] [Nat]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 12:30:06] [INFO ] After 21ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:30:06] [INFO ] Deduced a trap composed of 4 places in 19 ms of which 1 ms to minimize.
[2023-03-17 12:30:06] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 23 ms
[2023-03-17 12:30:06] [INFO ] Deduced a trap composed of 4 places in 20 ms of which 0 ms to minimize.
[2023-03-17 12:30:06] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 25 ms
[2023-03-17 12:30:06] [INFO ] After 82ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-17 12:30:06] [INFO ] After 129ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 13 ms.
Support contains 16 out of 59 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 59/59 places, 39/39 transitions.
Applied a total of 0 rules in 2 ms. Remains 59 /59 variables (removed 0) and now considering 39/39 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2 ms. Remains : 59/59 places, 39/39 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 59/59 places, 39/39 transitions.
Applied a total of 0 rules in 2 ms. Remains 59 /59 variables (removed 0) and now considering 39/39 (removed 0) transitions.
[2023-03-17 12:30:06] [INFO ] Invariant cache hit.
[2023-03-17 12:30:06] [INFO ] Implicit Places using invariants in 39 ms returned []
[2023-03-17 12:30:06] [INFO ] Invariant cache hit.
[2023-03-17 12:30:06] [INFO ] Implicit Places using invariants and state equation in 44 ms returned []
Implicit Place search using SMT with State Equation took 85 ms to find 0 implicit places.
[2023-03-17 12:30:06] [INFO ] Redundant transitions in 0 ms returned []
[2023-03-17 12:30:06] [INFO ] Invariant cache hit.
[2023-03-17 12:30:06] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 123 ms. Remains : 59/59 places, 39/39 transitions.
Free-agglomeration rule applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 59 transition count 38
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 58 transition count 38
Applied a total of 2 rules in 4 ms. Remains 58 /59 variables (removed 1) and now considering 38/39 (removed 1) transitions.
Running SMT prover for 4 properties.
// Phase 1: matrix 38 rows 58 cols
[2023-03-17 12:30:06] [INFO ] Computed 22 place invariants in 1 ms
[2023-03-17 12:30:06] [INFO ] [Real]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 12:30:06] [INFO ] After 53ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:30:06] [INFO ] [Nat]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 12:30:06] [INFO ] After 20ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:30:06] [INFO ] Deduced a trap composed of 4 places in 27 ms of which 1 ms to minimize.
[2023-03-17 12:30:06] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 32 ms
[2023-03-17 12:30:06] [INFO ] After 69ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-17 12:30:06] [INFO ] After 110ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 76 transition count 40
Applied a total of 5 rules in 6 ms. Remains 76 /79 variables (removed 3) and now considering 40/42 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 76/79 places, 40/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 76 transition count 40
Applied a total of 5 rules in 6 ms. Remains 76 /79 variables (removed 3) and now considering 40/42 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 76/79 places, 40/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 78 transition count 41
Applied a total of 2 rules in 5 ms. Remains 78 /79 variables (removed 1) and now considering 41/42 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 78/79 places, 41/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 0 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 76 transition count 40
Applied a total of 5 rules in 3 ms. Remains 76 /79 variables (removed 3) and now considering 40/42 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 76/79 places, 40/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Applied a total of 0 rules in 0 ms. Remains 79 /79 variables (removed 0) and now considering 42/42 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 79/79 places, 42/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 76 transition count 40
Applied a total of 5 rules in 3 ms. Remains 76 /79 variables (removed 3) and now considering 40/42 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 76/79 places, 40/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 42/42 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 76 transition count 40
Applied a total of 5 rules in 3 ms. Remains 76 /79 variables (removed 3) and now considering 40/42 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 76/79 places, 40/42 transitions.
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:30:06] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:30:06] [INFO ] Input system was already deterministic with 40 transitions.
[2023-03-17 12:30:07] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:07] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:30:07] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 12:30:07] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 79 places, 42 transitions and 198 arcs took 0 ms.
Total runtime 9694 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R020C002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA ResAllocation-PT-R020C002-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R020C002-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679056408340

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 11 (type EXCL) for 10 ResAllocation-PT-R020C002-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 11 (type EXCL) for ResAllocation-PT-R020C002-CTLFireability-02
lola: result : false
lola: markings : 115
lola: fired transitions : 323
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 ResAllocation-PT-R020C002-CTLFireability-07
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 62 (type FNDP) for 34 ResAllocation-PT-R020C002-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 34 ResAllocation-PT-R020C002-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SRCH) for 34 ResAllocation-PT-R020C002-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SRCH) for ResAllocation-PT-R020C002-CTLFireability-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 62 (type FNDP) for ResAllocation-PT-R020C002-CTLFireability-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for ResAllocation-PT-R020C002-CTLFireability-10 (obsolete)
lola: FINISHED task # 63 (type EQUN) for ResAllocation-PT-R020C002-CTLFireability-10
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R020C002-CTLFireability-02: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R020C002-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R020C002-CTLFireability-03: AGAF 0 1 0 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
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ResAllocation-PT-R020C002-CTLFireability-08: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-09: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-10: CONJ true CONJ
ResAllocation-PT-R020C002-CTLFireability-11: CONJ false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-12: EG true state space / EG
ResAllocation-PT-R020C002-CTLFireability-13: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-15: AGAF false state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R020C002-CTLFireability-01: CONJ 0 0 0 0 3 0 1 0
ResAllocation-PT-R020C002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R020C002-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R020C002-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 45/3450 30/32 ResAllocation-PT-R020C002-CTLFireability-06 7391007 m, 187536 m/sec, 69693922 t fired, .

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lola: CANCELED task # 23 (type EXCL) for ResAllocation-PT-R020C002-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R020C002-CTLFireability-00: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-02: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-03: AGAF false state space /EFEG
ResAllocation-PT-R020C002-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-07: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-08: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-09: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-10: CONJ true CONJ
ResAllocation-PT-R020C002-CTLFireability-11: CONJ false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-12: EG true state space / EG
ResAllocation-PT-R020C002-CTLFireability-13: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-15: AGAF false state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R020C002-CTLFireability-01: CONJ 0 0 0 0 3 0 1 0
ResAllocation-PT-R020C002-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R020C002-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R020C002-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R020C002-CTLFireability-00: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-01: CONJ unknown CONJ
ResAllocation-PT-R020C002-CTLFireability-02: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-03: AGAF false state space /EFEG
ResAllocation-PT-R020C002-CTLFireability-04: CTL unknown AGGR
ResAllocation-PT-R020C002-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-06: CTL unknown AGGR
ResAllocation-PT-R020C002-CTLFireability-07: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-08: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-09: CTL true CTL model checker
ResAllocation-PT-R020C002-CTLFireability-10: CONJ true CONJ
ResAllocation-PT-R020C002-CTLFireability-11: CONJ false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-12: EG true state space / EG
ResAllocation-PT-R020C002-CTLFireability-13: CTL false CTL model checker
ResAllocation-PT-R020C002-CTLFireability-14: CTL unknown AGGR
ResAllocation-PT-R020C002-CTLFireability-15: AGAF false state space /EFEG


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R020C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R020C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000754"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R020C002.tgz
mv ResAllocation-PT-R020C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;