About the Execution of LoLa+red for ResAllocation-PT-R003C100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2430.560 | 489550.00 | 489675.00 | 1541.60 | ?F??FF?F??T?TTF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000722.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R003C100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000722
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 7.4K Feb 25 15:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 15:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 15:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 15:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 25 15:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 721K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C100-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679055685916
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R003C100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:21:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 12:21:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:21:27] [INFO ] Load time of PNML (sax parser for PT used): 101 ms
[2023-03-17 12:21:27] [INFO ] Transformed 600 places.
[2023-03-17 12:21:27] [INFO ] Transformed 400 transitions.
[2023-03-17 12:21:27] [INFO ] Parsed PT model containing 600 places and 400 transitions and 1794 arcs in 162 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 7 ms.
Support contains 196 out of 600 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 600/600 places, 400/400 transitions.
Applied a total of 0 rules in 49 ms. Remains 600 /600 variables (removed 0) and now considering 400/400 (removed 0) transitions.
// Phase 1: matrix 400 rows 600 cols
[2023-03-17 12:21:27] [INFO ] Computed 300 place invariants in 23 ms
[2023-03-17 12:21:28] [INFO ] Implicit Places using invariants in 636 ms returned []
[2023-03-17 12:21:28] [INFO ] Invariant cache hit.
[2023-03-17 12:21:28] [INFO ] Implicit Places using invariants and state equation in 472 ms returned [595, 597, 599]
Discarding 3 places :
Implicit Place search using SMT with State Equation took 1138 ms to find 3 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 597/600 places, 400/400 transitions.
Applied a total of 0 rules in 14 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1202 ms. Remains : 597/600 places, 400/400 transitions.
Support contains 196 out of 597 places after structural reductions.
[2023-03-17 12:21:28] [INFO ] Flatten gal took : 74 ms
[2023-03-17 12:21:28] [INFO ] Flatten gal took : 34 ms
[2023-03-17 12:21:29] [INFO ] Input system was already deterministic with 400 transitions.
Incomplete random walk after 10000 steps, including 47 resets, run finished after 594 ms. (steps per millisecond=16 ) properties (out of 87) seen :83
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 400 rows 597 cols
[2023-03-17 12:21:29] [INFO ] Computed 297 place invariants in 9 ms
[2023-03-17 12:21:30] [INFO ] [Real]Absence check using 297 positive place invariants in 36 ms returned sat
[2023-03-17 12:21:30] [INFO ] After 494ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-17 12:21:30] [INFO ] [Nat]Absence check using 297 positive place invariants in 35 ms returned sat
[2023-03-17 12:21:30] [INFO ] After 272ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 40 ms of which 3 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 50 ms of which 1 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 42 ms of which 1 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 50 ms of which 0 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 37 ms of which 1 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 27 ms of which 1 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Deduced a trap composed of 4 places in 25 ms of which 0 ms to minimize.
[2023-03-17 12:21:31] [INFO ] Trap strengthening (SAT) tested/added 8/7 trap constraints in 435 ms
[2023-03-17 12:21:31] [INFO ] After 840ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 80 ms.
[2023-03-17 12:21:31] [INFO ] After 1105ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Fused 4 Parikh solutions to 1 different solutions.
Parikh walk visited 3 properties in 10 ms.
Support contains 5 out of 597 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 98 Post agglomeration using F-continuation condition.Transition count delta: 98
Deduced a syphon composed of 98 places in 0 ms
Reduce places removed 98 places and 0 transitions.
Iterating global reduction 0 with 196 rules applied. Total rules applied 196 place count 499 transition count 302
Free-agglomeration rule applied 2 times.
Iterating global reduction 0 with 2 rules applied. Total rules applied 198 place count 499 transition count 300
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 202 place count 495 transition count 300
Free-agglomeration rule applied 2 times.
Iterating global reduction 1 with 2 rules applied. Total rules applied 204 place count 495 transition count 298
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 208 place count 493 transition count 296
Free-agglomeration rule (complex) applied 97 times.
Iterating global reduction 2 with 97 rules applied. Total rules applied 305 place count 493 transition count 199
Discarding 2 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Remove reverse transitions (loop back) rule discarded transition t5.t4 and 2 places that fell out of Prefix Of Interest.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 88 transitions
Trivial Post-agglo rules discarded 88 transitions
Performed 88 trivial Post agglomeration. Transition count delta: 88
Iterating post reduction 2 with 90 rules applied. Total rules applied 395 place count 204 transition count 109
Reduce places removed 174 places and 0 transitions.
Drop transitions removed 88 transitions
Reduce isomorphic transitions removed 88 transitions.
Iterating post reduction 3 with 262 rules applied. Total rules applied 657 place count 30 transition count 21
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 4 with 12 rules applied. Total rules applied 669 place count 22 transition count 17
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 673 place count 22 transition count 13
Ensure Unique test removed 4 places
Iterating post reduction 5 with 4 rules applied. Total rules applied 677 place count 18 transition count 13
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 2 Pre rules applied. Total rules applied 677 place count 18 transition count 11
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 6 with 6 rules applied. Total rules applied 683 place count 14 transition count 11
Applied a total of 683 rules in 145 ms. Remains 14 /597 variables (removed 583) and now considering 11/400 (removed 389) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 145 ms. Remains : 14/597 places, 11/400 transitions.
Finished random walk after 9 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=9 )
[2023-03-17 12:21:31] [INFO ] Flatten gal took : 26 ms
[2023-03-17 12:21:31] [INFO ] Flatten gal took : 45 ms
[2023-03-17 12:21:31] [INFO ] Input system was already deterministic with 400 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 22 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 22 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 22 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 14 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 24 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 20 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 6 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 26 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 30 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 49 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 36 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 23 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 14 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 16 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 15 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 15 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 14 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 15 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 1 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 0 with 192 rules applied. Total rules applied 192 place count 501 transition count 304
Applied a total of 192 rules in 33 ms. Remains 501 /597 variables (removed 96) and now considering 304/400 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 501/597 places, 304/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 16 ms
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:32] [INFO ] Input system was already deterministic with 304 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:32] [INFO ] Flatten gal took : 30 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 16 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 26 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 34 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Performed 89 Post agglomeration using F-continuation condition.Transition count delta: 89
Deduced a syphon composed of 89 places in 0 ms
Reduce places removed 89 places and 0 transitions.
Iterating global reduction 0 with 178 rules applied. Total rules applied 178 place count 508 transition count 311
Applied a total of 178 rules in 31 ms. Remains 508 /597 variables (removed 89) and now considering 311/400 (removed 89) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 508/597 places, 311/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 23 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 311 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 4 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 12 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
Starting structural reductions in LTL mode, iteration 0 : 597/597 places, 400/400 transitions.
Applied a total of 0 rules in 5 ms. Remains 597 /597 variables (removed 0) and now considering 400/400 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 597/597 places, 400/400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 12 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Input system was already deterministic with 400 transitions.
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:21:33] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 12:21:33] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 597 places, 400 transitions and 1788 arcs took 3 ms.
Total runtime 6288 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R003C100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
CTLFireability
FORMULA ResAllocation-PT-R003C100-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R003C100-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679056175466
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 8 (type EXCL) for 3 ResAllocation-PT-R003C100-CTLFireability-01
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R003C100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-01: CONJ 0 1 1 0 2 0 0 0
ResAllocation-PT-R003C100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-03: AGEF 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-04: SP ACTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
ResAllocation-PT-R003C100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 5/199 5/32 ResAllocation-PT-R003C100-CTLFireability-01 460258 m, 92051 m/sec, 2324443 t fired, .
Time elapsed: 6 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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ResAllocation-PT-R003C100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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42 CTL EXCL 40/3174 25/32 ResAllocation-PT-R003C100-CTLFireability-11 3247923 m, 71804 m/sec, 26074964 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C100-CTLFireability-01: CONJ false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-04: SP ACTL false LTL model checker
ResAllocation-PT-R003C100-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-07: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-10: DISJ true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-12: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-13: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R003C100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-03: AGEF 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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42 CTL EXCL 45/3174 28/32 ResAllocation-PT-R003C100-CTLFireability-11 3627865 m, 75988 m/sec, 29146308 t fired, .
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ResAllocation-PT-R003C100-CTLFireability-01: CONJ false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-04: SP ACTL false LTL model checker
ResAllocation-PT-R003C100-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-07: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-10: DISJ true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-12: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-13: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R003C100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-03: AGEF 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R003C100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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42 CTL EXCL 50/3174 31/32 ResAllocation-PT-R003C100-CTLFireability-11 4030009 m, 80428 m/sec, 32438357 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C100-CTLFireability-01: CONJ false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-04: SP ACTL false LTL model checker
ResAllocation-PT-R003C100-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-07: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-10: DISJ true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-12: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-13: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R003C100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-03: AGEF 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R003C100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C100-CTLFireability-00: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-01: CONJ false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-02: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-03: AGEF unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-04: SP ACTL false LTL model checker
ResAllocation-PT-R003C100-CTLFireability-05: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-06: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-07: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-08: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-09: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-10: DISJ true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-11: CTL unknown AGGR
ResAllocation-PT-R003C100-CTLFireability-12: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-13: CTL true CTL model checker
ResAllocation-PT-R003C100-CTLFireability-14: CTL false CTL model checker
ResAllocation-PT-R003C100-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R003C100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000722"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C100.tgz
mv ResAllocation-PT-R003C100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;