fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r327-tall-167889200000705
Last Updated
May 14, 2023

About the Execution of LoLa+red for ResAllocation-PT-R003C020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1953.199 220114.00 215635.00 786.10 FTTF??T?TTTTFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000705.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R003C020, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000705
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 676K
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 25 15:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 25 15:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 25 15:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 25 15:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 203K Feb 25 15:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 15:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 25 15:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 143K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-00
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-01
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-02
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-03
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-04
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-05
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-06
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-07
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-08
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-09
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-10
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-11
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-12
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-13
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-14
FORMULA_NAME ResAllocation-PT-R003C020-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679054790932

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R003C020
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:06:32] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-17 12:06:32] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:06:32] [INFO ] Load time of PNML (sax parser for PT used): 52 ms
[2023-03-17 12:06:32] [INFO ] Transformed 120 places.
[2023-03-17 12:06:32] [INFO ] Transformed 80 transitions.
[2023-03-17 12:06:32] [INFO ] Parsed PT model containing 120 places and 80 transitions and 354 arcs in 109 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 9 ms.
Support contains 70 out of 120 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 11 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
// Phase 1: matrix 80 rows 120 cols
[2023-03-17 12:06:32] [INFO ] Computed 60 place invariants in 9 ms
[2023-03-17 12:06:32] [INFO ] Implicit Places using invariants in 198 ms returned []
[2023-03-17 12:06:32] [INFO ] Invariant cache hit.
[2023-03-17 12:06:32] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 306 ms to find 0 implicit places.
[2023-03-17 12:06:32] [INFO ] Invariant cache hit.
[2023-03-17 12:06:32] [INFO ] Dead Transitions using invariants and state equation in 79 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 397 ms. Remains : 120/120 places, 80/80 transitions.
Support contains 70 out of 120 places after structural reductions.
[2023-03-17 12:06:33] [INFO ] Flatten gal took : 28 ms
[2023-03-17 12:06:33] [INFO ] Flatten gal took : 13 ms
[2023-03-17 12:06:33] [INFO ] Input system was already deterministic with 80 transitions.
Incomplete random walk after 10000 steps, including 224 resets, run finished after 566 ms. (steps per millisecond=17 ) properties (out of 65) seen :53
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 15 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 15 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 16 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 15 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 14 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 16 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10000 steps, including 15 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2023-03-17 12:06:34] [INFO ] Invariant cache hit.
[2023-03-17 12:06:34] [INFO ] [Real]Absence check using 60 positive place invariants in 8 ms returned sat
[2023-03-17 12:06:34] [INFO ] After 97ms SMT Verify possible using all constraints in real domain returned unsat :9 sat :0 real:3
[2023-03-17 12:06:34] [INFO ] [Nat]Absence check using 60 positive place invariants in 13 ms returned sat
[2023-03-17 12:06:34] [INFO ] After 60ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :0
Fused 12 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 12 atomic propositions for a total of 16 simplifications.
FORMULA ResAllocation-PT-R003C020-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 9 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 4 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 9 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 4 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 3 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 3 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 0 with 29 rules applied. Total rules applied 29 place count 105 transition count 66
Applied a total of 29 rules in 18 ms. Remains 105 /120 variables (removed 15) and now considering 66/80 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 105/120 places, 66/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 0 with 39 rules applied. Total rules applied 39 place count 100 transition count 61
Applied a total of 39 rules in 8 ms. Remains 100 /120 variables (removed 20) and now considering 61/80 (removed 19) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 100/120 places, 61/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 20 Post agglomeration using F-continuation condition.Transition count delta: 20
Deduced a syphon composed of 20 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 0 with 41 rules applied. Total rules applied 41 place count 99 transition count 60
Applied a total of 41 rules in 6 ms. Remains 99 /120 variables (removed 21) and now considering 60/80 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 99/120 places, 60/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Deduced a syphon composed of 18 places in 1 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 0 with 37 rules applied. Total rules applied 37 place count 101 transition count 62
Applied a total of 37 rules in 7 ms. Remains 101 /120 variables (removed 19) and now considering 62/80 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 101/120 places, 62/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 1 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 0 with 39 rules applied. Total rules applied 39 place count 100 transition count 61
Applied a total of 39 rules in 6 ms. Remains 100 /120 variables (removed 20) and now considering 61/80 (removed 19) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 100/120 places, 61/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 0 with 32 rules applied. Total rules applied 32 place count 104 transition count 64
Applied a total of 32 rules in 6 ms. Remains 104 /120 variables (removed 16) and now considering 64/80 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 104/120 places, 64/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 64 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 1 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 0 with 39 rules applied. Total rules applied 39 place count 100 transition count 61
Applied a total of 39 rules in 6 ms. Remains 100 /120 variables (removed 20) and now considering 61/80 (removed 19) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 100/120 places, 61/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in LTL mode, iteration 0 : 120/120 places, 80/80 transitions.
Applied a total of 0 rules in 1 ms. Remains 120 /120 variables (removed 0) and now considering 80/80 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 120/120 places, 80/80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Input system was already deterministic with 80 transitions.
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:06:34] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-17 12:06:34] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 120 places, 80 transitions and 354 arcs took 1 ms.
Total runtime 2621 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R003C020
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374

FORMULA ResAllocation-PT-R003C020-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C020-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679055011046

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 20 (type EXCL) for 9 ResAllocation-PT-R003C020-CTLCardinality-04
lola: time limit : 100 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for ResAllocation-PT-R003C020-CTLCardinality-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 52 (type EXCL) for 47 ResAllocation-PT-R003C020-CTLCardinality-10
lola: time limit : 105 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 52 (type EXCL) for ResAllocation-PT-R003C020-CTLCardinality-10
lola: result : true
lola: markings : 53
lola: fired transitions : 59
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 63 (type EXCL) for 60 ResAllocation-PT-R003C020-CTLCardinality-13
lola: time limit : 120 sec
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lola: FINISHED task # 63 (type EXCL) for ResAllocation-PT-R003C020-CTLCardinality-13
lola: result : true
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lola: result : true
lola: markings : 1921
lola: fired transitions : 4418
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lola: LAUNCH task # 4 (type EXCL) for 3 ResAllocation-PT-R003C020-CTLCardinality-01
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: FINISHED task # 4 (type EXCL) for ResAllocation-PT-R003C020-CTLCardinality-01
lola: result : true
lola: markings : 14
lola: fired transitions : 14
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 78 (type FNDP) for 27 ResAllocation-PT-R003C020-CTLCardinality-06
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 81 (type SRCH) for ResAllocation-PT-R003C020-CTLCardinality-06
lola: result : unknown
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 78 (type FNDP) for ResAllocation-PT-R003C020-CTLCardinality-06
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 79 (type EQUN) for ResAllocation-PT-R003C020-CTLCardinality-06 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: try reading problem file /home/mcc/execution/374/CTLCardinality-79.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 79 (type EQUN) for ResAllocation-PT-R003C020-CTLCardinality-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C020-CTLCardinality-01: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R003C020-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ 0 2 0 0 6 0 0 1
ResAllocation-PT-R003C020-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 CTL EXCL 5/257 6/32 ResAllocation-PT-R003C020-CTLCardinality-15 1226622 m, 245324 m/sec, 6394715 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ 0 2 0 0 6 0 0 1
ResAllocation-PT-R003C020-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 1 0 2 0 0 0

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73 CTL EXCL 10/257 11/32 ResAllocation-PT-R003C020-CTLCardinality-15 2406867 m, 236049 m/sec, 12929444 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

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ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
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73 CTL EXCL 15/257 15/32 ResAllocation-PT-R003C020-CTLCardinality-15 3501650 m, 218956 m/sec, 19450287 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
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ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 1 0 2 0 0 0

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73 CTL EXCL 20/257 20/32 ResAllocation-PT-R003C020-CTLCardinality-15 4639675 m, 227605 m/sec, 25951068 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

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ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 1 0 2 0 0 0

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73 CTL EXCL 25/257 25/32 ResAllocation-PT-R003C020-CTLCardinality-15 5802486 m, 232562 m/sec, 32071310 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ 0 2 0 0 6 0 0 1
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ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
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ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 CTL EXCL 30/257 29/32 ResAllocation-PT-R003C020-CTLCardinality-15 6860878 m, 211678 m/sec, 38560677 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker

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ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ 0 2 0 0 6 0 0 1
ResAllocation-PT-R003C020-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ 0 1 0 0 2 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: FINISHED task # 75 (type EXCL) for ResAllocation-PT-R003C020-CTLCardinality-15
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ResAllocation-PT-R003C020-CTLCardinality-05
lola: time limit : 297 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C020-CTLCardinality-01: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ResAllocation-PT-R003C020-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-04: DISJ 0 1 0 0 7 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-05: CTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ 0 2 0 0 6 0 0 1
ResAllocation-PT-R003C020-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG 0 1 0 0 1 0 0 0

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25 CTL EXCL 5/297 4/32 ResAllocation-PT-R003C020-CTLCardinality-05 730689 m, 146137 m/sec, 6189653 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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25 CTL EXCL 20/297 11/32 ResAllocation-PT-R003C020-CTLCardinality-05 2602326 m, 108401 m/sec, 24229633 t fired, .

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25 CTL EXCL 25/297 14/32 ResAllocation-PT-R003C020-CTLCardinality-05 3293035 m, 138141 m/sec, 30818747 t fired, .

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25 CTL EXCL 30/297 17/32 ResAllocation-PT-R003C020-CTLCardinality-05 3949185 m, 131230 m/sec, 37595316 t fired, .

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25 CTL EXCL 35/297 20/32 ResAllocation-PT-R003C020-CTLCardinality-05 4564244 m, 123011 m/sec, 44044095 t fired, .

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25 CTL EXCL 40/297 22/32 ResAllocation-PT-R003C020-CTLCardinality-05 5180566 m, 123264 m/sec, 50327886 t fired, .

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25 CTL EXCL 45/297 25/32 ResAllocation-PT-R003C020-CTLCardinality-05 5889786 m, 141844 m/sec, 56862999 t fired, .

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25 CTL EXCL 50/297 28/32 ResAllocation-PT-R003C020-CTLCardinality-05 6545318 m, 131106 m/sec, 63301426 t fired, .

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25 CTL EXCL 55/297 30/32 ResAllocation-PT-R003C020-CTLCardinality-05 7132372 m, 117410 m/sec, 69774068 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
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39 CTL EXCL 8/1164 7/32 ResAllocation-PT-R003C020-CTLCardinality-07 1693284 m, 195404 m/sec, 14399396 t fired, .

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39 CTL EXCL 13/1164 11/32 ResAllocation-PT-R003C020-CTLCardinality-07 2564594 m, 174262 m/sec, 22419325 t fired, .

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39 CTL EXCL 18/1164 14/32 ResAllocation-PT-R003C020-CTLCardinality-07 3376742 m, 162429 m/sec, 30258717 t fired, .

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39 CTL EXCL 23/1164 17/32 ResAllocation-PT-R003C020-CTLCardinality-07 4214845 m, 167620 m/sec, 38019072 t fired, .

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39 CTL EXCL 28/1164 20/32 ResAllocation-PT-R003C020-CTLCardinality-07 4976300 m, 152291 m/sec, 45592984 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
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ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
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ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
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22 CTL EXCL 20/3440 14/32 ResAllocation-PT-R003C020-CTLCardinality-04 3122258 m, 148984 m/sec, 29898582 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
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22 CTL EXCL 25/3440 16/32 ResAllocation-PT-R003C020-CTLCardinality-04 3808591 m, 137266 m/sec, 37107059 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
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22 CTL EXCL 30/3440 20/32 ResAllocation-PT-R003C020-CTLCardinality-04 4594070 m, 157095 m/sec, 44786344 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-09: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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22 CTL EXCL 35/3440 23/32 ResAllocation-PT-R003C020-CTLCardinality-04 5300535 m, 141293 m/sec, 52569006 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-09: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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22 CTL EXCL 40/3440 26/32 ResAllocation-PT-R003C020-CTLCardinality-04 6061086 m, 152110 m/sec, 60402582 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
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ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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22 CTL EXCL 45/3440 29/32 ResAllocation-PT-R003C020-CTLCardinality-04 6840294 m, 155841 m/sec, 68325558 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-09: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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22 CTL EXCL 50/3440 32/32 ResAllocation-PT-R003C020-CTLCardinality-04 7589756 m, 149892 m/sec, 76276502 t fired, .

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ResAllocation-PT-R003C020-CTLCardinality-09: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C020-CTLCardinality-00: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-01: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-02: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-04: DISJ unknown DISJ
ResAllocation-PT-R003C020-CTLCardinality-05: CTL unknown AGGR
ResAllocation-PT-R003C020-CTLCardinality-06: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-07: CTL unknown AGGR
ResAllocation-PT-R003C020-CTLCardinality-08: EG true state space / EG
ResAllocation-PT-R003C020-CTLCardinality-09: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-10: DISJ true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-11: CTL true CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-12: CTL false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-13: CONJ true CONJ
ResAllocation-PT-R003C020-CTLCardinality-14: AFAG false CTL model checker
ResAllocation-PT-R003C020-CTLCardinality-15: DISJ true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C020"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R003C020, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000705"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C020.tgz
mv ResAllocation-PT-R003C020 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;