Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199900698.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R003C015, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199900698
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 548K
-rw-r--r-- 1 mcc users 6.8K Feb 25 15:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 15:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 15:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 15:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Feb 25 15:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 15:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 15:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 15:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 107K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679054485264

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R003C015
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:01:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 12:01:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:01:26] [INFO ] Load time of PNML (sax parser for PT used): 49 ms
[2023-03-17 12:01:26] [INFO ] Transformed 90 places.
[2023-03-17 12:01:26] [INFO ] Transformed 60 transitions.
[2023-03-17 12:01:27] [INFO ] Parsed PT model containing 90 places and 60 transitions and 264 arcs in 269 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 84 out of 90 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 9 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
// Phase 1: matrix 60 rows 90 cols
[2023-03-17 12:01:27] [INFO ] Computed 45 place invariants in 14 ms
[2023-03-17 12:01:27] [INFO ] Implicit Places using invariants in 169 ms returned []
[2023-03-17 12:01:27] [INFO ] Invariant cache hit.
[2023-03-17 12:01:27] [INFO ] Implicit Places using invariants and state equation in 74 ms returned []
Implicit Place search using SMT with State Equation took 264 ms to find 0 implicit places.
[2023-03-17 12:01:27] [INFO ] Invariant cache hit.
[2023-03-17 12:01:27] [INFO ] Dead Transitions using invariants and state equation in 50 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 325 ms. Remains : 90/90 places, 60/60 transitions.
Support contains 84 out of 90 places after structural reductions.
[2023-03-17 12:01:27] [INFO ] Flatten gal took : 25 ms
[2023-03-17 12:01:27] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:01:27] [INFO ] Input system was already deterministic with 60 transitions.
Incomplete random walk after 10000 steps, including 298 resets, run finished after 439 ms. (steps per millisecond=22 ) properties (out of 68) seen :64
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 4 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-17 12:01:28] [INFO ] Invariant cache hit.
[2023-03-17 12:01:28] [INFO ] [Real]Absence check using 45 positive place invariants in 7 ms returned sat
[2023-03-17 12:01:28] [INFO ] After 26ms SMT Verify possible using state equation in real domain returned unsat :3 sat :1
[2023-03-17 12:01:28] [INFO ] After 37ms SMT Verify possible using trap constraints in real domain returned unsat :3 sat :0 real:1
[2023-03-17 12:01:28] [INFO ] After 139ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:1
[2023-03-17 12:01:28] [INFO ] [Nat]Absence check using 45 positive place invariants in 9 ms returned sat
[2023-03-17 12:01:28] [INFO ] After 25ms SMT Verify possible using state equation in natural domain returned unsat :3 sat :1
[2023-03-17 12:01:28] [INFO ] After 34ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :1
Attempting to minimize the solution found.
Minimization took 8 ms.
[2023-03-17 12:01:28] [INFO ] After 83ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :1
Fused 4 Parikh solutions to 1 different solutions.
Finished Parikh walk after 16 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=8 )
Parikh walk visited 1 properties in 2 ms.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 0 with 29 rules applied. Total rules applied 29 place count 75 transition count 46
Applied a total of 29 rules in 15 ms. Remains 75 /90 variables (removed 15) and now considering 46/60 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 75/90 places, 46/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 84 transition count 54
Applied a total of 12 rules in 6 ms. Remains 84 /90 variables (removed 6) and now considering 54/60 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 84/90 places, 54/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 0 with 23 rules applied. Total rules applied 23 place count 78 transition count 49
Applied a total of 23 rules in 7 ms. Remains 78 /90 variables (removed 12) and now considering 49/60 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 78/90 places, 49/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Performed 13 Post agglomeration using F-continuation condition.Transition count delta: 13
Deduced a syphon composed of 13 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 0 with 27 rules applied. Total rules applied 27 place count 76 transition count 47
Applied a total of 27 rules in 8 ms. Remains 76 /90 variables (removed 14) and now considering 47/60 (removed 13) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 76/90 places, 47/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 47 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 3 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 2 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 90/90 places, 60/60 transitions.
Applied a total of 0 rules in 1 ms. Remains 90 /90 variables (removed 0) and now considering 60/60 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 90/90 places, 60/60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:01:28] [INFO ] Input system was already deterministic with 60 transitions.
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:01:28] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:01:28] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 12:01:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 90 places, 60 transitions and 264 arcs took 1 ms.
Total runtime 2205 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R003C015
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
CTLFireability

FORMULA ResAllocation-PT-R003C015-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C015-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679054770341

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
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13 CTL EXCL 21/3385 12/32 ResAllocation-PT-R003C015-CTLFireability-04 2660720 m, 165453 m/sec, 33619952 t fired, .

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13 CTL EXCL 26/3385 13/32 ResAllocation-PT-R003C015-CTLFireability-04 3089097 m, 85675 m/sec, 42511427 t fired, .

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13 CTL EXCL 31/3385 15/32 ResAllocation-PT-R003C015-CTLFireability-04 3532737 m, 88728 m/sec, 50638459 t fired, .

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13 CTL EXCL 36/3385 19/32 ResAllocation-PT-R003C015-CTLFireability-04 4350601 m, 163572 m/sec, 59169133 t fired, .

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13 CTL EXCL 41/3385 21/32 ResAllocation-PT-R003C015-CTLFireability-04 4775214 m, 84922 m/sec, 67837410 t fired, .

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13 CTL EXCL 46/3385 23/32 ResAllocation-PT-R003C015-CTLFireability-04 5249730 m, 94903 m/sec, 76198599 t fired, .

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ResAllocation-PT-R003C015-CTLFireability-00: CTL unknown AGGR
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ResAllocation-PT-R003C015-CTLFireability-06: CTL true CTL model checker
ResAllocation-PT-R003C015-CTLFireability-07: CTL unknown AGGR
ResAllocation-PT-R003C015-CTLFireability-08: DISJ false DISJ
ResAllocation-PT-R003C015-CTLFireability-09: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C015"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R003C015, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199900698"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C015.tgz
mv ResAllocation-PT-R003C015 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;