Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199900682.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R003C005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199900682
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users 5.9K Feb 25 15:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 25 15:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 15:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 25 15:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 15:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 15:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 15:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 15:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 35K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679054406228

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R003C005
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:00:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 12:00:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:00:07] [INFO ] Load time of PNML (sax parser for PT used): 28 ms
[2023-03-17 12:00:07] [INFO ] Transformed 30 places.
[2023-03-17 12:00:07] [INFO ] Transformed 20 transitions.
[2023-03-17 12:00:07] [INFO ] Parsed PT model containing 30 places and 20 transitions and 84 arcs in 84 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 3 formulas.
FORMULA ResAllocation-PT-R003C005-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R003C005-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R003C005-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 98 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
// Phase 1: matrix 20 rows 30 cols
[2023-03-17 12:00:08] [INFO ] Computed 15 place invariants in 7 ms
[2023-03-17 12:00:08] [INFO ] Implicit Places using invariants in 131 ms returned []
[2023-03-17 12:00:08] [INFO ] Invariant cache hit.
[2023-03-17 12:00:08] [INFO ] Implicit Places using invariants and state equation in 47 ms returned []
Implicit Place search using SMT with State Equation took 318 ms to find 0 implicit places.
[2023-03-17 12:00:08] [INFO ] Invariant cache hit.
[2023-03-17 12:00:08] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 462 ms. Remains : 30/30 places, 20/20 transitions.
Support contains 30 out of 30 places after structural reductions.
[2023-03-17 12:00:08] [INFO ] Flatten gal took : 16 ms
[2023-03-17 12:00:08] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:00:08] [INFO ] Input system was already deterministic with 20 transitions.
Incomplete random walk after 10000 steps, including 759 resets, run finished after 366 ms. (steps per millisecond=27 ) properties (out of 37) seen :32
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 191 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 175 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 192 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-17 12:00:09] [INFO ] Invariant cache hit.
[2023-03-17 12:00:09] [INFO ] [Real]Absence check using 15 positive place invariants in 3 ms returned sat
[2023-03-17 12:00:09] [INFO ] After 77ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 13 simplifications.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 4 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 19 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 15 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 0 with 9 rules applied. Total rules applied 9 place count 25 transition count 16
Applied a total of 9 rules in 7 ms. Remains 25 /30 variables (removed 5) and now considering 16/20 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 25/30 places, 16/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 11 rules applied. Total rules applied 11 place count 24 transition count 15
Applied a total of 11 rules in 3 ms. Remains 24 /30 variables (removed 6) and now considering 15/20 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 24/30 places, 15/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 15 transitions.
Finished random walk after 14 steps, including 1 resets, run visited all 1 properties in 1 ms. (steps per millisecond=14 )
FORMULA ResAllocation-PT-R003C005-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 28 transition count 19
Applied a total of 3 rules in 2 ms. Remains 28 /30 variables (removed 2) and now considering 19/20 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 28/30 places, 19/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 19 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 20/20 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 20/20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Input system was already deterministic with 20 transitions.
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 12:00:09] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 12:00:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 20 transitions and 84 arcs took 1 ms.
Total runtime 1818 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R003C005
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA ResAllocation-PT-R003C005-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R003C005-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679054410673

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type EXCL) for 9 ResAllocation-PT-R003C005-CTLFireability-04
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type CNST) for 28 ResAllocation-PT-R003C005-CTLFireability-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 29 (type CNST) for ResAllocation-PT-R003C005-CTLFireability-05
lola: result : true
lola: FINISHED task # 56 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-04
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 37 ResAllocation-PT-R003C005-CTLFireability-10
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-10
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 35 (type EXCL) for 34 ResAllocation-PT-R003C005-CTLFireability-08
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-08
lola: result : true
lola: markings : 33
lola: fired transitions : 95
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 51 (type EXCL) for 50 ResAllocation-PT-R003C005-CTLFireability-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 51 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-13
lola: result : false
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 31 ResAllocation-PT-R003C005-CTLFireability-07
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-07
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 54 (type EXCL) for 53 ResAllocation-PT-R003C005-CTLFireability-15
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-15
lola: result : true
lola: markings : 1
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 48 (type EXCL) for 47 ResAllocation-PT-R003C005-CTLFireability-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-12
lola: result : false
lola: markings : 442
lola: fired transitions : 1219
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 1 (type EXCL) for 0 ResAllocation-PT-R003C005-CTLFireability-00
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 1 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-00
lola: result : true
lola: markings : 70
lola: fired transitions : 91
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 60 (type EXCL) for 37 ResAllocation-PT-R003C005-CTLFireability-10
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type FNDP) for 37 ResAllocation-PT-R003C005-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 37 ResAllocation-PT-R003C005-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SRCH) for 37 ResAllocation-PT-R003C005-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 60 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 61 (type SRCH) for ResAllocation-PT-R003C005-CTLFireability-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for ResAllocation-PT-R003C005-CTLFireability-10 (obsolete)
lola: CANCELED task # 59 (type EQUN) for ResAllocation-PT-R003C005-CTLFireability-10 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 58 (type FNDP) for ResAllocation-PT-R003C005-CTLFireability-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 45 (type EXCL) for 44 ResAllocation-PT-R003C005-CTLFireability-11
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EQUN) for ResAllocation-PT-R003C005-CTLFireability-10
lola: result : unknown
lola: FINISHED task # 45 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-11
lola: result : false
lola: markings : 26
lola: fired transitions : 28
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ResAllocation-PT-R003C005-CTLFireability-02
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-02
lola: result : false
lola: markings : 225
lola: fired transitions : 606
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ResAllocation-PT-R003C005-CTLFireability-01
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ResAllocation-PT-R003C005-CTLFireability-01
lola: result : false
lola: markings : 40
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R003C005-CTLFireability-00: CTL true CTL model checker
ResAllocation-PT-R003C005-CTLFireability-01: CTL false CTL model checker
ResAllocation-PT-R003C005-CTLFireability-02: CTL false CTL model checker
ResAllocation-PT-R003C005-CTLFireability-04: CONJ false state space /EXEF
ResAllocation-PT-R003C005-CTLFireability-05: INITIAL true preprocessing
ResAllocation-PT-R003C005-CTLFireability-07: F false state space / EG
ResAllocation-PT-R003C005-CTLFireability-08: CTL true CTL model checker
ResAllocation-PT-R003C005-CTLFireability-10: DISJ true state space
ResAllocation-PT-R003C005-CTLFireability-11: CTL false CTL model checker
ResAllocation-PT-R003C005-CTLFireability-12: CTL false CTL model checker
ResAllocation-PT-R003C005-CTLFireability-13: CTL false CTL model checker
ResAllocation-PT-R003C005-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R003C005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199900682"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C005.tgz
mv ResAllocation-PT-R003C005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;