Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199800578.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-010010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199800578
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 7.1K Feb 26 16:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 16:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 16:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 16:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Feb 26 16:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 99K Feb 26 16:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 16:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 16:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 24K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-00
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-01
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-02
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-03
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-04
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-05
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-06
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-07
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-08
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-09
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-10
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-11
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-12
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-13
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-14
FORMULA_NAME RefineWMG-PT-010010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679052665879

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-010010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:31:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:31:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:31:07] [INFO ] Load time of PNML (sax parser for PT used): 28 ms
[2023-03-17 11:31:07] [INFO ] Transformed 54 places.
[2023-03-17 11:31:07] [INFO ] Transformed 43 transitions.
[2023-03-17 11:31:07] [INFO ] Parsed PT model containing 54 places and 43 transitions and 128 arcs in 89 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 49 out of 54 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 10 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:31:07] [INFO ] Computed 22 place invariants in 8 ms
[2023-03-17 11:31:07] [INFO ] Dead Transitions using invariants and state equation in 173 ms found 0 transitions.
[2023-03-17 11:31:07] [INFO ] Invariant cache hit.
[2023-03-17 11:31:07] [INFO ] Implicit Places using invariants in 42 ms returned []
[2023-03-17 11:31:07] [INFO ] Invariant cache hit.
[2023-03-17 11:31:07] [INFO ] Implicit Places using invariants and state equation in 51 ms returned []
Implicit Place search using SMT with State Equation took 95 ms to find 0 implicit places.
[2023-03-17 11:31:07] [INFO ] Invariant cache hit.
[2023-03-17 11:31:07] [INFO ] Dead Transitions using invariants and state equation in 51 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 353 ms. Remains : 54/54 places, 43/43 transitions.
Support contains 49 out of 54 places after structural reductions.
[2023-03-17 11:31:08] [INFO ] Flatten gal took : 19 ms
[2023-03-17 11:31:08] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:31:08] [INFO ] Input system was already deterministic with 43 transitions.
Incomplete random walk after 10007 steps, including 2 resets, run finished after 291 ms. (steps per millisecond=34 ) properties (out of 53) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 4) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-17 11:31:08] [INFO ] Invariant cache hit.
[2023-03-17 11:31:08] [INFO ] [Real]Absence check using 22 positive place invariants in 7 ms returned sat
[2023-03-17 11:31:08] [INFO ] After 200ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-03-17 11:31:08] [INFO ] [Nat]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 11:31:08] [INFO ] After 22ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :1
[2023-03-17 11:31:08] [INFO ] After 35ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :1
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-17 11:31:08] [INFO ] After 84ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :1
Fused 2 Parikh solutions to 1 different solutions.
Finished Parikh walk after 172 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=86 )
Parikh walk visited 1 properties in 3 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-17 11:31:08] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:31:08] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 24 edges and 54 vertex of which 16 / 54 are part of one of the 8 SCC in 2 ms
Free SCC test removed 8 places
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 8 place count 38 transition count 28
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 1 with 24 rules applied. Total rules applied 32 place count 22 transition count 20
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 3 rules applied. Total rules applied 35 place count 22 transition count 17
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 38 place count 19 transition count 17
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 38 place count 19 transition count 15
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 42 place count 17 transition count 15
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 44 place count 16 transition count 14
Applied a total of 44 rules in 10 ms. Remains 16 /54 variables (removed 38) and now considering 14/43 (removed 29) transitions.
// Phase 1: matrix 14 rows 16 cols
[2023-03-17 11:31:09] [INFO ] Computed 6 place invariants in 0 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 44 ms. Remains : 16/54 places, 14/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:31:09] [INFO ] Computed 22 place invariants in 1 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 28 edges and 54 vertex of which 18 / 54 are part of one of the 9 SCC in 1 ms
Free SCC test removed 9 places
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 9 place count 36 transition count 26
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Deduced a syphon composed of 10 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 1 with 30 rules applied. Total rules applied 39 place count 16 transition count 16
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 1 with 8 rules applied. Total rules applied 47 place count 16 transition count 8
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 55 place count 8 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 55 place count 8 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 57 place count 7 transition count 7
Applied a total of 57 rules in 4 ms. Remains 7 /54 variables (removed 47) and now considering 7/43 (removed 36) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-17 11:31:09] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 17 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 7/54 places, 7/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 7 transitions.
Finished random walk after 14 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=14 )
FORMULA RefineWMG-PT-010010-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:31:09] [INFO ] Computed 22 place invariants in 4 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 14 edges and 54 vertex of which 10 / 54 are part of one of the 5 SCC in 0 ms
Free SCC test removed 5 places
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Reduce places removed 5 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 44 transition count 34
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 1 with 12 rules applied. Total rules applied 17 place count 36 transition count 30
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 17 place count 36 transition count 29
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 19 place count 35 transition count 29
Applied a total of 19 rules in 3 ms. Remains 35 /54 variables (removed 19) and now considering 29/43 (removed 14) transitions.
// Phase 1: matrix 29 rows 35 cols
[2023-03-17 11:31:09] [INFO ] Computed 13 place invariants in 0 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 35/54 places, 29/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 29 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 24 edges and 54 vertex of which 16 / 54 are part of one of the 8 SCC in 0 ms
Free SCC test removed 8 places
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 8 place count 38 transition count 28
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 1 with 24 rules applied. Total rules applied 32 place count 22 transition count 20
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 3 rules applied. Total rules applied 35 place count 22 transition count 17
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 38 place count 19 transition count 17
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 38 place count 19 transition count 15
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 42 place count 17 transition count 15
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 44 place count 16 transition count 14
Applied a total of 44 rules in 5 ms. Remains 16 /54 variables (removed 38) and now considering 14/43 (removed 29) transitions.
// Phase 1: matrix 14 rows 16 cols
[2023-03-17 11:31:09] [INFO ] Computed 6 place invariants in 0 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 16/54 places, 14/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:31:09] [INFO ] Computed 22 place invariants in 1 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:31:09] [INFO ] Invariant cache hit.
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 29 edges and 54 vertex of which 20 / 54 are part of one of the 10 SCC in 1 ms
Free SCC test removed 10 places
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Reduce places removed 10 places and 0 transitions.
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 0 with 9 rules applied. Total rules applied 10 place count 34 transition count 24
Performed 9 Post agglomeration using F-continuation condition.Transition count delta: 9
Deduced a syphon composed of 9 places in 0 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 1 with 27 rules applied. Total rules applied 37 place count 16 transition count 15
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 1 with 7 rules applied. Total rules applied 44 place count 16 transition count 8
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 51 place count 9 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 51 place count 9 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 53 place count 8 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 55 place count 7 transition count 6
Applied a total of 55 rules in 3 ms. Remains 7 /54 variables (removed 47) and now considering 6/43 (removed 37) transitions.
// Phase 1: matrix 6 rows 7 cols
[2023-03-17 11:31:09] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 20 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 7/54 places, 6/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 6 transitions.
Finished random walk after 5 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=5 )
FORMULA RefineWMG-PT-010010-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:31:09] [INFO ] Computed 22 place invariants in 3 ms
[2023-03-17 11:31:09] [INFO ] Dead Transitions using invariants and state equation in 57 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Input system was already deterministic with 43 transitions.
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:31:09] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:31:09] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 11:31:09] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 43 transitions and 128 arcs took 0 ms.
Total runtime 2499 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-010010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA RefineWMG-PT-010010-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679052882142

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 18 (type EXCL) for 17 RefineWMG-PT-010010-CTLFireability-03
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

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RefineWMG-PT-010010-CTLFireability-00: DISJ 0 3 0 0 3 0 0 0
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RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
18 CTL EXCL 5/225 8/32 RefineWMG-PT-010010-CTLFireability-03 1721574 m, 344314 m/sec, 6689541 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
18 CTL EXCL 10/225 14/32 RefineWMG-PT-010010-CTLFireability-03 3230603 m, 301805 m/sec, 13370522 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
18 CTL EXCL 15/225 20/32 RefineWMG-PT-010010-CTLFireability-03 4677625 m, 289404 m/sec, 20217659 t fired, .

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18 CTL EXCL 20/225 26/32 RefineWMG-PT-010010-CTLFireability-03 6192336 m, 302942 m/sec, 26674964 t fired, .

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RefineWMG-PT-010010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
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24 CTL EXCL 20/383 16/32 RefineWMG-PT-010010-CTLFireability-05 3737338 m, 244376 m/sec, 29765739 t fired, .

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RefineWMG-PT-010010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 25/383 21/32 RefineWMG-PT-010010-CTLFireability-05 4931801 m, 238892 m/sec, 35767334 t fired, .

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RefineWMG-PT-010010-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 30/383 26/32 RefineWMG-PT-010010-CTLFireability-05 6169567 m, 247553 m/sec, 42044206 t fired, .

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RefineWMG-PT-010010-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker

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RefineWMG-PT-010010-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 CTL EXCL 35/383 31/32 RefineWMG-PT-010010-CTLFireability-05 7410541 m, 248194 m/sec, 48212425 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-010010-CTLFireability-09: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RefineWMG-PT-010010-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
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RefineWMG-PT-010010-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-010010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 5/426 10/32 RefineWMG-PT-010010-CTLFireability-04 2157306 m, 431461 m/sec, 7595736 t fired, .

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RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker

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RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
RefineWMG-PT-010010-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
21 CTL EXCL 10/426 19/32 RefineWMG-PT-010010-CTLFireability-04 4275718 m, 423682 m/sec, 14856445 t fired, .

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RefineWMG-PT-010010-CTLFireability-09: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker

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RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
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21 CTL EXCL 15/426 28/32 RefineWMG-PT-010010-CTLFireability-04 6401794 m, 425215 m/sec, 22208065 t fired, .

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RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker

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RefineWMG-PT-010010-CTLFireability-11: EFAG 0 1 0 0 1 0 0 0
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lola: result : true
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lola: result : false
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lola: result : false
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lola: result : false
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lola: result : true
lola: markings : 28
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lola: result : true
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lola: time used : 0.000000
lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-010010-CTLFireability-00: DISJ false DISJ
RefineWMG-PT-010010-CTLFireability-01: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-02: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-03: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-04: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-05: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-06: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-08: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-09: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-010010-CTLFireability-11: EFAG false tscc_search
RefineWMG-PT-010010-CTLFireability-12: CTL unknown AGGR
RefineWMG-PT-010010-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010010-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-010010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-010010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199800578"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-010010.tgz
mv RefineWMG-PT-010010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;