Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199600466.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Referendum-PT-0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199600466
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 636K
-rw-r--r-- 1 mcc users 11K Feb 26 17:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 26 17:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 26 17:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 87K Feb 26 17:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.1K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 36K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 17:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 125K Feb 26 17:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 26 17:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 147K Feb 26 17:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 12K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0010-CTLFireability-00
FORMULA_NAME Referendum-PT-0010-CTLFireability-01
FORMULA_NAME Referendum-PT-0010-CTLFireability-02
FORMULA_NAME Referendum-PT-0010-CTLFireability-03
FORMULA_NAME Referendum-PT-0010-CTLFireability-04
FORMULA_NAME Referendum-PT-0010-CTLFireability-05
FORMULA_NAME Referendum-PT-0010-CTLFireability-06
FORMULA_NAME Referendum-PT-0010-CTLFireability-07
FORMULA_NAME Referendum-PT-0010-CTLFireability-08
FORMULA_NAME Referendum-PT-0010-CTLFireability-09
FORMULA_NAME Referendum-PT-0010-CTLFireability-10
FORMULA_NAME Referendum-PT-0010-CTLFireability-11
FORMULA_NAME Referendum-PT-0010-CTLFireability-12
FORMULA_NAME Referendum-PT-0010-CTLFireability-13
FORMULA_NAME Referendum-PT-0010-CTLFireability-14
FORMULA_NAME Referendum-PT-0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679049505059

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Referendum-PT-0010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:38:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:38:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:38:26] [INFO ] Load time of PNML (sax parser for PT used): 21 ms
[2023-03-17 10:38:26] [INFO ] Transformed 31 places.
[2023-03-17 10:38:26] [INFO ] Transformed 21 transitions.
[2023-03-17 10:38:26] [INFO ] Found NUPN structural information;
[2023-03-17 10:38:26] [INFO ] Parsed PT model containing 31 places and 21 transitions and 51 arcs in 79 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Support contains 11 out of 31 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 31/31 places, 21/21 transitions.
Reduce places removed 20 places and 0 transitions.
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 0 with 30 rules applied. Total rules applied 30 place count 11 transition count 11
Applied a total of 30 rules in 8 ms. Remains 11 /31 variables (removed 20) and now considering 11/21 (removed 10) transitions.
// Phase 1: matrix 11 rows 11 cols
[2023-03-17 10:38:26] [INFO ] Computed 0 place invariants in 4 ms
[2023-03-17 10:38:26] [INFO ] Implicit Places using invariants in 113 ms returned []
[2023-03-17 10:38:26] [INFO ] Invariant cache hit.
[2023-03-17 10:38:27] [INFO ] Implicit Places using invariants and state equation in 265 ms returned []
Implicit Place search using SMT with State Equation took 402 ms to find 0 implicit places.
[2023-03-17 10:38:27] [INFO ] Invariant cache hit.
[2023-03-17 10:38:27] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 11/31 places, 11/21 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 446 ms. Remains : 11/31 places, 11/21 transitions.
Support contains 11 out of 11 places after structural reductions.
[2023-03-17 10:38:27] [INFO ] Flatten gal took : 16 ms
[2023-03-17 10:38:27] [INFO ] Flatten gal took : 5 ms
[2023-03-17 10:38:27] [INFO ] Input system was already deterministic with 11 transitions.
Incomplete random walk after 10000 steps, including 833 resets, run finished after 333 ms. (steps per millisecond=30 ) properties (out of 37) seen :32
Incomplete Best-First random walk after 10001 steps, including 151 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 151 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 151 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 151 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 151 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-17 10:38:27] [INFO ] Invariant cache hit.
[2023-03-17 10:38:27] [INFO ] After 57ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:2
[2023-03-17 10:38:27] [INFO ] After 62ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 16 simplifications.
[2023-03-17 10:38:27] [INFO ] Flatten gal took : 5 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 4 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Computed a total of 11 stabilizing places and 11 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 11 transition count 11
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 5 formulas.
FORMULA Referendum-PT-0010-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 2 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Referendum-PT-0010-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Support contains 0 out of 11 places (down from 11) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Graph (complete) has 10 edges and 11 vertex of which 6 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.1 ms
Discarding 5 places :
Also discarding 5 output transitions
Drop transitions removed 5 transitions
Applied a total of 1 rules in 2 ms. Remains 6 /11 variables (removed 5) and now considering 6/11 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 6/11 places, 6/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Graph (complete) has 10 edges and 11 vertex of which 2 are kept as prefixes of interest. Removing 9 places using SCC suffix rule.0 ms
Discarding 9 places :
Also discarding 9 output transitions
Drop transitions removed 9 transitions
Applied a total of 1 rules in 0 ms. Remains 2 /11 variables (removed 9) and now considering 2/11 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 2/11 places, 2/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 6 transition count 6
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 6 transition count 6
Applied a total of 10 rules in 1 ms. Remains 6 /11 variables (removed 5) and now considering 6/11 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 6/11 places, 6/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 6 transitions.
Support contains 0 out of 6 places (down from 5) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 3 transition count 3
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 3 transition count 3
Applied a total of 16 rules in 1 ms. Remains 3 /11 variables (removed 8) and now considering 3/11 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 3/11 places, 3/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 8 transition count 8
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 8 transition count 8
Applied a total of 6 rules in 1 ms. Remains 8 /11 variables (removed 3) and now considering 8/11 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/11 places, 8/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 8 transition count 8
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 8 transition count 8
Applied a total of 6 rules in 0 ms. Remains 8 /11 variables (removed 3) and now considering 8/11 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/11 places, 8/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 11/11 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 11 /11 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 11/11 places, 11/11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:38:28] [INFO ] Input system was already deterministic with 11 transitions.
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:38:28] [INFO ] Flatten gal took : 3 ms
[2023-03-17 10:38:28] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 10:38:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 11 places, 11 transitions and 21 arcs took 0 ms.
Total runtime 1703 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Referendum-PT-0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/363
CTLFireability

FORMULA Referendum-PT-0010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679049509425

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/363/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/363/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/363/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 4 (type EXCL) for 3 Referendum-PT-0010-CTLFireability-01
lola: time limit : 120 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 4 (type EXCL) for Referendum-PT-0010-CTLFireability-01
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 62 (type EXCL) for 9 Referendum-PT-0010-CTLFireability-03
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for Referendum-PT-0010-CTLFireability-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 Referendum-PT-0010-CTLFireability-06
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 64 (type FNDP) for 30 Referendum-PT-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 30 Referendum-PT-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 30 Referendum-PT-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 67 (type SRCH) for Referendum-PT-0010-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 64 (type FNDP) for Referendum-PT-0010-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: CANCELED task # 65 (type EQUN) for Referendum-PT-0010-CTLFireability-07 (obsolete)
lola: FINISHED task # 28 (type EXCL) for Referendum-PT-0010-CTLFireability-06
lola: result : true
lola: markings : 64
lola: fired transitions : 133
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 Referendum-PT-0010-CTLFireability-12
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL) for Referendum-PT-0010-CTLFireability-12
lola: result : false
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 Referendum-PT-0010-CTLFireability-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 25 (type EXCL) for Referendum-PT-0010-CTLFireability-05
lola: result : true
lola: markings : 12
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 9 Referendum-PT-0010-CTLFireability-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for Referendum-PT-0010-CTLFireability-03
lola: result : false
lola: markings : 11
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH INITIAL
lola: LAUNCH task # 48 (type CNST) for 47 Referendum-PT-0010-CTLFireability-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 14 (type EXCL) for 9 Referendum-PT-0010-CTLFireability-03
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type CNST) for Referendum-PT-0010-CTLFireability-10
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 14 (type EXCL) for Referendum-PT-0010-CTLFireability-03
lola: result : false
lola: markings : 1024
lola: fired transitions : 5131
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type EXCL) for 6 Referendum-PT-0010-CTLFireability-02
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 7 (type EXCL) for Referendum-PT-0010-CTLFireability-02
lola: result : false
lola: markings : 57
lola: fired transitions : 67
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 60 (type EXCL) for 59 Referendum-PT-0010-CTLFireability-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for Referendum-PT-0010-CTLFireability-15
lola: result : false
lola: markings : 14
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 54 (type EXCL) for 53 Referendum-PT-0010-CTLFireability-13
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 54 (type EXCL) for Referendum-PT-0010-CTLFireability-13
lola: result : false
lola: markings : 12
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 56 Referendum-PT-0010-CTLFireability-14
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:755
lola: rewrite Frontend/Parser/formula_rewrite.k:690
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 57 (type EXCL) for Referendum-PT-0010-CTLFireability-14
lola: result : true
lola: markings : 12
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 68 (type EXCL) for 30 Referendum-PT-0010-CTLFireability-07
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 68 (type EXCL) for Referendum-PT-0010-CTLFireability-07
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 30 Referendum-PT-0010-CTLFireability-07
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for Referendum-PT-0010-CTLFireability-07
lola: result : true
lola: markings : 55
lola: fired transitions : 63
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Referendum-PT-0010-CTLFireability-00
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Referendum-PT-0010-CTLFireability-00
lola: result : false
lola: markings : 21
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 45 (type EXCL) for 44 Referendum-PT-0010-CTLFireability-09
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for Referendum-PT-0010-CTLFireability-09
lola: result : false
lola: markings : 3
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 Referendum-PT-0010-CTLFireability-08
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for Referendum-PT-0010-CTLFireability-08
lola: result : true
lola: markings : 14
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0010-CTLFireability-00: CTL false CTL model checker
Referendum-PT-0010-CTLFireability-01: EG false state space / EG
Referendum-PT-0010-CTLFireability-02: CTL false CTL model checker
Referendum-PT-0010-CTLFireability-03: CONJ false CONJ
Referendum-PT-0010-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0010-CTLFireability-06: CTL true CTL model checker
Referendum-PT-0010-CTLFireability-07: DISJ true CTL model checker
Referendum-PT-0010-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0010-CTLFireability-09: EGEF false CTL model checker
Referendum-PT-0010-CTLFireability-10: INITIAL true preprocessing
Referendum-PT-0010-CTLFireability-12: CTL false CTL model checker
Referendum-PT-0010-CTLFireability-13: CTL false CTL model checker
Referendum-PT-0010-CTLFireability-14: CTL true CTL model checker
Referendum-PT-0010-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Referendum-PT-0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199600466"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0010.tgz
mv Referendum-PT-0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;