fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r327-tall-167889199100059
Last Updated
May 14, 2023

About the Execution of LoLa+red for RERS17pb113-PT-8

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
9398.979 3600000.00 4120985.00 12870.20 TF?T??FTF??FFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199100059.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RERS17pb113-PT-8, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199100059
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 16M
-rw-r--r-- 1 mcc users 5.8K Feb 26 18:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 26 18:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 26 18:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 26 18:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 18:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 192K Feb 26 18:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 18:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 26 18:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 15M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-00
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-01
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-02
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-03
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-04
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-05
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-06
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-07
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-08
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-09
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-10
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-11
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-12
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-13
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-14
FORMULA_NAME RERS17pb113-PT-8-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678947634112

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb113-PT-8
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 06:20:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-16 06:20:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 06:20:36] [INFO ] Load time of PNML (sax parser for PT used): 590 ms
[2023-03-16 06:20:36] [INFO ] Transformed 639 places.
[2023-03-16 06:20:36] [INFO ] Transformed 31353 transitions.
[2023-03-16 06:20:36] [INFO ] Parsed PT model containing 639 places and 31353 transitions and 125418 arcs in 803 ms.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 9 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
FORMULA RERS17pb113-PT-8-LTLCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RERS17pb113-PT-8-LTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RERS17pb113-PT-8-LTLCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 43 out of 639 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 639/639 places, 31353/31353 transitions.
Ensure Unique test removed 12 places
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 627 transition count 31353
Applied a total of 12 rules in 229 ms. Remains 627 /639 variables (removed 12) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:20:37] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:20:37] [INFO ] Computed 13 place invariants in 113 ms
[2023-03-16 06:20:39] [INFO ] Implicit Places using invariants in 2201 ms returned []
Implicit Place search using SMT only with invariants took 2226 ms to find 0 implicit places.
[2023-03-16 06:20:39] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:20:39] [INFO ] Invariant cache hit.
[2023-03-16 06:20:48] [INFO ] Dead Transitions using invariants and state equation in 9189 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 627/639 places, 31353/31353 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11655 ms. Remains : 627/639 places, 31353/31353 transitions.
Support contains 43 out of 627 places after structural reductions.
[2023-03-16 06:20:50] [INFO ] Flatten gal took : 1079 ms
[2023-03-16 06:20:50] [INFO ] Flatten gal took : 798 ms
[2023-03-16 06:20:52] [INFO ] Input system was already deterministic with 31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 633 ms. (steps per millisecond=15 ) properties (out of 27) seen :19
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 118 ms. (steps per millisecond=84 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-16 06:20:53] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:20:53] [INFO ] Invariant cache hit.
[2023-03-16 06:20:54] [INFO ] [Real]Absence check using 13 positive place invariants in 13 ms returned sat
[2023-03-16 06:20:54] [INFO ] After 438ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:8
[2023-03-16 06:20:54] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:21:16] [INFO ] After 21674ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :8
[2023-03-16 06:21:16] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:21:19] [INFO ] After 2827ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :7
[2023-03-16 06:21:19] [INFO ] After 2829ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-16 06:21:19] [INFO ] After 25040ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Parikh walk visited 0 properties in 75 ms.
Support contains 12 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 294 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 298 ms. Remains : 627/627 places, 31353/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 495 ms. (steps per millisecond=20 ) properties (out of 8) seen :3
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-16 06:21:20] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:21:20] [INFO ] Invariant cache hit.
[2023-03-16 06:21:20] [INFO ] After 174ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 06:21:20] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:21:42] [INFO ] After 21519ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 06:21:42] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:21:45] [INFO ] After 2875ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 06:21:45] [INFO ] After 2878ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-16 06:21:45] [INFO ] After 25044ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 27 ms.
Support contains 7 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 245 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 246 ms. Remains : 627/627 places, 31353/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 391 ms. (steps per millisecond=25 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 111 ms. (steps per millisecond=90 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 5) seen :0
Interrupted probabilistic random walk after 21773 steps, run timeout after 3002 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 21773 steps, saw 19776 distinct states, run finished after 3004 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 5 properties.
[2023-03-16 06:21:49] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:21:49] [INFO ] Invariant cache hit.
[2023-03-16 06:21:50] [INFO ] After 112ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 06:21:50] [INFO ] [Nat]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:22:12] [INFO ] After 22255ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 06:22:12] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:22:15] [INFO ] After 2427ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 06:22:15] [INFO ] After 2428ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 7 ms.
[2023-03-16 06:22:15] [INFO ] After 25030ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 25 ms.
Support contains 7 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 241 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 241 ms. Remains : 627/627 places, 31353/31353 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 311 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:22:15] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:22:15] [INFO ] Invariant cache hit.
[2023-03-16 06:22:17] [INFO ] Implicit Places using invariants in 2158 ms returned []
Implicit Place search using SMT only with invariants took 2172 ms to find 0 implicit places.
[2023-03-16 06:22:17] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:22:17] [INFO ] Invariant cache hit.
[2023-03-16 06:22:27] [INFO ] Dead Transitions using invariants and state equation in 9563 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 12075 ms. Remains : 627/627 places, 31353/31353 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 627 transition count 18326
Applied a total of 13027 rules in 758 ms. Remains 627 /627 variables (removed 0) and now considering 18326/31353 (removed 13027) transitions.
Running SMT prover for 5 properties.
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:22:28] [INFO ] Computed 13 place invariants in 99 ms
[2023-03-16 06:22:28] [INFO ] After 454ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 06:22:28] [INFO ] [Nat]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:22:49] [INFO ] After 20071ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 06:22:52] [INFO ] After 23531ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 1911 ms.
[2023-03-16 06:22:54] [INFO ] After 25634ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
FORMULA RERS17pb113-PT-8-LTLCardinality-14 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 1 stabilizing places and 1 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0||(X(F(p1))&&(p0 U (p2||G(p0))))||G(F(p1)))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:22:55] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:22:55] [INFO ] Computed 13 place invariants in 93 ms
[2023-03-16 06:22:57] [INFO ] Implicit Places using invariants in 2115 ms returned []
Implicit Place search using SMT only with invariants took 2126 ms to find 0 implicit places.
[2023-03-16 06:22:57] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:22:57] [INFO ] Invariant cache hit.
[2023-03-16 06:23:06] [INFO ] Dead Transitions using invariants and state equation in 9222 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11421 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 213 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-01 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p0) (NOT p2)), acceptance={} source=0 dest: 0}, { cond=(OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(GT s286 s369), p2:(AND (GT 1 s215) (GT s286 s369)), p1:(LEQ 2 s23)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 187 reset in 3189 ms.
Product exploration explored 100000 steps with 197 reset in 2954 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2))), (X (AND (NOT p0) (NOT p2))), (X (X (AND (NOT p0) (NOT p1)))), (X (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 438 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 84 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Finished random walk after 1488 steps, including 0 resets, run visited all 3 properties in 34 ms. (steps per millisecond=43 )
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2))), (X (AND (NOT p0) (NOT p2))), (X (X (AND (NOT p0) (NOT p1)))), (X (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) (NOT p2)))), (F (NOT (AND (NOT p1) (NOT p0)))), (F (NOT (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))))]
Knowledge based reduction with 7 factoid took 405 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 74 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 73 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 06:23:14] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:23:14] [INFO ] Invariant cache hit.
Could not prove EG (AND (NOT p0) (NOT p1))
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:23:29] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:23:29] [INFO ] Invariant cache hit.
[2023-03-16 06:23:31] [INFO ] Implicit Places using invariants in 1823 ms returned []
Implicit Place search using SMT only with invariants took 1847 ms to find 0 implicit places.
[2023-03-16 06:23:31] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:23:31] [INFO ] Invariant cache hit.
[2023-03-16 06:23:40] [INFO ] Dead Transitions using invariants and state equation in 9043 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10989 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))), (X (AND (NOT p1) (NOT p0))), (X (AND (NOT p0) (NOT p2))), (X (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2)))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 388 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 97 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Finished random walk after 1291 steps, including 0 resets, run visited all 3 properties in 20 ms. (steps per millisecond=64 )
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))), (X (AND (NOT p1) (NOT p0))), (X (AND (NOT p0) (NOT p2))), (X (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2)))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) (NOT p2)))), (F (NOT (AND (NOT p1) (NOT p0)))), (F (NOT (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))))]
Knowledge based reduction with 7 factoid took 331 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 88 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 119 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 06:23:41] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:23:41] [INFO ] Invariant cache hit.
Could not prove EG (AND (NOT p0) (NOT p1))
Stuttering acceptance computed with spot in 73 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 187 reset in 2827 ms.
Product exploration explored 100000 steps with 192 reset in 2860 ms.
Applying partial POR strategy [false, true]
Stuttering acceptance computed with spot in 87 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 317 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:24:03] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:03] [INFO ] Invariant cache hit.
[2023-03-16 06:24:12] [INFO ] Dead Transitions using invariants and state equation in 8753 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9101 ms. Remains : 627/627 places, 31353/31353 transitions.
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 88 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:24:12] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:12] [INFO ] Invariant cache hit.
[2023-03-16 06:24:14] [INFO ] Implicit Places using invariants in 1933 ms returned []
Implicit Place search using SMT only with invariants took 1936 ms to find 0 implicit places.
[2023-03-16 06:24:14] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:14] [INFO ] Invariant cache hit.
[2023-03-16 06:24:23] [INFO ] Dead Transitions using invariants and state equation in 9355 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11416 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-01 finished in 90380 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(G(p0))))'
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 68 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:24:25] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:25] [INFO ] Invariant cache hit.
[2023-03-16 06:24:27] [INFO ] Implicit Places using invariants in 1940 ms returned []
Implicit Place search using SMT only with invariants took 1941 ms to find 0 implicit places.
[2023-03-16 06:24:27] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:27] [INFO ] Invariant cache hit.
[2023-03-16 06:24:36] [INFO ] Dead Transitions using invariants and state equation in 9171 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11201 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 125 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 1}], [{ cond=true, acceptance={} source=3 dest: 2}]], initial=3, aps=[p0:(AND (GT 3 s116) (GT 3 s501))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3419 ms.
Product exploration explored 100000 steps with 0 reset in 3143 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 96 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 136 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Finished random walk after 4077 steps, including 1 resets, run visited all 1 properties in 114 ms. (steps per millisecond=35 )
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 2 factoid took 110 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 110 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 137 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:24:44] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:44] [INFO ] Invariant cache hit.
[2023-03-16 06:24:46] [INFO ] Implicit Places using invariants in 1854 ms returned []
Implicit Place search using SMT only with invariants took 1864 ms to find 0 implicit places.
[2023-03-16 06:24:46] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:24:46] [INFO ] Invariant cache hit.
[2023-03-16 06:24:55] [INFO ] Dead Transitions using invariants and state equation in 8996 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10945 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 81 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 115 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Finished random walk after 630 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=126 )
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 2 factoid took 102 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 122 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 129 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 113 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 2917 ms.
Product exploration explored 100000 steps with 0 reset in 3027 ms.
Applying partial POR strategy [true, true, false, false]
Stuttering acceptance computed with spot in 126 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 176 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:25:02] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:02] [INFO ] Invariant cache hit.
[2023-03-16 06:25:10] [INFO ] Dead Transitions using invariants and state equation in 8566 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8746 ms. Remains : 627/627 places, 31353/31353 transitions.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 68 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:25:11] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:11] [INFO ] Invariant cache hit.
[2023-03-16 06:25:12] [INFO ] Implicit Places using invariants in 1802 ms returned []
Implicit Place search using SMT only with invariants took 1825 ms to find 0 implicit places.
[2023-03-16 06:25:12] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:12] [INFO ] Invariant cache hit.
[2023-03-16 06:25:21] [INFO ] Dead Transitions using invariants and state equation in 8745 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10639 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-02 finished in 57334 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 161 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:25:22] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:22] [INFO ] Invariant cache hit.
[2023-03-16 06:25:24] [INFO ] Implicit Places using invariants in 2016 ms returned []
Implicit Place search using SMT only with invariants took 2018 ms to find 0 implicit places.
[2023-03-16 06:25:25] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:25] [INFO ] Invariant cache hit.
[2023-03-16 06:25:34] [INFO ] Dead Transitions using invariants and state equation in 9018 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11199 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 52 ms :[(NOT p0)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-04 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GT s535 s599)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 3769 ms.
Product exploration explored 100000 steps with 0 reset in 3393 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 126 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 35 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 237 ms. (steps per millisecond=42 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25838 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25838 steps, saw 23391 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:25:44] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:25:44] [INFO ] Invariant cache hit.
[2023-03-16 06:25:45] [INFO ] After 75ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:25:45] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:26:01] [INFO ] After 16484ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:26:01] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:26:10] [INFO ] After 8307ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:26:10] [INFO ] After 25037ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 8 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 179 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 180 ms. Remains : 627/627 places, 31353/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 364 ms. (steps per millisecond=27 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 24901 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24901 steps, saw 22559 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:26:13] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:26:13] [INFO ] Invariant cache hit.
[2023-03-16 06:26:13] [INFO ] After 89ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:26:13] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:26:29] [INFO ] After 16010ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:26:30] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:26:38] [INFO ] After 8769ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:26:38] [INFO ] After 25025ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 7 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 176 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 176 ms. Remains : 627/627 places, 31353/31353 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 177 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:26:39] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:26:39] [INFO ] Invariant cache hit.
[2023-03-16 06:26:41] [INFO ] Implicit Places using invariants in 1916 ms returned []
Implicit Place search using SMT only with invariants took 1926 ms to find 0 implicit places.
[2023-03-16 06:26:41] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:26:41] [INFO ] Invariant cache hit.
[2023-03-16 06:26:50] [INFO ] Dead Transitions using invariants and state equation in 8841 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10973 ms. Remains : 627/627 places, 31353/31353 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 627 transition count 18326
Applied a total of 13027 rules in 639 ms. Remains 627 /627 variables (removed 0) and now considering 18326/31353 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:26:50] [INFO ] Computed 13 place invariants in 44 ms
[2023-03-16 06:26:50] [INFO ] After 156ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:26:51] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:27:11] [INFO ] After 19967ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:27:12] [INFO ] After 21007ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 959 ms.
[2023-03-16 06:27:13] [INFO ] After 22081ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 127 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 36 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 41 ms :[(NOT p0)]
[2023-03-16 06:27:13] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:27:13] [INFO ] Computed 13 place invariants in 66 ms
Could not prove EG (NOT p0)
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 158 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:27:28] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:27:28] [INFO ] Invariant cache hit.
[2023-03-16 06:27:30] [INFO ] Implicit Places using invariants in 1938 ms returned []
Implicit Place search using SMT only with invariants took 1943 ms to find 0 implicit places.
[2023-03-16 06:27:30] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:27:30] [INFO ] Invariant cache hit.
[2023-03-16 06:27:39] [INFO ] Dead Transitions using invariants and state equation in 8953 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11058 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 116 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 40 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 382 ms. (steps per millisecond=26 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25183 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25183 steps, saw 22813 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:27:43] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:27:43] [INFO ] Invariant cache hit.
[2023-03-16 06:27:43] [INFO ] After 88ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:27:43] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:27:58] [INFO ] After 14707ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:27:58] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:28:08] [INFO ] After 10092ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:28:08] [INFO ] After 25039ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 7 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 176 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 177 ms. Remains : 627/627 places, 31353/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 229 ms. (steps per millisecond=43 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25673 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25673 steps, saw 23246 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:28:12] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:28:12] [INFO ] Invariant cache hit.
[2023-03-16 06:28:12] [INFO ] After 99ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:28:12] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 06:28:26] [INFO ] After 13866ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:28:26] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 06:28:36] [INFO ] After 10515ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:28:36] [INFO ] After 24597ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 5 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 180 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 181 ms. Remains : 627/627 places, 31353/31353 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 166 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:28:37] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:28:37] [INFO ] Invariant cache hit.
[2023-03-16 06:28:38] [INFO ] Implicit Places using invariants in 1802 ms returned []
Implicit Place search using SMT only with invariants took 1823 ms to find 0 implicit places.
[2023-03-16 06:28:39] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:28:39] [INFO ] Invariant cache hit.
[2023-03-16 06:28:48] [INFO ] Dead Transitions using invariants and state equation in 9188 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11182 ms. Remains : 627/627 places, 31353/31353 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 627 transition count 18326
Applied a total of 13027 rules in 560 ms. Remains 627 /627 variables (removed 0) and now considering 18326/31353 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:28:48] [INFO ] Computed 13 place invariants in 51 ms
[2023-03-16 06:28:48] [INFO ] After 95ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:28:49] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:29:07] [INFO ] After 18117ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:29:08] [INFO ] After 19133ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 879 ms.
[2023-03-16 06:29:09] [INFO ] After 20119ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 109 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 36 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 31 ms :[(NOT p0)]
[2023-03-16 06:29:09] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:29:09] [INFO ] Computed 13 place invariants in 46 ms
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 46 ms :[(NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3170 ms.
Product exploration explored 100000 steps with 0 reset in 3190 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 160 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:29:31] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:29:31] [INFO ] Invariant cache hit.
[2023-03-16 06:29:33] [INFO ] Implicit Places using invariants in 1883 ms returned []
Implicit Place search using SMT only with invariants took 1887 ms to find 0 implicit places.
[2023-03-16 06:29:33] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:29:33] [INFO ] Invariant cache hit.
[2023-03-16 06:29:42] [INFO ] Dead Transitions using invariants and state equation in 9171 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11222 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-04 finished in 260743 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(p1)))))'
Support contains 3 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 197 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:29:43] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:29:43] [INFO ] Computed 13 place invariants in 40 ms
[2023-03-16 06:29:45] [INFO ] Implicit Places using invariants in 1878 ms returned []
Implicit Place search using SMT only with invariants took 1898 ms to find 0 implicit places.
[2023-03-16 06:29:45] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:29:45] [INFO ] Invariant cache hit.
[2023-03-16 06:29:54] [INFO ] Dead Transitions using invariants and state equation in 9091 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11189 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 101 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-05 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=p1, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(LEQ s505 s587), p1:(LEQ 3 s616)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null][true, true, true]]
Product exploration explored 100000 steps with 0 reset in 3407 ms.
Product exploration explored 100000 steps with 0 reset in 3159 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 (NOT p1)), (X p0), (X (NOT p1)), (X (X p0)), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 190 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 107 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Finished random walk after 1355 steps, including 0 resets, run visited all 2 properties in 26 ms. (steps per millisecond=52 )
Knowledge obtained : [(AND p0 (NOT p1)), (X p0), (X (NOT p1)), (X (X p0)), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT p0)), (F p1)]
Knowledge based reduction with 5 factoid took 229 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 114 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Stuttering acceptance computed with spot in 116 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
[2023-03-16 06:30:02] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:02] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
Support contains 3 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 178 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:30:17] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:17] [INFO ] Invariant cache hit.
[2023-03-16 06:30:19] [INFO ] Implicit Places using invariants in 1821 ms returned []
Implicit Place search using SMT only with invariants took 1831 ms to find 0 implicit places.
[2023-03-16 06:30:19] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:19] [INFO ] Invariant cache hit.
[2023-03-16 06:30:28] [INFO ] Dead Transitions using invariants and state equation in 8568 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10592 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 (NOT p1)), (X p0), (X (NOT p1)), (X (X p0)), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 185 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 127 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Finished random walk after 1158 steps, including 0 resets, run visited all 2 properties in 24 ms. (steps per millisecond=48 )
Knowledge obtained : [(AND p0 (NOT p1)), (X p0), (X (NOT p1)), (X (X p0)), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT p0)), (F p1)]
Knowledge based reduction with 5 factoid took 235 ms. Reduced automaton from 3 states, 6 edges and 2 AP (stutter insensitive) to 3 states, 6 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 113 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Stuttering acceptance computed with spot in 104 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
[2023-03-16 06:30:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:29] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 137 ms :[(OR (NOT p0) (NOT p1)), (NOT p0), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 2920 ms.
Product exploration explored 100000 steps with 0 reset in 3019 ms.
Support contains 3 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 157 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:30:50] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:50] [INFO ] Invariant cache hit.
[2023-03-16 06:30:52] [INFO ] Implicit Places using invariants in 1928 ms returned []
Implicit Place search using SMT only with invariants took 1933 ms to find 0 implicit places.
[2023-03-16 06:30:52] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:30:52] [INFO ] Invariant cache hit.
[2023-03-16 06:31:01] [INFO ] Dead Transitions using invariants and state equation in 8983 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11075 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-05 finished in 78954 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&G(p1)))))'
Support contains 6 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 194 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:31:02] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:31:02] [INFO ] Computed 13 place invariants in 43 ms
[2023-03-16 06:31:04] [INFO ] Implicit Places using invariants in 1969 ms returned []
Implicit Place search using SMT only with invariants took 1973 ms to find 0 implicit places.
[2023-03-16 06:31:04] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:31:04] [INFO ] Invariant cache hit.
[2023-03-16 06:31:13] [INFO ] Dead Transitions using invariants and state equation in 8750 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10919 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 126 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-06 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(OR (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}, { cond=(AND p0 p1), acceptance={} source=1 dest: 2}], [{ cond=(NOT p1), acceptance={0} source=2 dest: 1}, { cond=p1, acceptance={} source=2 dest: 2}]], initial=0, aps=[p0:(GT s142 s385), p1:(AND (GT s615 s141) (LEQ s537 s347))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3287 ms.
Product exploration explored 100000 steps with 0 reset in 3253 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 350 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 133 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Finished random walk after 3813 steps, including 1 resets, run visited all 3 properties in 66 ms. (steps per millisecond=57 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT (OR (NOT p0) (NOT p1)))), (F p1), (F (AND p0 p1))]
Knowledge based reduction with 6 factoid took 302 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 120 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Stuttering acceptance computed with spot in 124 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
[2023-03-16 06:31:21] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:31:21] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
[2023-03-16 06:31:36] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:31:36] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 6 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 80 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:31:51] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:31:51] [INFO ] Invariant cache hit.
[2023-03-16 06:31:53] [INFO ] Implicit Places using invariants in 1961 ms returned []
Implicit Place search using SMT only with invariants took 1962 ms to find 0 implicit places.
[2023-03-16 06:31:53] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:31:53] [INFO ] Invariant cache hit.
[2023-03-16 06:32:02] [INFO ] Dead Transitions using invariants and state equation in 9022 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11066 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 263 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 132 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Finished random walk after 759 steps, including 0 resets, run visited all 3 properties in 9 ms. (steps per millisecond=84 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT (OR (NOT p0) (NOT p1)))), (F p1), (F (AND p0 p1))]
Knowledge based reduction with 6 factoid took 320 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 111 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Stuttering acceptance computed with spot in 118 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
[2023-03-16 06:32:03] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:32:04] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
[2023-03-16 06:32:19] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:32:19] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 103 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 3137 ms.
Product exploration explored 100000 steps with 0 reset in 3162 ms.
Applying partial POR strategy [false, true, true]
Stuttering acceptance computed with spot in 108 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Support contains 6 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 161 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:32:40] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:32:40] [INFO ] Invariant cache hit.
[2023-03-16 06:32:50] [INFO ] Dead Transitions using invariants and state equation in 9265 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9442 ms. Remains : 627/627 places, 31353/31353 transitions.
Support contains 6 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:32:50] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:32:50] [INFO ] Invariant cache hit.
[2023-03-16 06:32:52] [INFO ] Implicit Places using invariants in 1833 ms returned []
Implicit Place search using SMT only with invariants took 1856 ms to find 0 implicit places.
[2023-03-16 06:32:52] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:32:52] [INFO ] Invariant cache hit.
[2023-03-16 06:33:01] [INFO ] Dead Transitions using invariants and state equation in 9258 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11188 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-06 finished in 120039 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X(F(p0))||G(p1)))'
Support contains 3 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 272 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:33:02] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:33:02] [INFO ] Invariant cache hit.
[2023-03-16 06:33:04] [INFO ] Implicit Places using invariants in 2149 ms returned []
Implicit Place search using SMT only with invariants took 2165 ms to find 0 implicit places.
[2023-03-16 06:33:04] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:33:04] [INFO ] Invariant cache hit.
[2023-03-16 06:33:14] [INFO ] Dead Transitions using invariants and state equation in 9453 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11903 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 118 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-07 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=(NOT p1), acceptance={} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=2 dest: 0}, { cond=(AND p1 (NOT p0)), acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(LEQ s449 s68), p1:(LEQ 2 s75)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 3374 ms.
Product exploration explored 100000 steps with 50000 reset in 3372 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND p0 (NOT p1)), (X (NOT (AND (NOT p1) (NOT p0)))), (X p0), (X (NOT (AND p1 (NOT p0)))), (X (X (NOT (AND (NOT p1) (NOT p0))))), (X (X p0)), (X (X (NOT (AND p1 (NOT p0)))))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge :(X p0)
Knowledge based reduction with 7 factoid took 134 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA RERS17pb113-PT-8-LTLCardinality-07 TRUE TECHNIQUES KNOWLEDGE
Treatment of property RERS17pb113-PT-8-LTLCardinality-07 finished in 19076 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0||G(((p0 U p1) U p2)))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 73 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:33:21] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:33:21] [INFO ] Invariant cache hit.
[2023-03-16 06:33:23] [INFO ] Implicit Places using invariants in 1883 ms returned []
Implicit Place search using SMT only with invariants took 1909 ms to find 0 implicit places.
[2023-03-16 06:33:23] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:33:23] [INFO ] Invariant cache hit.
[2023-03-16 06:33:32] [INFO ] Dead Transitions using invariants and state equation in 9275 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11274 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 276 ms :[(AND (NOT p0) (NOT p2)), (AND (NOT p0) (NOT p2)), true, (NOT p2), (NOT p2), (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p0) (NOT p2) p1), acceptance={} source=1 dest: 3}, { cond=(OR (AND (NOT p0) p2) (AND (NOT p0) p1)), acceptance={} source=1 dest: 4}], [{ cond=true, acceptance={0} source=2 dest: 2}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p1)), acceptance={0} source=3 dest: 2}, { cond=(OR (AND p0 (NOT p2)) (AND (NOT p2) p1)), acceptance={0} source=3 dest: 3}, { cond=(AND p0 (NOT p2) (NOT p1)), acceptance={0} source=3 dest: 5}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=4 dest: 2}, { cond=(OR (AND p0 (NOT p2)) (AND (NOT p2) p1)), acceptance={} source=4 dest: 3}, { cond=(OR p0 p2 p1), acceptance={} source=4 dest: 4}, { cond=(AND p0 (NOT p2) (NOT p1)), acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=5 dest: 2}, { cond=(AND p0 (NOT p1)), acceptance={0} source=5 dest: 5}]], initial=0, aps=[p0:(LEQ 1 s103), p2:(LEQ 3 s466), p1:(LEQ s614 s207)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 18510 steps with 0 reset in 557 ms.
FORMULA RERS17pb113-PT-8-LTLCardinality-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-8-LTLCardinality-08 finished in 12198 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0))||G(p1)))'
Support contains 3 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 161 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:33:33] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:33:33] [INFO ] Computed 13 place invariants in 48 ms
[2023-03-16 06:33:35] [INFO ] Implicit Places using invariants in 2042 ms returned []
Implicit Place search using SMT only with invariants took 2048 ms to find 0 implicit places.
[2023-03-16 06:33:35] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:33:35] [INFO ] Invariant cache hit.
[2023-03-16 06:33:45] [INFO ] Dead Transitions using invariants and state equation in 9100 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11312 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 74 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-09 automaton TGBA Formula[mat=[[{ cond=p1, acceptance={} source=0 dest: 0}, { cond=(NOT p1), acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(LEQ s447 s277), p0:(OR (GT s447 s277) (GT 1 s396))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 3131 ms.
Product exploration explored 100000 steps with 0 reset in 3134 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 p0), (X p0), (X p1), (X (X p0)), (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 182 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 86 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 262 ms. (steps per millisecond=38 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:33:52] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:33:52] [INFO ] Invariant cache hit.
[2023-03-16 06:33:52] [INFO ] After 99ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:33:52] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:34:08] [INFO ] After 15989ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:34:08] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:34:14] [INFO ] After 6493ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 06:34:16] [INFO ] Deduced a trap composed of 40 places in 1020 ms of which 2 ms to minimize.
[2023-03-16 06:34:18] [INFO ] Deduced a trap composed of 64 places in 822 ms of which 2 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:34:18] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:34:18] [INFO ] After 25747ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 151 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 234 ms. (steps per millisecond=42 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25875 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25875 steps, saw 23442 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:34:21] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:34:21] [INFO ] Invariant cache hit.
[2023-03-16 06:34:21] [INFO ] After 84ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:34:21] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:34:37] [INFO ] After 15764ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:34:37] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:34:44] [INFO ] After 6579ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 06:34:46] [INFO ] Deduced a trap composed of 40 places in 1467 ms of which 1 ms to minimize.
[2023-03-16 06:34:49] [INFO ] Deduced a trap composed of 64 places in 2823 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:34:49] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:34:49] [INFO ] After 27849ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 151 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:34:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:34:49] [INFO ] Invariant cache hit.
[2023-03-16 06:34:51] [INFO ] Implicit Places using invariants in 2063 ms returned []
Implicit Place search using SMT only with invariants took 2072 ms to find 0 implicit places.
[2023-03-16 06:34:51] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:34:51] [INFO ] Invariant cache hit.
[2023-03-16 06:35:00] [INFO ] Dead Transitions using invariants and state equation in 9144 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11371 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 542 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:35:01] [INFO ] Computed 13 place invariants in 45 ms
[2023-03-16 06:35:01] [INFO ] After 94ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:35:01] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 06:35:16] [INFO ] After 14782ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:35:17] [INFO ] After 15766ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 711 ms.
[2023-03-16 06:35:18] [INFO ] After 16586ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND p1 p0), (X p0), (X p1), (X (X p0)), (X (X p1))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 240 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 63 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Stuttering acceptance computed with spot in 67 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Support contains 3 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 159 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:35:18] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:35:18] [INFO ] Computed 13 place invariants in 54 ms
[2023-03-16 06:35:20] [INFO ] Implicit Places using invariants in 1957 ms returned []
Implicit Place search using SMT only with invariants took 1980 ms to find 0 implicit places.
[2023-03-16 06:35:20] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:35:20] [INFO ] Invariant cache hit.
[2023-03-16 06:35:29] [INFO ] Dead Transitions using invariants and state equation in 8901 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11053 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 p0), (X p0), (X p1), (X (X p0)), (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 176 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 70 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 268 ms. (steps per millisecond=37 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:35:30] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:35:30] [INFO ] Invariant cache hit.
[2023-03-16 06:35:30] [INFO ] After 96ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:35:30] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:35:46] [INFO ] After 15591ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:35:46] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:35:52] [INFO ] After 6466ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 06:35:54] [INFO ] Deduced a trap composed of 40 places in 1040 ms of which 3 ms to minimize.
[2023-03-16 06:35:55] [INFO ] Deduced a trap composed of 64 places in 792 ms of which 0 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:35:55] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:35:55] [INFO ] After 25287ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 184 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 184 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 201 ms. (steps per millisecond=49 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 26201 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 26201 steps, saw 23737 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:35:59] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:35:59] [INFO ] Invariant cache hit.
[2023-03-16 06:35:59] [INFO ] After 96ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:35:59] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 06:36:15] [INFO ] After 16209ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:36:15] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:36:22] [INFO ] After 6584ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 06:36:24] [INFO ] Deduced a trap composed of 40 places in 980 ms of which 0 ms to minimize.
[2023-03-16 06:36:27] [INFO ] Deduced a trap composed of 64 places in 2428 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:36:27] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:36:27] [INFO ] After 27473ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 153 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 154 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 154 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:36:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:36:27] [INFO ] Invariant cache hit.
[2023-03-16 06:36:29] [INFO ] Implicit Places using invariants in 1949 ms returned []
Implicit Place search using SMT only with invariants took 1954 ms to find 0 implicit places.
[2023-03-16 06:36:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:36:29] [INFO ] Invariant cache hit.
[2023-03-16 06:36:38] [INFO ] Dead Transitions using invariants and state equation in 9037 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11161 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 520 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:36:38] [INFO ] Computed 13 place invariants in 54 ms
[2023-03-16 06:36:39] [INFO ] After 77ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:36:39] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:36:53] [INFO ] After 14835ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:36:54] [INFO ] After 15828ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 719 ms.
[2023-03-16 06:36:55] [INFO ] After 16661ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND p1 p0), (X p0), (X p1), (X (X p0)), (X (X p1))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 254 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 72 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Stuttering acceptance computed with spot in 67 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Stuttering acceptance computed with spot in 79 ms :[(AND (NOT p1) (NOT p0)), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3162 ms.
Product exploration explored 100000 steps with 0 reset in 3197 ms.
Support contains 3 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 155 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:37:02] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:37:02] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 06:37:04] [INFO ] Implicit Places using invariants in 1984 ms returned []
Implicit Place search using SMT only with invariants took 1998 ms to find 0 implicit places.
[2023-03-16 06:37:04] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:37:04] [INFO ] Invariant cache hit.
[2023-03-16 06:37:14] [INFO ] Dead Transitions using invariants and state equation in 9440 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11598 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-09 finished in 221462 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(((p0 U p1)&&X(X(G((G(p2)||F(p3))))))))'
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 75 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:37:15] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:37:15] [INFO ] Computed 13 place invariants in 47 ms
[2023-03-16 06:37:17] [INFO ] Implicit Places using invariants in 1957 ms returned []
Implicit Place search using SMT only with invariants took 1967 ms to find 0 implicit places.
[2023-03-16 06:37:17] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:37:17] [INFO ] Invariant cache hit.
[2023-03-16 06:37:26] [INFO ] Dead Transitions using invariants and state equation in 9343 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11399 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 642 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-10 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=0 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=0 dest: 1}, { cond=(OR p1 p0), acceptance={} source=0 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=1 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p1) p0), acceptance={} source=2 dest: 4}, { cond=(OR p1 p0), acceptance={} source=2 dest: 5}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=3 dest: 3}, { cond=(OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3)), acceptance={} source=3 dest: 4}, { cond=(OR p1 p0), acceptance={} source=3 dest: 5}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={} source=3 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={} source=3 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={} source=3 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={} source=3 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={} source=3 dest: 10}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=4 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=4 dest: 8}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=5 dest: 3}, { cond=(AND (NOT p1) p0), acceptance={} source=5 dest: 4}, { cond=(OR p1 p0), acceptance={} source=5 dest: 5}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={} source=5 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={} source=5 dest: 10}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={} source=5 dest: 11}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={} source=5 dest: 12}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=6 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=6 dest: 8}, { cond=(OR (AND p1 (NOT p3)) (AND p0 (NOT p3))), acceptance={0, 1} source=6 dest: 9}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={1} source=7 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=7 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=7 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=7 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=7 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=7 dest: 10}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=8 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=8 dest: 8}], [{ cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=9 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=9 dest: 11}, { cond=(OR (AND p1 (NOT p3)) (AND p0 (NOT p3))), acceptance={0, 1} source=9 dest: 12}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={1} source=10 dest: 4}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=10 dest: 4}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=10 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=10 dest: 10}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=10 dest: 11}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=10 dest: 12}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={0, 1} source=11 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=11 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=11 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=11 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=11 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=11 dest: 10}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={0} source=11 dest: 11}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={0} source=11 dest: 12}], [{ cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=12 dest: 4}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=12 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=12 dest: 10}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={0} source=12 dest: 11}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=12 dest: 11}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={0} source=12 dest: 12}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=12 dest: 12}]], initial=0, aps=[p1:(LEQ 2 s202), p0:(LEQ 3 s536), p2:(LEQ 3 s6), p3:(LEQ s128 s589)], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null, null, null, null, null, null, null, null, null, null, null, null][false, false, false, false, false, false, false, false, false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3222 ms.
Product exploration explored 100000 steps with 0 reset in 3332 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3)))))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3)))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2) (NOT p3))))), (X (X (NOT (OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p0) p2 (NOT p3)))))]
False Knowledge obtained : []
Knowledge based reduction with 13 factoid took 1063 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 690 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 421 ms. (steps per millisecond=23 ) properties (out of 13) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:37:36] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:37:36] [INFO ] Invariant cache hit.
[2023-03-16 06:37:37] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:37:37] [INFO ] After 188ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:37:37] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:38:02] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:38:02] [INFO ] After 25046ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Fused 11 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 407 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 408 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 652 ms. (steps per millisecond=15 ) properties (out of 11) seen :4
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-16 06:38:03] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:38:03] [INFO ] Computed 13 place invariants in 49 ms
[2023-03-16 06:38:03] [INFO ] After 145ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-16 06:38:03] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:38:24] [INFO ] After 20731ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-03-16 06:38:24] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:38:28] [INFO ] After 3986ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :6
[2023-03-16 06:38:28] [INFO ] After 3987ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :6
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-16 06:38:28] [INFO ] After 25038ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :6
Parikh walk visited 0 properties in 39 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 167 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 167 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 528 ms. (steps per millisecond=18 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 7) seen :0
Interrupted probabilistic random walk after 24976 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24976 steps, saw 22645 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 7 properties.
[2023-03-16 06:38:32] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:38:32] [INFO ] Invariant cache hit.
[2023-03-16 06:38:33] [INFO ] After 167ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-16 06:38:33] [INFO ] [Nat]Absence check using 13 positive place invariants in 11 ms returned sat
[2023-03-16 06:38:58] [INFO ] After 24756ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-03-16 06:38:58] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:38:58] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:38:58] [INFO ] After 25080ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:7
Parikh walk visited 0 properties in 31 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 201 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 202 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 200 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:38:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:38:58] [INFO ] Invariant cache hit.
[2023-03-16 06:39:00] [INFO ] Implicit Places using invariants in 1895 ms returned []
Implicit Place search using SMT only with invariants took 1896 ms to find 0 implicit places.
[2023-03-16 06:39:00] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:39:00] [INFO ] Invariant cache hit.
[2023-03-16 06:39:09] [INFO ] Dead Transitions using invariants and state equation in 8894 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10997 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 503 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 7 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:39:10] [INFO ] Computed 13 place invariants in 56 ms
[2023-03-16 06:39:10] [INFO ] After 132ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-16 06:39:10] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 06:39:37] [INFO ] After 26769ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-03-16 06:39:46] [INFO ] After 36367ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 7104 ms.
[2023-03-16 06:39:53] [INFO ] After 43675ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3)))))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3)))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2) (NOT p3))))), (X (X (NOT (OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p0) p2 (NOT p3)))))]
False Knowledge obtained : [(F (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))), (F (OR (AND (NOT p1) p2 p0) (AND (NOT p1) p0 p3))), (F (NOT (AND (NOT p1) (NOT p0)))), (F (OR p1 p0)), (F (AND (NOT p1) p0)), (F (AND (NOT p1) (NOT p0) (NOT p3)))]
Knowledge based reduction with 13 factoid took 1247 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 773 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 673 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
[2023-03-16 06:39:56] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:39:56] [INFO ] Computed 13 place invariants in 50 ms
Could not prove EG (NOT p1)
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:40:11] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:40:11] [INFO ] Invariant cache hit.
[2023-03-16 06:40:13] [INFO ] Implicit Places using invariants in 2005 ms returned []
Implicit Place search using SMT only with invariants took 2005 ms to find 0 implicit places.
[2023-03-16 06:40:13] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:40:13] [INFO ] Invariant cache hit.
[2023-03-16 06:40:22] [INFO ] Dead Transitions using invariants and state equation in 8833 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10910 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p2 p0 (NOT p3)))))), (X (X (NOT (OR (AND (NOT p1) p2 p0) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND (NOT p2) p0 (NOT p3)))))), (X (X (NOT (AND (NOT p1) p2 (NOT p0) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p0 (NOT p3)))))]
False Knowledge obtained : []
Knowledge based reduction with 13 factoid took 1062 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 712 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 574 ms. (steps per millisecond=17 ) properties (out of 13) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:40:25] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:40:25] [INFO ] Invariant cache hit.
[2023-03-16 06:40:26] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:40:26] [INFO ] After 198ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:40:26] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:40:51] [INFO ] After 24747ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-16 06:40:51] [INFO ] State equation strengthened by 829 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:40:51] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:40:51] [INFO ] After 25159ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Fused 11 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 300 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 300 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 582 ms. (steps per millisecond=17 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 140 ms. (steps per millisecond=71 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Interrupted probabilistic random walk after 24417 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24417 steps, saw 22143 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:40:55] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:40:55] [INFO ] Computed 13 place invariants in 62 ms
[2023-03-16 06:40:56] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:40:56] [INFO ] After 212ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:40:56] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:41:21] [INFO ] After 24756ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-16 06:41:21] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:41:21] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:41:21] [INFO ] After 25155ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Parikh walk visited 0 properties in 54 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 203 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 203 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 193 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:41:21] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:41:21] [INFO ] Invariant cache hit.
[2023-03-16 06:41:23] [INFO ] Implicit Places using invariants in 2036 ms returned []
Implicit Place search using SMT only with invariants took 2040 ms to find 0 implicit places.
[2023-03-16 06:41:23] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:41:23] [INFO ] Invariant cache hit.
[2023-03-16 06:41:32] [INFO ] Dead Transitions using invariants and state equation in 8631 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10872 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 576 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 11 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:41:33] [INFO ] Computed 13 place invariants in 47 ms
[2023-03-16 06:41:33] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:41:33] [INFO ] After 194ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:41:33] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:42:00] [INFO ] After 26879ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-16 06:42:11] [INFO ] After 37306ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :11
Attempting to minimize the solution found.
Minimization took 10865 ms.
[2023-03-16 06:42:21] [INFO ] After 48454ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :11
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p2 p0 (NOT p3)))))), (X (X (NOT (OR (AND (NOT p1) p2 p0) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND (NOT p2) p0 (NOT p3)))))), (X (X (NOT (AND (NOT p1) p2 (NOT p0) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p0 (NOT p3)))))]
False Knowledge obtained : [(F (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))), (F (AND (NOT p1) (NOT p0) (NOT p3)))]
Knowledge based reduction with 13 factoid took 1106 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 631 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 631 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
[2023-03-16 06:42:24] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 06:42:24] [INFO ] Computed 13 place invariants in 49 ms
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 630 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Product exploration explored 100000 steps with 0 reset in 3385 ms.
Product exploration explored 100000 steps with 0 reset in 3666 ms.
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 69 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:42:47] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:42:47] [INFO ] Invariant cache hit.
[2023-03-16 06:42:49] [INFO ] Implicit Places using invariants in 1969 ms returned []
Implicit Place search using SMT only with invariants took 1973 ms to find 0 implicit places.
[2023-03-16 06:42:49] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:42:49] [INFO ] Invariant cache hit.
[2023-03-16 06:42:58] [INFO ] Dead Transitions using invariants and state equation in 8672 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10719 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-10 finished in 344208 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((X(p0) U (p1||(p1 U p2)||(!p0 U (G(!p0)||(!p0&&G(!p2)))))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 73 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:42:59] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:42:59] [INFO ] Invariant cache hit.
[2023-03-16 06:43:01] [INFO ] Implicit Places using invariants in 2039 ms returned []
Implicit Place search using SMT only with invariants took 2040 ms to find 0 implicit places.
[2023-03-16 06:43:01] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:01] [INFO ] Invariant cache hit.
[2023-03-16 06:43:10] [INFO ] Dead Transitions using invariants and state equation in 8661 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10783 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 377 ms :[true, (OR (NOT p0) (AND (NOT p1) (NOT p2))), (AND p0 (NOT p1) (NOT p2)), false, p0, (AND (NOT p0) p2), (AND p0 p2), p2]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-12 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 0}, { cond=(AND (NOT p1) (NOT p2) p0), acceptance={0} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p2) p0), acceptance={} source=2 dest: 1}, { cond=(AND (NOT p1) (NOT p2) (NOT p0)), acceptance={} source=2 dest: 3}], [{ cond=(AND p2 (NOT p0)), acceptance={} source=3 dest: 4}, { cond=(AND (NOT p1) (NOT p2) p0), acceptance={} source=3 dest: 5}, { cond=(AND (NOT p2) (NOT p0)), acceptance={} source=3 dest: 6}], [{ cond=p0, acceptance={} source=4 dest: 0}, { cond=(AND p2 (NOT p0)), acceptance={} source=4 dest: 4}, { cond=(AND (NOT p2) (NOT p0)), acceptance={} source=4 dest: 6}], [{ cond=(AND p2 (NOT p0)), acceptance={} source=5 dest: 0}, { cond=(AND (NOT p1) (NOT p2) p0), acceptance={} source=5 dest: 5}, { cond=(AND (NOT p2) (NOT p0)), acceptance={} source=5 dest: 7}], [{ cond=(AND p2 p0), acceptance={} source=6 dest: 0}, { cond=(AND p2 (NOT p0)), acceptance={} source=6 dest: 4}, { cond=(AND (NOT p2) (NOT p0)), acceptance={} source=6 dest: 6}, { cond=(AND (NOT p2) p0), acceptance={} source=6 dest: 7}], [{ cond=p2, acceptance={} source=7 dest: 0}, { cond=(NOT p2), acceptance={} source=7 dest: 7}]], initial=2, aps=[p0:(LEQ 3 s378), p1:(GT s181 s460), p2:(LEQ 1 s103)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null, null][false, false, false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 5136 steps with 0 reset in 147 ms.
FORMULA RERS17pb113-PT-8-LTLCardinality-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-8-LTLCardinality-12 finished in 11412 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((X(p0)&&(p1 U (p2||G(p1))))))'
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 72 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:43:10] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:10] [INFO ] Invariant cache hit.
[2023-03-16 06:43:12] [INFO ] Implicit Places using invariants in 1990 ms returned []
Implicit Place search using SMT only with invariants took 1991 ms to find 0 implicit places.
[2023-03-16 06:43:12] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:12] [INFO ] Invariant cache hit.
[2023-03-16 06:43:21] [INFO ] Dead Transitions using invariants and state equation in 8898 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10962 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 103 ms :[true, (OR (NOT p0) (AND (NOT p1) (NOT p2))), (OR (NOT p0) (AND (NOT p1) (NOT p2)))]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-13 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(AND (NOT p2) (NOT p1)), acceptance={} source=1 dest: 0}, { cond=(OR p2 p1), acceptance={} source=1 dest: 2}], [{ cond=(OR (AND (NOT p2) (NOT p1)) (NOT p0)), acceptance={} source=2 dest: 0}, { cond=(OR (AND p2 p0) (AND p1 p0)), acceptance={} source=2 dest: 2}]], initial=1, aps=[p2:(AND (GT s465 s449) (GT 2 s414)), p1:(GT 2 s414), p0:(LEQ s82 s238)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Entered a terminal (fully accepting) state of product in 1036 steps with 0 reset in 34 ms.
FORMULA RERS17pb113-PT-8-LTLCardinality-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-8-LTLCardinality-13 finished in 11196 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 1 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 06:43:22] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:22] [INFO ] Invariant cache hit.
[2023-03-16 06:43:24] [INFO ] Implicit Places using invariants in 1913 ms returned []
Implicit Place search using SMT only with invariants took 1914 ms to find 0 implicit places.
[2023-03-16 06:43:24] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:24] [INFO ] Invariant cache hit.
[2023-03-16 06:43:32] [INFO ] Dead Transitions using invariants and state equation in 8253 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10248 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 90 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-15 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LEQ 2 s616)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 0 reset in 3760 ms.
Product exploration explored 100000 steps with 0 reset in 3514 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 110 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 32 ms :[(NOT p0)]
Finished random walk after 774 steps, including 0 resets, run visited all 1 properties in 5 ms. (steps per millisecond=154 )
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 3 factoid took 176 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 50 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 44 ms :[(NOT p0)]
[2023-03-16 06:43:40] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 06:43:40] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 1 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 159 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:43:55] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:43:55] [INFO ] Computed 13 place invariants in 49 ms
[2023-03-16 06:43:57] [INFO ] Implicit Places using invariants in 2028 ms returned []
Implicit Place search using SMT only with invariants took 2030 ms to find 0 implicit places.
[2023-03-16 06:43:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:43:57] [INFO ] Invariant cache hit.
[2023-03-16 06:44:06] [INFO ] Dead Transitions using invariants and state equation in 8715 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10907 ms. Remains : 626/627 places, 31352/31353 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 117 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 31 ms :[(NOT p0)]
Finished random walk after 7405 steps, including 2 resets, run visited all 1 properties in 227 ms. (steps per millisecond=32 )
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 3 factoid took 171 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 38 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 36 ms :[(NOT p0)]
[2023-03-16 06:44:07] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:44:07] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 35 ms :[(NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3752 ms.
Product exploration explored 100000 steps with 0 reset in 3690 ms.
Support contains 1 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 158 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:44:30] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:44:30] [INFO ] Invariant cache hit.
[2023-03-16 06:44:31] [INFO ] Implicit Places using invariants in 1922 ms returned []
Implicit Place search using SMT only with invariants took 1922 ms to find 0 implicit places.
[2023-03-16 06:44:31] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:44:31] [INFO ] Invariant cache hit.
[2023-03-16 06:44:40] [INFO ] Dead Transitions using invariants and state equation in 8879 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10965 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-15 finished in 79831 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((p0||(X(F(p1))&&(p0 U (p2||G(p0))))||G(F(p1)))))'
Found a Shortening insensitive property : RERS17pb113-PT-8-LTLCardinality-01
Stuttering acceptance computed with spot in 94 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 191 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:44:42] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:44:42] [INFO ] Invariant cache hit.
[2023-03-16 06:44:44] [INFO ] Implicit Places using invariants in 2031 ms returned []
Implicit Place search using SMT only with invariants took 2037 ms to find 0 implicit places.
[2023-03-16 06:44:44] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:44:44] [INFO ] Invariant cache hit.
[2023-03-16 06:44:52] [INFO ] Dead Transitions using invariants and state equation in 8465 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 10701 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-01 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p0) (NOT p2)), acceptance={} source=0 dest: 0}, { cond=(OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(GT s286 s369), p2:(AND (GT 1 s215) (GT s286 s369)), p1:(LEQ 2 s23)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, cl-invariant], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 195 reset in 3275 ms.
Product exploration explored 100000 steps with 191 reset in 3149 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2))), (X (AND (NOT p0) (NOT p2))), (X (X (AND (NOT p0) (NOT p1)))), (X (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 391 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 82 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Finished random walk after 1038 steps, including 0 resets, run visited all 3 properties in 21 ms. (steps per millisecond=49 )
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2))), (X (AND (NOT p0) (NOT p2))), (X (X (AND (NOT p0) (NOT p1)))), (X (X (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) (NOT p2)))), (F (NOT (AND (NOT p1) (NOT p0)))), (F (NOT (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))))]
Knowledge based reduction with 7 factoid took 389 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 88 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 92 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 06:45:00] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:00] [INFO ] Invariant cache hit.
Could not prove EG (AND (NOT p0) (NOT p1))
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 67 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:45:15] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:15] [INFO ] Invariant cache hit.
[2023-03-16 06:45:17] [INFO ] Implicit Places using invariants in 1849 ms returned []
Implicit Place search using SMT only with invariants took 1863 ms to find 0 implicit places.
[2023-03-16 06:45:17] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:17] [INFO ] Invariant cache hit.
[2023-03-16 06:45:26] [INFO ] Dead Transitions using invariants and state equation in 8524 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10455 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))), (X (AND (NOT p1) (NOT p0))), (X (AND (NOT p0) (NOT p2))), (X (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2)))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : []
Knowledge based reduction with 7 factoid took 447 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 80 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Finished random walk after 1137 steps, including 0 resets, run visited all 3 properties in 37 ms. (steps per millisecond=30 )
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))), (X (AND (NOT p1) (NOT p0))), (X (AND (NOT p0) (NOT p2))), (X (X (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2)))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (AND (NOT p0) (NOT p2))))]
False Knowledge obtained : [(F (NOT (AND (NOT p0) (NOT p2)))), (F (NOT (AND (NOT p1) (NOT p0)))), (F (NOT (OR (AND (NOT p1) (NOT p0)) (AND (NOT p0) p2))))]
Knowledge based reduction with 7 factoid took 352 ms. Reduced automaton from 2 states, 3 edges and 3 AP (stutter sensitive) to 2 states, 3 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 89 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 79 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 06:45:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:27] [INFO ] Invariant cache hit.
Could not prove EG (AND (NOT p0) (NOT p1))
Stuttering acceptance computed with spot in 83 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 190 reset in 3239 ms.
Product exploration explored 100000 steps with 191 reset in 3009 ms.
Applying partial POR strategy [false, true]
Stuttering acceptance computed with spot in 79 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 147 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:45:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:49] [INFO ] Invariant cache hit.
[2023-03-16 06:45:57] [INFO ] Dead Transitions using invariants and state equation in 8393 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8545 ms. Remains : 626/626 places, 31352/31352 transitions.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 67 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:45:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:57] [INFO ] Invariant cache hit.
[2023-03-16 06:45:59] [INFO ] Implicit Places using invariants in 1971 ms returned []
Implicit Place search using SMT only with invariants took 1975 ms to find 0 implicit places.
[2023-03-16 06:45:59] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:45:59] [INFO ] Invariant cache hit.
[2023-03-16 06:46:08] [INFO ] Dead Transitions using invariants and state equation in 8757 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10801 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-01 finished in 87715 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(G(p0))))'
Found a Lengthening insensitive property : RERS17pb113-PT-8-LTLCardinality-02
Stuttering acceptance computed with spot in 202 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 174 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:46:10] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:46:10] [INFO ] Invariant cache hit.
[2023-03-16 06:46:12] [INFO ] Implicit Places using invariants in 2059 ms returned []
Implicit Place search using SMT only with invariants took 2060 ms to find 0 implicit places.
[2023-03-16 06:46:12] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:46:12] [INFO ] Invariant cache hit.
[2023-03-16 06:46:20] [INFO ] Dead Transitions using invariants and state equation in 8613 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 10849 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 1}], [{ cond=true, acceptance={} source=3 dest: 2}]], initial=3, aps=[p0:(AND (GT 3 s116) (GT 3 s501))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3688 ms.
Product exploration explored 100000 steps with 0 reset in 3488 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 106 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 139 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 307 ms. (steps per millisecond=32 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25707 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25707 steps, saw 23292 distinct states, run finished after 3003 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:46:31] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:46:31] [INFO ] Invariant cache hit.
[2023-03-16 06:46:31] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:46:48] [INFO ] After 17182ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:46:48] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:47:11] [INFO ] After 22419ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:47:11] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:47:13] [INFO ] After 2396ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:47:13] [INFO ] After 25026ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 6 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 185 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 186 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 273 ms. (steps per millisecond=36 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 26249 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 26249 steps, saw 23780 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:47:17] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:47:17] [INFO ] Invariant cache hit.
[2023-03-16 06:47:17] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:47:32] [INFO ] After 15246ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:47:32] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:47:54] [INFO ] After 21522ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:47:54] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:47:57] [INFO ] After 3314ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:47:57] [INFO ] After 25022ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 11 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 152 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 152 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 166 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:47:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:47:58] [INFO ] Invariant cache hit.
[2023-03-16 06:48:00] [INFO ] Implicit Places using invariants in 1956 ms returned []
Implicit Place search using SMT only with invariants took 1957 ms to find 0 implicit places.
[2023-03-16 06:48:00] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:00] [INFO ] Invariant cache hit.
[2023-03-16 06:48:09] [INFO ] Dead Transitions using invariants and state equation in 9331 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11471 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 96 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 124 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 123 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 68 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:48:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:09] [INFO ] Invariant cache hit.
[2023-03-16 06:48:11] [INFO ] Implicit Places using invariants in 2071 ms returned []
Implicit Place search using SMT only with invariants took 2073 ms to find 0 implicit places.
[2023-03-16 06:48:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:11] [INFO ] Invariant cache hit.
[2023-03-16 06:48:21] [INFO ] Dead Transitions using invariants and state equation in 9142 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11299 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 84 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 205 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Finished random walk after 7522 steps, including 2 resets, run visited all 1 properties in 182 ms. (steps per millisecond=41 )
Knowledge obtained : [p0, (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 2 factoid took 125 ms. Reduced automaton from 4 states, 5 edges and 1 AP (stutter sensitive) to 4 states, 5 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 136 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 118 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 111 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3043 ms.
Product exploration explored 100000 steps with 0 reset in 3084 ms.
Applying partial POR strategy [true, true, false, false]
Stuttering acceptance computed with spot in 136 ms :[true, (NOT p0), (NOT p0), (NOT p0)]
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 178 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:48:28] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:28] [INFO ] Invariant cache hit.
[2023-03-16 06:48:37] [INFO ] Dead Transitions using invariants and state equation in 8899 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9080 ms. Remains : 626/626 places, 31352/31352 transitions.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 88 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:48:37] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:37] [INFO ] Invariant cache hit.
[2023-03-16 06:48:39] [INFO ] Implicit Places using invariants in 1953 ms returned []
Implicit Place search using SMT only with invariants took 1966 ms to find 0 implicit places.
[2023-03-16 06:48:39] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:39] [INFO ] Invariant cache hit.
[2023-03-16 06:48:48] [INFO ] Dead Transitions using invariants and state equation in 8886 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10942 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-02 finished in 160194 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(p1)))))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&G(p1)))))'
Found a Shortening insensitive property : RERS17pb113-PT-8-LTLCardinality-06
Stuttering acceptance computed with spot in 125 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Support contains 6 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 269 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:48:50] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:50] [INFO ] Invariant cache hit.
[2023-03-16 06:48:52] [INFO ] Implicit Places using invariants in 2086 ms returned []
Implicit Place search using SMT only with invariants took 2088 ms to find 0 implicit places.
[2023-03-16 06:48:52] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:48:52] [INFO ] Invariant cache hit.
[2023-03-16 06:49:01] [INFO ] Dead Transitions using invariants and state equation in 8632 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 10992 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-06 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(OR (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}, { cond=(AND p0 p1), acceptance={} source=1 dest: 2}], [{ cond=(NOT p1), acceptance={0} source=2 dest: 1}, { cond=p1, acceptance={} source=2 dest: 2}]], initial=0, aps=[p0:(GT s142 s385), p1:(AND (GT s614 s141) (LEQ s537 s347))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, cl-invariant], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3091 ms.
Product exploration explored 100000 steps with 0 reset in 3091 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 257 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 142 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Finished random walk after 297 steps, including 0 resets, run visited all 3 properties in 7 ms. (steps per millisecond=42 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT (OR (NOT p0) (NOT p1)))), (F p1), (F (AND p0 p1))]
Knowledge based reduction with 6 factoid took 328 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 202 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Stuttering acceptance computed with spot in 131 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
[2023-03-16 06:49:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:49:08] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
[2023-03-16 06:49:23] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:49:23] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 6 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 68 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:49:39] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:49:39] [INFO ] Invariant cache hit.
[2023-03-16 06:49:40] [INFO ] Implicit Places using invariants in 1889 ms returned []
Implicit Place search using SMT only with invariants took 1899 ms to find 0 implicit places.
[2023-03-16 06:49:40] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:49:40] [INFO ] Invariant cache hit.
[2023-03-16 06:49:49] [INFO ] Dead Transitions using invariants and state equation in 8882 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10851 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 259 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 139 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Finished random walk after 4409 steps, including 1 resets, run visited all 3 properties in 149 ms. (steps per millisecond=29 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT (AND p0 p1))), (X (OR (NOT p0) (NOT p1))), (X (X (NOT (AND p0 p1)))), (X (X (OR (NOT p0) (NOT p1)))), (X (X (NOT p1)))]
False Knowledge obtained : [(F (NOT (OR (NOT p0) (NOT p1)))), (F p1), (F (AND p0 p1))]
Knowledge based reduction with 6 factoid took 308 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 5 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 123 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Stuttering acceptance computed with spot in 120 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
[2023-03-16 06:49:51] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:49:51] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
[2023-03-16 06:50:06] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:06] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 152 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 2976 ms.
Product exploration explored 100000 steps with 0 reset in 3063 ms.
Applying partial POR strategy [false, true, true]
Stuttering acceptance computed with spot in 134 ms :[(OR (NOT p1) (NOT p0)), (OR (NOT p1) (NOT p0)), (NOT p1)]
Support contains 6 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 169 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:50:28] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:28] [INFO ] Invariant cache hit.
[2023-03-16 06:50:36] [INFO ] Dead Transitions using invariants and state equation in 8573 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8744 ms. Remains : 626/626 places, 31352/31352 transitions.
Support contains 6 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 78 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:50:36] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:36] [INFO ] Invariant cache hit.
[2023-03-16 06:50:38] [INFO ] Implicit Places using invariants in 2033 ms returned []
Implicit Place search using SMT only with invariants took 2034 ms to find 0 implicit places.
[2023-03-16 06:50:38] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:38] [INFO ] Invariant cache hit.
[2023-03-16 06:50:47] [INFO ] Dead Transitions using invariants and state equation in 8625 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10739 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-06 finished in 118439 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0))||G(p1)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(((p0 U p1)&&X(X(G((G(p2)||F(p3))))))))'
Found a Lengthening insensitive property : RERS17pb113-PT-8-LTLCardinality-10
Stuttering acceptance computed with spot in 694 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Support contains 5 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 273 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:50:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:49] [INFO ] Invariant cache hit.
[2023-03-16 06:50:51] [INFO ] Implicit Places using invariants in 2066 ms returned []
Implicit Place search using SMT only with invariants took 2067 ms to find 0 implicit places.
[2023-03-16 06:50:51] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:50:51] [INFO ] Invariant cache hit.
[2023-03-16 06:51:00] [INFO ] Dead Transitions using invariants and state equation in 8617 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 10960 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-10 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=0 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=0 dest: 1}, { cond=(OR p1 p0), acceptance={} source=0 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0, 1} source=1 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={0, 1} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p1) p0), acceptance={} source=2 dest: 4}, { cond=(OR p1 p0), acceptance={} source=2 dest: 5}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=3 dest: 3}, { cond=(OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3)), acceptance={} source=3 dest: 4}, { cond=(OR p1 p0), acceptance={} source=3 dest: 5}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={} source=3 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={} source=3 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={} source=3 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={} source=3 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={} source=3 dest: 10}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=4 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=4 dest: 8}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=5 dest: 3}, { cond=(AND (NOT p1) p0), acceptance={} source=5 dest: 4}, { cond=(OR p1 p0), acceptance={} source=5 dest: 5}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={} source=5 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={} source=5 dest: 10}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={} source=5 dest: 11}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={} source=5 dest: 12}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=6 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=6 dest: 8}, { cond=(OR (AND p1 (NOT p3)) (AND p0 (NOT p3))), acceptance={0, 1} source=6 dest: 9}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={1} source=7 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=7 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=7 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=7 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=7 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=7 dest: 10}], [{ cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=8 dest: 6}, { cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=8 dest: 8}], [{ cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=9 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p3)), acceptance={0, 1} source=9 dest: 11}, { cond=(OR (AND p1 (NOT p3)) (AND p0 (NOT p3))), acceptance={0, 1} source=9 dest: 12}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={1} source=10 dest: 4}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=10 dest: 4}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=10 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=10 dest: 10}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=10 dest: 11}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=10 dest: 12}], [{ cond=(AND (NOT p1) p0 p2 (NOT p3)), acceptance={0, 1} source=11 dest: 4}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=11 dest: 6}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=11 dest: 7}, { cond=(AND (NOT p1) p0 (NOT p2) (NOT p3)), acceptance={0, 1} source=11 dest: 8}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=11 dest: 9}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=11 dest: 10}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={0} source=11 dest: 11}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={0} source=11 dest: 12}], [{ cond=(AND (NOT p1) p0 (NOT p3)), acceptance={0, 1} source=12 dest: 4}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={1} source=12 dest: 7}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={1} source=12 dest: 10}, { cond=(AND (NOT p1) (NOT p0) p2 (NOT p3)), acceptance={0} source=12 dest: 11}, { cond=(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), acceptance={0, 1} source=12 dest: 11}, { cond=(OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3))), acceptance={0} source=12 dest: 12}, { cond=(OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3))), acceptance={0, 1} source=12 dest: 12}]], initial=0, aps=[p1:(LEQ 2 s202), p0:(LEQ 3 s536), p2:(LEQ 3 s6), p3:(LEQ s128 s589)], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, sl-invariant], stateDesc=[null, null, null, null, null, null, null, null, null, null, null, null, null][false, false, false, false, false, false, false, false, false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3200 ms.
Product exploration explored 100000 steps with 0 reset in 2948 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3)))))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3)))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2) (NOT p3))))), (X (X (NOT (OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p0) p2 (NOT p3)))))]
False Knowledge obtained : []
Knowledge based reduction with 13 factoid took 1104 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 584 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 670 ms. (steps per millisecond=14 ) properties (out of 13) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:51:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:51:09] [INFO ] Invariant cache hit.
[2023-03-16 06:51:09] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:51:09] [INFO ] After 199ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:51:09] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 06:51:34] [INFO ] After 24769ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-16 06:51:34] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:51:34] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:51:34] [INFO ] After 25124ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Parikh walk visited 0 properties in 41 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 164 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 165 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 471 ms. (steps per millisecond=21 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 11) seen :0
Interrupted probabilistic random walk after 24577 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24577 steps, saw 22284 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:51:38] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:51:38] [INFO ] Invariant cache hit.
[2023-03-16 06:51:39] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:51:39] [INFO ] After 200ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:51:39] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:52:04] [INFO ] After 24761ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-16 06:52:04] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:52:04] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:52:04] [INFO ] After 25124ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Parikh walk visited 0 properties in 39 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 148 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 148 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 148 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:52:04] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:52:04] [INFO ] Invariant cache hit.
[2023-03-16 06:52:06] [INFO ] Implicit Places using invariants in 1865 ms returned []
Implicit Place search using SMT only with invariants took 1885 ms to find 0 implicit places.
[2023-03-16 06:52:06] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:52:06] [INFO ] Invariant cache hit.
[2023-03-16 06:52:15] [INFO ] Dead Transitions using invariants and state equation in 9182 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11218 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 620 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 11 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:52:16] [INFO ] Computed 13 place invariants in 49 ms
[2023-03-16 06:52:16] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:52:16] [INFO ] After 196ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:52:17] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:52:44] [INFO ] After 27781ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-16 06:52:55] [INFO ] After 38122ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :11
Attempting to minimize the solution found.
Minimization took 11572 ms.
[2023-03-16 06:53:06] [INFO ] After 49975ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :11
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND p0 (NOT p2) (NOT p3)))))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p0 p2 (NOT p3)))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) (NOT p0) (NOT p2) (NOT p3))))), (X (X (NOT (OR (AND (NOT p1) p0 p2) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (AND (NOT p1) p0 (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p0) p2 (NOT p3)))))]
False Knowledge obtained : [(F (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))), (F (AND (NOT p1) (NOT p0) (NOT p3)))]
Knowledge based reduction with 13 factoid took 1043 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 689 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 666 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
[2023-03-16 06:53:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:53:09] [INFO ] Computed 13 place invariants in 60 ms
Could not prove EG (NOT p1)
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 78 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:53:24] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:53:24] [INFO ] Invariant cache hit.
[2023-03-16 06:53:26] [INFO ] Implicit Places using invariants in 1991 ms returned []
Implicit Place search using SMT only with invariants took 1996 ms to find 0 implicit places.
[2023-03-16 06:53:26] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:53:26] [INFO ] Invariant cache hit.
[2023-03-16 06:53:35] [INFO ] Dead Transitions using invariants and state equation in 9122 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11209 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p2 p0 (NOT p3)))))), (X (X (NOT (OR (AND (NOT p1) p2 p0) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND (NOT p2) p0 (NOT p3)))))), (X (X (NOT (AND (NOT p1) p2 (NOT p0) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p0 (NOT p3)))))]
False Knowledge obtained : []
Knowledge based reduction with 13 factoid took 1047 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 744 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 537 ms. (steps per millisecond=18 ) properties (out of 13) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:53:38] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:53:38] [INFO ] Invariant cache hit.
[2023-03-16 06:53:39] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:53:39] [INFO ] After 196ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:53:39] [INFO ] [Nat]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:54:04] [INFO ] After 24755ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-16 06:54:04] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:54:04] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:54:04] [INFO ] After 25142ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Fused 11 Parikh solutions to 9 different solutions.
Parikh walk visited 0 properties in 40 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 193 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 193 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 488 ms. (steps per millisecond=20 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 11) seen :0
Interrupted probabilistic random walk after 24698 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24698 steps, saw 22393 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 11 properties.
[2023-03-16 06:54:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:54:08] [INFO ] Invariant cache hit.
[2023-03-16 06:54:08] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:54:08] [INFO ] After 185ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:54:08] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:54:33] [INFO ] After 24775ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :10
[2023-03-16 06:54:33] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 06:54:33] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 06:54:33] [INFO ] After 25140ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:11
Fused 11 Parikh solutions to 8 different solutions.
Parikh walk visited 0 properties in 29 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 151 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 150 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:54:34] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:54:34] [INFO ] Invariant cache hit.
[2023-03-16 06:54:36] [INFO ] Implicit Places using invariants in 2013 ms returned []
Implicit Place search using SMT only with invariants took 2013 ms to find 0 implicit places.
[2023-03-16 06:54:36] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:54:36] [INFO ] Invariant cache hit.
[2023-03-16 06:54:45] [INFO ] Dead Transitions using invariants and state equation in 8937 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 11103 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 577 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 11 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:54:45] [INFO ] Computed 13 place invariants in 54 ms
[2023-03-16 06:54:46] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 06:54:46] [INFO ] After 210ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:11
[2023-03-16 06:54:46] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:55:16] [INFO ] After 29868ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :11
[2023-03-16 06:55:26] [INFO ] After 40397ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :11
Attempting to minimize the solution found.
Minimization took 11162 ms.
[2023-03-16 06:55:37] [INFO ] After 51834ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :11
Knowledge obtained : [(AND (NOT p1) (NOT p0) (NOT p2) p3), (X (AND (NOT p1) (NOT p0))), (X (NOT (OR p1 p0))), (X (NOT (AND (NOT p1) p0))), (X (X (NOT (OR (AND p1 p2 (NOT p3)) (AND p2 p0 (NOT p3)))))), (X (X (NOT (OR (AND (NOT p1) p2 p0) (AND (NOT p1) p0 p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))))), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT (OR p1 p0)))), (X (X (NOT (AND (NOT p1) p0)))), (X (X (NOT (OR (AND p1 (NOT p2) (NOT p3)) (AND (NOT p2) p0 (NOT p3)))))), (X (X (NOT (AND (NOT p1) p2 (NOT p0) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p0 (NOT p3)))))]
False Knowledge obtained : [(F (AND (NOT p1) (NOT p2) (NOT p0) (NOT p3))), (F (AND (NOT p1) (NOT p0) (NOT p3)))]
Knowledge based reduction with 13 factoid took 1179 ms. Reduced automaton from 13 states, 60 edges and 4 AP (stutter sensitive) to 13 states, 60 edges and 4 AP (stutter sensitive).
Stuttering acceptance computed with spot in 700 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 689 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
[2023-03-16 06:55:40] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 06:55:40] [INFO ] Computed 13 place invariants in 53 ms
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 693 ms :[(OR (NOT p1) (AND (NOT p2) (NOT p3))), (NOT p1), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (OR (AND (NOT p1) (NOT p3)) (AND (NOT p2) (NOT p3))), (AND (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3)), (AND (NOT p2) (NOT p3))]
Product exploration explored 100000 steps with 0 reset in 3394 ms.
Product exploration explored 100000 steps with 0 reset in 3388 ms.
Support contains 5 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 76 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:56:03] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:56:03] [INFO ] Invariant cache hit.
[2023-03-16 06:56:05] [INFO ] Implicit Places using invariants in 1969 ms returned []
Implicit Place search using SMT only with invariants took 1989 ms to find 0 implicit places.
[2023-03-16 06:56:05] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:56:05] [INFO ] Invariant cache hit.
[2023-03-16 06:56:13] [INFO ] Dead Transitions using invariants and state equation in 8109 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10179 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-10 finished in 326089 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Found a Shortening insensitive property : RERS17pb113-PT-8-LTLCardinality-15
Stuttering acceptance computed with spot in 76 ms :[(NOT p0), (NOT p0)]
Support contains 1 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 182 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 06:56:14] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:56:14] [INFO ] Invariant cache hit.
[2023-03-16 06:56:17] [INFO ] Implicit Places using invariants in 2117 ms returned []
Implicit Place search using SMT only with invariants took 2118 ms to find 0 implicit places.
[2023-03-16 06:56:17] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:56:17] [INFO ] Invariant cache hit.
[2023-03-16 06:56:25] [INFO ] Dead Transitions using invariants and state equation in 8929 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 11231 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-8-LTLCardinality-15 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(LEQ 2 s615)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak, cl-invariant], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 0 reset in 4032 ms.
Product exploration explored 100000 steps with 0 reset in 4031 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 119 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 35 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 334 ms. (steps per millisecond=29 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25548 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25548 steps, saw 23156 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:56:37] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:56:37] [INFO ] Invariant cache hit.
[2023-03-16 06:56:37] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:57:01] [INFO ] After 23277ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:57:01] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 06:57:22] [INFO ] After 21488ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:57:22] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:57:26] [INFO ] After 3336ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:57:26] [INFO ] After 25033ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 6 ms.
Support contains 1 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 186 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 188 ms. Remains : 626/626 places, 31352/31352 transitions.
Finished random walk after 7300 steps, including 2 resets, run visited all 1 properties in 190 ms. (steps per millisecond=38 )
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 3 factoid took 200 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 41 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 35 ms :[(NOT p0)]
[2023-03-16 06:57:26] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:57:26] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 1 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 180 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:57:42] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:57:42] [INFO ] Invariant cache hit.
[2023-03-16 06:57:44] [INFO ] Implicit Places using invariants in 1990 ms returned []
Implicit Place search using SMT only with invariants took 1991 ms to find 0 implicit places.
[2023-03-16 06:57:44] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:57:44] [INFO ] Invariant cache hit.
[2023-03-16 06:57:53] [INFO ] Dead Transitions using invariants and state equation in 8901 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11074 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 129 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 34 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 263 ms. (steps per millisecond=38 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25325 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25325 steps, saw 22960 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 06:57:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:57:56] [INFO ] Invariant cache hit.
[2023-03-16 06:57:56] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:58:20] [INFO ] After 23253ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 06:58:20] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 06:58:40] [INFO ] After 20421ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 06:58:40] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 06:58:45] [INFO ] After 4424ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 06:58:45] [INFO ] After 25040ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 8 ms.
Support contains 1 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 188 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 190 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 259 ms. (steps per millisecond=38 ) properties (out of 1) seen :0
Finished Best-First random walk after 5999 steps, including 1 resets, run visited all 1 properties in 19 ms. (steps per millisecond=315 )
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 3 factoid took 145 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 44 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 44 ms :[(NOT p0)]
[2023-03-16 06:58:45] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:58:45] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 39 ms :[(NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3266 ms.
Product exploration explored 100000 steps with 0 reset in 3514 ms.
Support contains 1 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 155 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 06:59:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:59:08] [INFO ] Invariant cache hit.
[2023-03-16 06:59:10] [INFO ] Implicit Places using invariants in 2071 ms returned []
Implicit Place search using SMT only with invariants took 2089 ms to find 0 implicit places.
[2023-03-16 06:59:10] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 06:59:10] [INFO ] Invariant cache hit.
[2023-03-16 06:59:18] [INFO ] Dead Transitions using invariants and state equation in 8724 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10971 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-8-LTLCardinality-15 finished in 185477 ms.
[2023-03-16 06:59:20] [INFO ] Flatten gal took : 856 ms
[2023-03-16 06:59:20] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/LTLCardinality.sr.xml took 1 ms.
[2023-03-16 06:59:21] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 627 places, 31353 transitions and 125406 arcs took 96 ms.
Total runtime 2325444 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RERS17pb113-PT-8
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
LTLCardinality

FORMULA RERS17pb113-PT-8-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-8-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-8-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 6684516 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16035628 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:373
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 8 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 13 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 18 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 23 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 28 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 33 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 38 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 43 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 48 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 53 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 58 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 63 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 68 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 73 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 78 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 83 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 88 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 93 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 98 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 103 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 108 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 113 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 118 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 123 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 128 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 133 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 138 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 143 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 148 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 50.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 153 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 158 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 163 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 168 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 173 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 178 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 183 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 188 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 193 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 198 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: LAUNCH task # 4 (type EXCL) for 3 RERS17pb113-PT-8-LTLCardinality-02
lola: time limit : 377 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 0/377 1/32 RERS17pb113-PT-8-LTLCardinality-02 4384 m, 876 m/sec, 4383 t fired, .

Time elapsed: 203 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 5/377 2/32 RERS17pb113-PT-8-LTLCardinality-02 77647 m, 14652 m/sec, 79042 t fired, .

Time elapsed: 208 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 10/377 4/32 RERS17pb113-PT-8-LTLCardinality-02 230483 m, 30567 m/sec, 238470 t fired, .

Time elapsed: 213 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 16/377 5/32 RERS17pb113-PT-8-LTLCardinality-02 382480 m, 30399 m/sec, 403548 t fired, .

Time elapsed: 219 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 21/377 7/32 RERS17pb113-PT-8-LTLCardinality-02 533875 m, 30279 m/sec, 571298 t fired, .

Time elapsed: 224 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 26/377 8/32 RERS17pb113-PT-8-LTLCardinality-02 684086 m, 30042 m/sec, 733628 t fired, .

Time elapsed: 229 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 31/377 10/32 RERS17pb113-PT-8-LTLCardinality-02 831770 m, 29536 m/sec, 898624 t fired, .

Time elapsed: 234 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 36/377 12/32 RERS17pb113-PT-8-LTLCardinality-02 978652 m, 29376 m/sec, 1069651 t fired, .

Time elapsed: 239 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 41/377 13/32 RERS17pb113-PT-8-LTLCardinality-02 1122776 m, 28824 m/sec, 1243421 t fired, .

Time elapsed: 244 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 46/377 15/32 RERS17pb113-PT-8-LTLCardinality-02 1268580 m, 29160 m/sec, 1410691 t fired, .

Time elapsed: 249 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 51/377 17/32 RERS17pb113-PT-8-LTLCardinality-02 1412398 m, 28763 m/sec, 1587869 t fired, .

Time elapsed: 254 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 56/377 18/32 RERS17pb113-PT-8-LTLCardinality-02 1558713 m, 29263 m/sec, 1757874 t fired, .

Time elapsed: 259 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 61/377 20/32 RERS17pb113-PT-8-LTLCardinality-02 1705414 m, 29340 m/sec, 1925755 t fired, .

Time elapsed: 264 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 66/377 22/32 RERS17pb113-PT-8-LTLCardinality-02 1850317 m, 28980 m/sec, 2097854 t fired, .

Time elapsed: 269 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 71/377 23/32 RERS17pb113-PT-8-LTLCardinality-02 1995056 m, 28947 m/sec, 2264485 t fired, .

Time elapsed: 274 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 76/377 25/32 RERS17pb113-PT-8-LTLCardinality-02 2140441 m, 29077 m/sec, 2437509 t fired, .

Time elapsed: 279 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 81/377 27/32 RERS17pb113-PT-8-LTLCardinality-02 2286481 m, 29208 m/sec, 2612276 t fired, .

Time elapsed: 284 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 86/377 28/32 RERS17pb113-PT-8-LTLCardinality-02 2432075 m, 29118 m/sec, 2785212 t fired, .

Time elapsed: 289 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 91/377 30/32 RERS17pb113-PT-8-LTLCardinality-02 2576398 m, 28864 m/sec, 2962977 t fired, .

Time elapsed: 294 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 96/377 31/32 RERS17pb113-PT-8-LTLCardinality-02 2720051 m, 28730 m/sec, 3134450 t fired, .

Time elapsed: 299 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 8
lola: CANCELED task # 4 (type EXCL) for RERS17pb113-PT-8-LTLCardinality-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: LAUNCH task # 26 (type EXCL) for 25 RERS17pb113-PT-8-LTLCardinality-15
lola: time limit : 412 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for RERS17pb113-PT-8-LTLCardinality-15
lola: result : false
lola: markings : 9664
lola: fired transitions : 9664
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 RERS17pb113-PT-8-LTLCardinality-10
lola: time limit : 470 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 5/470 1/32 RERS17pb113-PT-8-LTLCardinality-10 91918 m, 18383 m/sec, 611523 t fired, .

Time elapsed: 309 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 10/470 2/32 RERS17pb113-PT-8-LTLCardinality-10 180085 m, 17633 m/sec, 1333499 t fired, .

Time elapsed: 314 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 15/470 2/32 RERS17pb113-PT-8-LTLCardinality-10 268776 m, 17738 m/sec, 2048487 t fired, .

Time elapsed: 319 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 20/470 3/32 RERS17pb113-PT-8-LTLCardinality-10 356019 m, 17448 m/sec, 2762547 t fired, .

Time elapsed: 324 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 25/470 4/32 RERS17pb113-PT-8-LTLCardinality-10 441698 m, 17135 m/sec, 3482400 t fired, .

Time elapsed: 329 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 30/470 4/32 RERS17pb113-PT-8-LTLCardinality-10 528763 m, 17413 m/sec, 4185729 t fired, .

Time elapsed: 334 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 35/470 5/32 RERS17pb113-PT-8-LTLCardinality-10 615262 m, 17299 m/sec, 4897133 t fired, .

Time elapsed: 339 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 40/470 5/32 RERS17pb113-PT-8-LTLCardinality-10 701238 m, 17195 m/sec, 5617213 t fired, .

Time elapsed: 344 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 45/470 6/32 RERS17pb113-PT-8-LTLCardinality-10 787326 m, 17217 m/sec, 6329365 t fired, .

Time elapsed: 349 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 50/470 6/32 RERS17pb113-PT-8-LTLCardinality-10 874186 m, 17372 m/sec, 7041053 t fired, .

Time elapsed: 354 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 55/470 7/32 RERS17pb113-PT-8-LTLCardinality-10 959199 m, 17002 m/sec, 7757176 t fired, .

Time elapsed: 359 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 60/470 8/32 RERS17pb113-PT-8-LTLCardinality-10 1045500 m, 17260 m/sec, 8473759 t fired, .

Time elapsed: 364 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 65/470 8/32 RERS17pb113-PT-8-LTLCardinality-10 1129997 m, 16899 m/sec, 9186180 t fired, .

Time elapsed: 369 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 70/470 9/32 RERS17pb113-PT-8-LTLCardinality-10 1217754 m, 17551 m/sec, 9892073 t fired, .

Time elapsed: 374 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 75/470 9/32 RERS17pb113-PT-8-LTLCardinality-10 1305599 m, 17569 m/sec, 10604605 t fired, .

Time elapsed: 379 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 80/470 10/32 RERS17pb113-PT-8-LTLCardinality-10 1391125 m, 17105 m/sec, 11325057 t fired, .

Time elapsed: 384 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 85/470 10/32 RERS17pb113-PT-8-LTLCardinality-10 1478974 m, 17569 m/sec, 12039689 t fired, .

Time elapsed: 389 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 90/470 11/32 RERS17pb113-PT-8-LTLCardinality-10 1563466 m, 16898 m/sec, 12765116 t fired, .

Time elapsed: 394 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 95/470 12/32 RERS17pb113-PT-8-LTLCardinality-10 1649480 m, 17202 m/sec, 13481688 t fired, .

Time elapsed: 399 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 100/470 12/32 RERS17pb113-PT-8-LTLCardinality-10 1734144 m, 16932 m/sec, 14200432 t fired, .

Time elapsed: 404 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 105/470 13/32 RERS17pb113-PT-8-LTLCardinality-10 1819670 m, 17105 m/sec, 14919639 t fired, .

Time elapsed: 409 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 110/470 13/32 RERS17pb113-PT-8-LTLCardinality-10 1902068 m, 16479 m/sec, 15673744 t fired, .

Time elapsed: 414 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 115/470 14/32 RERS17pb113-PT-8-LTLCardinality-10 1988902 m, 17366 m/sec, 16385259 t fired, .

Time elapsed: 419 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 120/470 14/32 RERS17pb113-PT-8-LTLCardinality-10 2072897 m, 16799 m/sec, 17113507 t fired, .

Time elapsed: 424 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 125/470 15/32 RERS17pb113-PT-8-LTLCardinality-10 2158383 m, 17097 m/sec, 17842791 t fired, .

Time elapsed: 429 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 130/470 15/32 RERS17pb113-PT-8-LTLCardinality-10 2242674 m, 16858 m/sec, 18576072 t fired, .

Time elapsed: 434 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 135/470 16/32 RERS17pb113-PT-8-LTLCardinality-10 2327146 m, 16894 m/sec, 19295492 t fired, .

Time elapsed: 439 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 140/470 17/32 RERS17pb113-PT-8-LTLCardinality-10 2410305 m, 16631 m/sec, 20011710 t fired, .

Time elapsed: 444 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 145/470 17/32 RERS17pb113-PT-8-LTLCardinality-10 2496816 m, 17302 m/sec, 20734974 t fired, .

Time elapsed: 449 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 150/470 18/32 RERS17pb113-PT-8-LTLCardinality-10 2582449 m, 17126 m/sec, 21452471 t fired, .

Time elapsed: 454 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 155/470 18/32 RERS17pb113-PT-8-LTLCardinality-10 2666617 m, 16833 m/sec, 22182667 t fired, .

Time elapsed: 459 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 160/470 19/32 RERS17pb113-PT-8-LTLCardinality-10 2749825 m, 16641 m/sec, 22924041 t fired, .

Time elapsed: 464 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 165/470 19/32 RERS17pb113-PT-8-LTLCardinality-10 2832991 m, 16633 m/sec, 23659265 t fired, .

Time elapsed: 469 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 170/470 20/32 RERS17pb113-PT-8-LTLCardinality-10 2918180 m, 17037 m/sec, 24379054 t fired, .

Time elapsed: 474 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 175/470 21/32 RERS17pb113-PT-8-LTLCardinality-10 3002302 m, 16824 m/sec, 25106145 t fired, .

Time elapsed: 479 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 180/470 21/32 RERS17pb113-PT-8-LTLCardinality-10 3086057 m, 16751 m/sec, 25837517 t fired, .

Time elapsed: 484 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 185/470 22/32 RERS17pb113-PT-8-LTLCardinality-10 3168114 m, 16411 m/sec, 26568345 t fired, .

Time elapsed: 489 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 190/470 22/32 RERS17pb113-PT-8-LTLCardinality-10 3252075 m, 16792 m/sec, 27292207 t fired, .

Time elapsed: 494 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 195/470 23/32 RERS17pb113-PT-8-LTLCardinality-10 3338786 m, 17342 m/sec, 28003509 t fired, .

Time elapsed: 499 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 200/470 23/32 RERS17pb113-PT-8-LTLCardinality-10 3419385 m, 16119 m/sec, 28759925 t fired, .

Time elapsed: 504 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 205/470 24/32 RERS17pb113-PT-8-LTLCardinality-10 3496478 m, 15418 m/sec, 29492339 t fired, .

Time elapsed: 509 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 210/470 24/32 RERS17pb113-PT-8-LTLCardinality-10 3576313 m, 15967 m/sec, 30233062 t fired, .

Time elapsed: 514 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 215/470 25/32 RERS17pb113-PT-8-LTLCardinality-10 3662792 m, 17295 m/sec, 30957261 t fired, .

Time elapsed: 519 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 220/470 25/32 RERS17pb113-PT-8-LTLCardinality-10 3748511 m, 17143 m/sec, 31679401 t fired, .

Time elapsed: 524 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 225/470 26/32 RERS17pb113-PT-8-LTLCardinality-10 3830005 m, 16298 m/sec, 32392089 t fired, .

Time elapsed: 529 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 230/470 26/32 RERS17pb113-PT-8-LTLCardinality-10 3910852 m, 16169 m/sec, 33113649 t fired, .

Time elapsed: 534 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 235/470 27/32 RERS17pb113-PT-8-LTLCardinality-10 3991817 m, 16193 m/sec, 33826453 t fired, .

Time elapsed: 539 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 240/470 28/32 RERS17pb113-PT-8-LTLCardinality-10 4075030 m, 16642 m/sec, 34536366 t fired, .

Time elapsed: 544 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 245/470 28/32 RERS17pb113-PT-8-LTLCardinality-10 4157849 m, 16563 m/sec, 35253412 t fired, .

Time elapsed: 549 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 250/470 29/32 RERS17pb113-PT-8-LTLCardinality-10 4237910 m, 16012 m/sec, 35980925 t fired, .

Time elapsed: 554 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 255/470 29/32 RERS17pb113-PT-8-LTLCardinality-10 4320722 m, 16562 m/sec, 36687166 t fired, .

Time elapsed: 559 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 260/470 30/32 RERS17pb113-PT-8-LTLCardinality-10 4403089 m, 16473 m/sec, 37401837 t fired, .

Time elapsed: 564 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 265/470 30/32 RERS17pb113-PT-8-LTLCardinality-10 4486497 m, 16681 m/sec, 38106253 t fired, .

Time elapsed: 569 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 270/470 31/32 RERS17pb113-PT-8-LTLCardinality-10 4569632 m, 16627 m/sec, 38819749 t fired, .

Time elapsed: 574 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 275/470 31/32 RERS17pb113-PT-8-LTLCardinality-10 4649728 m, 16019 m/sec, 39541123 t fired, .

Time elapsed: 579 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 280/470 32/32 RERS17pb113-PT-8-LTLCardinality-10 4730443 m, 16143 m/sec, 40249938 t fired, .

Time elapsed: 584 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 LTL EXCL 285/470 32/32 RERS17pb113-PT-8-LTLCardinality-10 4811087 m, 16128 m/sec, 40959573 t fired, .

Time elapsed: 589 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: CANCELED task # 23 (type EXCL) for RERS17pb113-PT-8-LTLCardinality-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 594 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: LAUNCH task # 17 (type EXCL) for 16 RERS17pb113-PT-8-LTLCardinality-06
lola: time limit : 501 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for RERS17pb113-PT-8-LTLCardinality-06
lola: result : false
lola: markings : 10803
lola: fired transitions : 10803
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 RERS17pb113-PT-8-LTLCardinality-01
lola: time limit : 601 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for RERS17pb113-PT-8-LTLCardinality-01
lola: result : false
lola: markings : 18495
lola: fired transitions : 18537
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 9 RERS17pb113-PT-8-LTLCardinality-05
lola: time limit : 751 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 4/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 304 m, 60 m/sec, 303 t fired, .

Time elapsed: 599 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 9/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 686 m, 76 m/sec, 685 t fired, .

Time elapsed: 604 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 14/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 1067 m, 76 m/sec, 1066 t fired, .

Time elapsed: 609 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 19/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 1441 m, 74 m/sec, 1440 t fired, .

Time elapsed: 614 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 24/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 1815 m, 74 m/sec, 1814 t fired, .

Time elapsed: 619 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 29/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 2191 m, 75 m/sec, 2190 t fired, .

Time elapsed: 624 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 34/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 2543 m, 70 m/sec, 2542 t fired, .

Time elapsed: 629 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 39/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 2796 m, 50 m/sec, 2795 t fired, .

Time elapsed: 634 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 44/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 3063 m, 53 m/sec, 3062 t fired, .

Time elapsed: 639 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 49/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 3396 m, 66 m/sec, 3395 t fired, .

Time elapsed: 644 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 54/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 3641 m, 49 m/sec, 3640 t fired, .

Time elapsed: 649 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 59/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 3837 m, 39 m/sec, 3836 t fired, .

Time elapsed: 654 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 64/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 4014 m, 35 m/sec, 4013 t fired, .

Time elapsed: 659 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 69/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 4219 m, 41 m/sec, 4218 t fired, .

Time elapsed: 664 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 74/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 4346 m, 25 m/sec, 4345 t fired, .

Time elapsed: 669 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 79/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 4519 m, 34 m/sec, 4518 t fired, .

Time elapsed: 674 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 84/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 4801 m, 56 m/sec, 4800 t fired, .

Time elapsed: 679 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 89/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 5115 m, 62 m/sec, 5114 t fired, .

Time elapsed: 684 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 94/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 5331 m, 43 m/sec, 5330 t fired, .

Time elapsed: 689 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 99/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 5590 m, 51 m/sec, 5589 t fired, .

Time elapsed: 694 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 104/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 5911 m, 64 m/sec, 5910 t fired, .

Time elapsed: 699 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 109/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 6138 m, 45 m/sec, 6137 t fired, .

Time elapsed: 704 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 114/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 6377 m, 47 m/sec, 6376 t fired, .

Time elapsed: 709 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 119/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 6642 m, 53 m/sec, 6641 t fired, .

Time elapsed: 714 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 124/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 6943 m, 60 m/sec, 6942 t fired, .

Time elapsed: 719 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 129/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 7202 m, 51 m/sec, 7201 t fired, .

Time elapsed: 724 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 134/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 7459 m, 51 m/sec, 7458 t fired, .

Time elapsed: 729 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 139/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 7706 m, 49 m/sec, 7705 t fired, .

Time elapsed: 734 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 144/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 7955 m, 49 m/sec, 7954 t fired, .

Time elapsed: 739 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 149/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 8193 m, 47 m/sec, 8192 t fired, .

Time elapsed: 744 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 154/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 8492 m, 59 m/sec, 8491 t fired, .

Time elapsed: 749 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 159/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 8750 m, 51 m/sec, 8749 t fired, .

Time elapsed: 754 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 164/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 9065 m, 63 m/sec, 9064 t fired, .

Time elapsed: 759 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 169/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 9318 m, 50 m/sec, 9317 t fired, .

Time elapsed: 764 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 174/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 9668 m, 70 m/sec, 9667 t fired, .

Time elapsed: 769 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 179/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 9925 m, 51 m/sec, 9924 t fired, .

Time elapsed: 774 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 184/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 10250 m, 65 m/sec, 10249 t fired, .

Time elapsed: 779 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 189/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 10559 m, 61 m/sec, 10558 t fired, .

Time elapsed: 784 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 194/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 10880 m, 64 m/sec, 10879 t fired, .

Time elapsed: 789 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 199/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 11254 m, 74 m/sec, 11253 t fired, .

Time elapsed: 794 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 204/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 11536 m, 56 m/sec, 11535 t fired, .

Time elapsed: 799 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 209/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 11867 m, 66 m/sec, 11866 t fired, .

Time elapsed: 804 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 214/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 12141 m, 54 m/sec, 12140 t fired, .

Time elapsed: 809 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 219/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 12444 m, 60 m/sec, 12443 t fired, .

Time elapsed: 814 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 224/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 12712 m, 53 m/sec, 12711 t fired, .

Time elapsed: 819 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 229/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 13040 m, 65 m/sec, 13039 t fired, .

Time elapsed: 824 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 234/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 13309 m, 53 m/sec, 13308 t fired, .

Time elapsed: 829 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 239/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 13646 m, 67 m/sec, 13645 t fired, .

Time elapsed: 834 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 244/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 13989 m, 68 m/sec, 13988 t fired, .

Time elapsed: 839 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 249/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 14303 m, 62 m/sec, 14302 t fired, .

Time elapsed: 844 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 254/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 14598 m, 59 m/sec, 14597 t fired, .

Time elapsed: 849 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 259/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 14875 m, 55 m/sec, 14874 t fired, .

Time elapsed: 854 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 264/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 15206 m, 66 m/sec, 15205 t fired, .

Time elapsed: 859 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 269/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 15498 m, 58 m/sec, 15497 t fired, .

Time elapsed: 864 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 274/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 15821 m, 64 m/sec, 15820 t fired, .

Time elapsed: 869 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 279/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 16094 m, 54 m/sec, 16093 t fired, .

Time elapsed: 874 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 284/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 16423 m, 65 m/sec, 16422 t fired, .

Time elapsed: 879 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 289/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 16691 m, 53 m/sec, 16690 t fired, .

Time elapsed: 884 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 294/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 17054 m, 72 m/sec, 17053 t fired, .

Time elapsed: 889 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 299/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 17345 m, 58 m/sec, 17344 t fired, .

Time elapsed: 894 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 304/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 17634 m, 57 m/sec, 17633 t fired, .

Time elapsed: 899 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 309/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 17942 m, 61 m/sec, 17941 t fired, .

Time elapsed: 904 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 314/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 18245 m, 60 m/sec, 18244 t fired, .

Time elapsed: 909 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 319/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 18556 m, 62 m/sec, 18555 t fired, .

Time elapsed: 914 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 324/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 18858 m, 60 m/sec, 18857 t fired, .

Time elapsed: 919 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 329/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 19214 m, 71 m/sec, 19213 t fired, .

Time elapsed: 924 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 334/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 19548 m, 66 m/sec, 19547 t fired, .

Time elapsed: 929 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 339/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 19854 m, 61 m/sec, 19853 t fired, .

Time elapsed: 934 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 344/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 20224 m, 74 m/sec, 20223 t fired, .

Time elapsed: 939 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 349/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 20587 m, 72 m/sec, 20586 t fired, .

Time elapsed: 944 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 354/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 20888 m, 60 m/sec, 20887 t fired, .

Time elapsed: 949 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 359/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 21179 m, 58 m/sec, 21178 t fired, .

Time elapsed: 954 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 364/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 21573 m, 78 m/sec, 21573 t fired, .

Time elapsed: 959 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 369/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 21854 m, 56 m/sec, 21854 t fired, .

Time elapsed: 964 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 374/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 22152 m, 59 m/sec, 22152 t fired, .

Time elapsed: 969 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 379/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 22504 m, 70 m/sec, 22508 t fired, .

Time elapsed: 974 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 384/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 22852 m, 69 m/sec, 22856 t fired, .

Time elapsed: 979 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 389/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 23209 m, 71 m/sec, 23213 t fired, .

Time elapsed: 984 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 394/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 23530 m, 64 m/sec, 23534 t fired, .

Time elapsed: 989 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 399/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 23872 m, 68 m/sec, 23876 t fired, .

Time elapsed: 994 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 404/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 24196 m, 64 m/sec, 24200 t fired, .

Time elapsed: 999 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 409/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 24525 m, 65 m/sec, 24529 t fired, .

Time elapsed: 1004 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 414/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 24891 m, 73 m/sec, 24895 t fired, .

Time elapsed: 1009 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 419/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 25349 m, 91 m/sec, 25353 t fired, .

Time elapsed: 1014 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 424/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 25753 m, 80 m/sec, 25757 t fired, .

Time elapsed: 1019 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 429/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 26160 m, 81 m/sec, 26164 t fired, .

Time elapsed: 1024 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 434/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 26530 m, 74 m/sec, 26535 t fired, .

Time elapsed: 1029 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 439/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 26899 m, 73 m/sec, 26907 t fired, .

Time elapsed: 1034 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 444/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 27205 m, 61 m/sec, 27213 t fired, .

Time elapsed: 1039 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 449/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 27513 m, 61 m/sec, 27521 t fired, .

Time elapsed: 1044 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 454/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 27917 m, 80 m/sec, 27925 t fired, .

Time elapsed: 1049 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 459/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 28264 m, 69 m/sec, 28272 t fired, .

Time elapsed: 1054 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 464/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 28615 m, 70 m/sec, 28623 t fired, .

Time elapsed: 1059 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 469/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 29014 m, 79 m/sec, 29023 t fired, .

Time elapsed: 1064 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 474/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 29381 m, 73 m/sec, 29390 t fired, .

Time elapsed: 1069 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 479/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 29746 m, 73 m/sec, 29755 t fired, .

Time elapsed: 1074 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 484/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 30076 m, 66 m/sec, 30088 t fired, .

Time elapsed: 1079 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 489/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 30433 m, 71 m/sec, 30463 t fired, .

Time elapsed: 1084 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 494/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 30732 m, 59 m/sec, 30762 t fired, .

Time elapsed: 1089 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 499/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 31058 m, 65 m/sec, 31088 t fired, .

Time elapsed: 1094 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 504/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 31383 m, 65 m/sec, 31413 t fired, .

Time elapsed: 1099 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 509/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 31745 m, 72 m/sec, 31775 t fired, .

Time elapsed: 1104 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 514/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 32066 m, 64 m/sec, 32096 t fired, .

Time elapsed: 1109 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 519/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 32410 m, 68 m/sec, 32440 t fired, .

Time elapsed: 1114 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 524/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 32769 m, 71 m/sec, 32799 t fired, .

Time elapsed: 1119 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 529/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 33115 m, 69 m/sec, 33145 t fired, .

Time elapsed: 1124 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 534/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 33463 m, 69 m/sec, 33493 t fired, .

Time elapsed: 1129 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 539/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 33828 m, 73 m/sec, 33858 t fired, .

Time elapsed: 1134 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 544/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 34229 m, 80 m/sec, 34259 t fired, .

Time elapsed: 1139 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 549/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 34573 m, 68 m/sec, 34603 t fired, .

Time elapsed: 1144 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 554/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 34906 m, 66 m/sec, 34936 t fired, .

Time elapsed: 1149 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 559/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 35342 m, 87 m/sec, 35372 t fired, .

Time elapsed: 1154 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 564/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 35725 m, 76 m/sec, 35755 t fired, .

Time elapsed: 1159 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 569/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 36111 m, 77 m/sec, 36142 t fired, .

Time elapsed: 1164 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 574/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 36549 m, 87 m/sec, 36580 t fired, .

Time elapsed: 1169 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 579/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 36908 m, 71 m/sec, 36939 t fired, .

Time elapsed: 1174 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 584/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 37211 m, 60 m/sec, 37242 t fired, .

Time elapsed: 1179 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 589/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 37568 m, 71 m/sec, 37599 t fired, .

Time elapsed: 1184 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 594/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 37932 m, 72 m/sec, 37963 t fired, .

Time elapsed: 1189 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 599/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 38267 m, 67 m/sec, 38298 t fired, .

Time elapsed: 1194 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 604/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 38638 m, 74 m/sec, 38669 t fired, .

Time elapsed: 1199 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 609/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 38971 m, 66 m/sec, 39002 t fired, .

Time elapsed: 1204 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 614/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 39366 m, 79 m/sec, 39397 t fired, .

Time elapsed: 1209 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 619/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 39716 m, 70 m/sec, 39750 t fired, .

Time elapsed: 1214 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 624/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 40039 m, 64 m/sec, 40073 t fired, .

Time elapsed: 1219 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 629/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 40472 m, 86 m/sec, 40506 t fired, .

Time elapsed: 1224 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 634/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 40828 m, 71 m/sec, 40862 t fired, .

Time elapsed: 1229 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 639/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 41199 m, 74 m/sec, 41233 t fired, .

Time elapsed: 1234 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 644/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 41663 m, 92 m/sec, 41697 t fired, .

Time elapsed: 1239 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 649/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 42087 m, 84 m/sec, 42121 t fired, .

Time elapsed: 1244 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 654/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 42492 m, 81 m/sec, 42526 t fired, .

Time elapsed: 1249 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 659/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 42862 m, 74 m/sec, 42896 t fired, .

Time elapsed: 1254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 664/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 43228 m, 73 m/sec, 43263 t fired, .

Time elapsed: 1259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 669/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 43595 m, 73 m/sec, 43633 t fired, .

Time elapsed: 1264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-8-LTLCardinality-02: LTL 0 0 0 0 1 0 1 0
RERS17pb113-PT-8-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-05: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-8-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-8-LTLCardinality-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 LTL EXCL 674/751 1/32 RERS17pb113-PT-8-LTLCardinality-05 43903 m, 61 m/sec, 43968 t fired, .

Time elapsed: 1269 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-8-LTLCardinality-01: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-02: LTL unknown AGGR
RERS17pb113-PT-8-LTLCardinality-04: LTL unknown AGGR
RERS17pb113-PT-8-LTLCardinality-05: CONJ unknown CONJ
RERS17pb113-PT-8-LTLCardinality-06: LTL false LTL model checker
RERS17pb113-PT-8-LTLCardinality-09: LTL unknown AGGR
RERS17pb113-PT-8-LTLCardinality-10: LTL unknown AGGR
RERS17pb113-PT-8-LTLCardinality-15: LTL false LTL model checker


Time elapsed: 1272 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-8"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RERS17pb113-PT-8, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199100059"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-8.tgz
mv RERS17pb113-PT-8 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;