Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199100044.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RERS17pb113-PT-6, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199100044
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 7.0K Feb 26 18:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 26 18:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 26 18:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 26 18:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 16:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 18:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 18:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 18:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 18:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 15M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-00
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-01
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-02
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-03
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-04
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-05
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-06
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-07
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-08
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-09
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-10
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-11
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-12
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-13
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-14
FORMULA_NAME RERS17pb113-PT-6-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678942143325

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb113-PT-6
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 04:49:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 04:49:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 04:49:05] [INFO ] Load time of PNML (sax parser for PT used): 557 ms
[2023-03-16 04:49:05] [INFO ] Transformed 639 places.
[2023-03-16 04:49:05] [INFO ] Transformed 31353 transitions.
[2023-03-16 04:49:05] [INFO ] Parsed PT model containing 639 places and 31353 transitions and 125418 arcs in 761 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 15 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 2 formulas.
FORMULA RERS17pb113-PT-6-LTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RERS17pb113-PT-6-LTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 57 out of 639 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 639/639 places, 31353/31353 transitions.
Ensure Unique test removed 12 places
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 627 transition count 31353
Applied a total of 12 rules in 219 ms. Remains 627 /639 variables (removed 12) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:49:06] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 04:49:06] [INFO ] Computed 13 place invariants in 138 ms
[2023-03-16 04:49:08] [INFO ] Implicit Places using invariants in 2366 ms returned []
Implicit Place search using SMT only with invariants took 2390 ms to find 0 implicit places.
[2023-03-16 04:49:08] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:49:08] [INFO ] Invariant cache hit.
[2023-03-16 04:49:17] [INFO ] Dead Transitions using invariants and state equation in 8707 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 627/639 places, 31353/31353 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11326 ms. Remains : 627/639 places, 31353/31353 transitions.
Support contains 57 out of 627 places after structural reductions.
[2023-03-16 04:49:18] [INFO ] Flatten gal took : 941 ms
[2023-03-16 04:49:19] [INFO ] Flatten gal took : 736 ms
[2023-03-16 04:49:21] [INFO ] Input system was already deterministic with 31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 692 ms. (steps per millisecond=14 ) properties (out of 32) seen :11
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 21) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 21) seen :0
Running SMT prover for 21 properties.
[2023-03-16 04:49:22] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:49:22] [INFO ] Invariant cache hit.
[2023-03-16 04:49:23] [INFO ] [Real]Absence check using 13 positive place invariants in 9 ms returned sat
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:631)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 04:49:47] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 04:49:47] [INFO ] After 25047ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 21 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 1 ms.
Support contains 37 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 527 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 530 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 684 ms. (steps per millisecond=14 ) properties (out of 21) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Running SMT prover for 17 properties.
[2023-03-16 04:49:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:49:49] [INFO ] Computed 13 place invariants in 90 ms
[2023-03-16 04:49:49] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 04:50:14] [INFO ] After 24599ms SMT Verify possible using state equation in real domain returned unsat :0 sat :7 real:10
[2023-03-16 04:50:14] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 04:50:14] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 04:50:14] [INFO ] After 25228ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 17 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 32 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 207 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 207 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 544 ms. (steps per millisecond=18 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 17) seen :0
Interrupted probabilistic random walk after 24013 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24013 steps, saw 21724 distinct states, run finished after 3003 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 17 properties.
[2023-03-16 04:50:18] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:50:18] [INFO ] Invariant cache hit.
[2023-03-16 04:50:19] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 04:50:44] [INFO ] After 24631ms SMT Verify possible using state equation in real domain returned unsat :0 sat :7 real:10
[2023-03-16 04:50:44] [INFO ] State equation strengthened by 268 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 04:50:44] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 04:50:44] [INFO ] After 25141ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 17 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 32 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 187 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 187 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 182 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 04:50:44] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:50:44] [INFO ] Invariant cache hit.
[2023-03-16 04:50:46] [INFO ] Implicit Places using invariants in 1878 ms returned []
Implicit Place search using SMT only with invariants took 1884 ms to find 0 implicit places.
[2023-03-16 04:50:46] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:50:46] [INFO ] Invariant cache hit.
[2023-03-16 04:50:54] [INFO ] Dead Transitions using invariants and state equation in 8023 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10093 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 651 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 17 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:50:55] [INFO ] Computed 13 place invariants in 64 ms
[2023-03-16 04:50:55] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:51:17] [INFO ] After 22511ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:17
[2023-03-16 04:51:18] [INFO ] [Nat]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 04:51:40] [INFO ] After 21707ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :17
[2023-03-16 04:51:51] [INFO ] After 32903ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :17
Attempting to minimize the solution found.
Minimization took 7267 ms.
[2023-03-16 04:51:58] [INFO ] After 40618ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :17
Computed a total of 1 stabilizing places and 1 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G((X(p2)||p1))))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 78 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:51:59] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 04:51:59] [INFO ] Computed 13 place invariants in 59 ms
[2023-03-16 04:52:01] [INFO ] Implicit Places using invariants in 2152 ms returned []
Implicit Place search using SMT only with invariants took 2153 ms to find 0 implicit places.
[2023-03-16 04:52:01] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:52:01] [INFO ] Invariant cache hit.
[2023-03-16 04:52:09] [INFO ] Dead Transitions using invariants and state equation in 8299 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10532 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 309 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 3}], [{ cond=(NOT p2), acceptance={} source=3 dest: 2}, { cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=3 dest: 3}]], initial=0, aps=[p0:(OR (LT s54 1) (LT s377 1)), p1:(OR (LT s391 1) (LT s535 1)), p2:(OR (LT s391 1) (LT s535 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 7 reset in 4780 ms.
Product exploration explored 100000 steps with 8 reset in 4811 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 386 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 161 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 475 ms. (steps per millisecond=21 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 22017 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 22017 steps, saw 19937 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 04:52:23] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:52:23] [INFO ] Invariant cache hit.
[2023-03-16 04:52:23] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:52:43] [INFO ] After 19602ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 04:52:43] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 04:53:02] [INFO ] After 18834ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 04:53:02] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 04:53:08] [INFO ] After 5878ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 04:53:08] [INFO ] After 5879ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-16 04:53:08] [INFO ] After 25053ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 45 ms.
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 361 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 362 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 408 ms. (steps per millisecond=24 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 24303 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24303 steps, saw 21986 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 04:53:12] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:53:12] [INFO ] Computed 13 place invariants in 64 ms
[2023-03-16 04:53:12] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 04:53:30] [INFO ] After 17987ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 04:53:30] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:53:47] [INFO ] After 16614ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 04:53:47] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 04:53:54] [INFO ] After 6665ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 04:53:54] [INFO ] Deduced a trap composed of 40 places in 344 ms of which 0 ms to minimize.
[2023-03-16 04:53:55] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1134 ms
[2023-03-16 04:53:55] [INFO ] After 8192ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-03-16 04:53:55] [INFO ] After 25050ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 20 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 173 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 173 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 173 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 04:53:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:53:56] [INFO ] Invariant cache hit.
[2023-03-16 04:53:57] [INFO ] Implicit Places using invariants in 1849 ms returned []
Implicit Place search using SMT only with invariants took 1850 ms to find 0 implicit places.
[2023-03-16 04:53:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:53:57] [INFO ] Invariant cache hit.
[2023-03-16 04:54:05] [INFO ] Dead Transitions using invariants and state equation in 7999 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10028 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 482 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 174 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 148 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 73 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:54:06] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 04:54:06] [INFO ] Computed 13 place invariants in 47 ms
[2023-03-16 04:54:08] [INFO ] Implicit Places using invariants in 1931 ms returned []
Implicit Place search using SMT only with invariants took 1932 ms to find 0 implicit places.
[2023-03-16 04:54:08] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:54:08] [INFO ] Invariant cache hit.
[2023-03-16 04:54:16] [INFO ] Dead Transitions using invariants and state equation in 8046 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10055 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 479 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 158 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 418 ms. (steps per millisecond=23 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 24526 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24526 steps, saw 22174 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 04:54:21] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:54:21] [INFO ] Invariant cache hit.
[2023-03-16 04:54:21] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:54:40] [INFO ] After 18908ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 04:54:40] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:54:58] [INFO ] After 18266ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 04:54:58] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 04:55:05] [INFO ] After 6511ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 04:55:05] [INFO ] After 6512ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 14 ms.
[2023-03-16 04:55:05] [INFO ] After 25044ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 17 ms.
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 370 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 371 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 401 ms. (steps per millisecond=24 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 25048 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25048 steps, saw 22651 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 04:55:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:55:09] [INFO ] Computed 13 place invariants in 51 ms
[2023-03-16 04:55:09] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:55:26] [INFO ] After 17021ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 04:55:26] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:55:42] [INFO ] After 16328ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 04:55:42] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 04:55:49] [INFO ] After 6887ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 04:55:50] [INFO ] Deduced a trap composed of 40 places in 339 ms of which 2 ms to minimize.
[2023-03-16 04:55:51] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1136 ms
[2023-03-16 04:55:53] [INFO ] Deduced a trap composed of 64 places in 2407 ms of which 2 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 04:55:53] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 04:55:53] [INFO ] After 27446ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:4
Parikh walk visited 0 properties in 15 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 174 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 174 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 174 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 04:55:54] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:55:54] [INFO ] Invariant cache hit.
[2023-03-16 04:55:56] [INFO ] Implicit Places using invariants in 1928 ms returned []
Implicit Place search using SMT only with invariants took 1930 ms to find 0 implicit places.
[2023-03-16 04:55:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:55:56] [INFO ] Invariant cache hit.
[2023-03-16 04:56:04] [INFO ] Dead Transitions using invariants and state equation in 8110 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10218 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 419 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 146 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 146 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 147 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Product exploration explored 100000 steps with 5 reset in 3293 ms.
Product exploration explored 100000 steps with 8 reset in 3174 ms.
Applying partial POR strategy [false, true, false, false]
Stuttering acceptance computed with spot in 147 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 292 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:56:12] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 04:56:12] [INFO ] Computed 13 place invariants in 51 ms
[2023-03-16 04:56:20] [INFO ] Dead Transitions using invariants and state equation in 8082 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8376 ms. Remains : 627/627 places, 31353/31353 transitions.
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 80 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:56:20] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:56:20] [INFO ] Invariant cache hit.
[2023-03-16 04:56:22] [INFO ] Implicit Places using invariants in 1934 ms returned []
Implicit Place search using SMT only with invariants took 1935 ms to find 0 implicit places.
[2023-03-16 04:56:22] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:56:22] [INFO ] Invariant cache hit.
[2023-03-16 04:56:30] [INFO ] Dead Transitions using invariants and state equation in 8002 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10020 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-00 finished in 272723 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((X(p0)||p1) U ((X(G(p2)) U p0)||F(p3))))'
Support contains 8 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 74 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 04:56:31] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:56:31] [INFO ] Invariant cache hit.
[2023-03-16 04:56:33] [INFO ] Implicit Places using invariants in 1893 ms returned []
Implicit Place search using SMT only with invariants took 1894 ms to find 0 implicit places.
[2023-03-16 04:56:33] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:56:33] [INFO ] Invariant cache hit.
[2023-03-16 04:56:41] [INFO ] Dead Transitions using invariants and state equation in 8050 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10020 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 197 ms :[(AND (NOT p3) (NOT p2)), (AND (NOT p0) (NOT p3)), (AND (NOT p0) (NOT p3)), (NOT p3), (OR (AND (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p3)))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p3) p2), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p3) (NOT p2)), acceptance={} source=0 dest: 3}], [{ cond=(AND (NOT p0) (NOT p3) p1), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p3) (NOT p1)), acceptance={0} source=1 dest: 2}], [{ cond=(AND (NOT p0) (NOT p3) (NOT p2)), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p0) (NOT p3) p2), acceptance={} source=2 dest: 4}], [{ cond=(NOT p3), acceptance={0} source=3 dest: 3}], [{ cond=(AND p0 (NOT p3) p2), acceptance={0} source=4 dest: 0}, { cond=(AND (NOT p3) (NOT p2)), acceptance={0} source=4 dest: 3}, { cond=(AND (NOT p0) (NOT p3) p2), acceptance={0} source=4 dest: 4}]], initial=1, aps=[p3:(AND (GEQ s171 1) (GEQ s591 1)), p2:(AND (GEQ s132 1) (GEQ s134 1)), p0:(AND (GEQ s250 1) (GEQ s462 1)), p1:(AND (GEQ s456 1) (GEQ s519 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3473 ms.
Product exploration explored 100000 steps with 3 reset in 3730 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p3) (NOT p2) (NOT p0) (NOT p1)), (X (NOT (AND (NOT p0) (NOT p3) p1))), (X (AND (NOT p0) (NOT p3) (NOT p2))), (X (AND (NOT p0) (NOT p3) (NOT p1))), (X (NOT (AND (NOT p0) (NOT p3) p2))), (X (X (NOT (AND (NOT p0) (NOT p3) p1)))), (X (X (AND (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p3) p2)))), (X (X (NOT p3))), (X (X (NOT (AND p0 (NOT p3) p2))))]
False Knowledge obtained : []
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 12 factoid took 645 ms. Reduced automaton from 5 states, 10 edges and 4 AP (stutter sensitive) to 2 states, 2 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 64 ms :[(NOT p3), (NOT p3)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 399 ms. (steps per millisecond=25 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 24939 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24939 steps, saw 22547 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 04:56:53] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 04:56:53] [INFO ] Invariant cache hit.
[2023-03-16 04:56:53] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:57:18] [INFO ] After 25026ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 354 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 356 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 300 ms. (steps per millisecond=33 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25242 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25242 steps, saw 22820 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 04:57:22] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:57:22] [INFO ] Computed 13 place invariants in 55 ms
[2023-03-16 04:57:22] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:57:39] [INFO ] After 17275ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 04:57:39] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 04:57:43] [INFO ] After 3704ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 04:57:43] [INFO ] After 21267ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 04:57:43] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:58:00] [INFO ] After 16794ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 04:58:05] [INFO ] After 4644ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 04:58:06] [INFO ] Deduced a trap composed of 65 places in 462 ms of which 1 ms to minimize.
[2023-03-16 04:58:06] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1340 ms
[2023-03-16 04:58:07] [INFO ] After 6704ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1176 ms.
[2023-03-16 04:58:08] [INFO ] After 24771ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 187 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 187 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 04:58:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:58:08] [INFO ] Invariant cache hit.
[2023-03-16 04:58:10] [INFO ] Implicit Places using invariants in 1823 ms returned []
Implicit Place search using SMT only with invariants took 1824 ms to find 0 implicit places.
[2023-03-16 04:58:10] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:58:10] [INFO ] Invariant cache hit.
[2023-03-16 04:58:18] [INFO ] Dead Transitions using invariants and state equation in 8077 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10082 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 515 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:58:19] [INFO ] Computed 13 place invariants in 50 ms
[2023-03-16 04:58:19] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:58:33] [INFO ] After 14323ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 04:58:33] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:58:47] [INFO ] After 14160ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 04:58:48] [INFO ] After 14997ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 483 ms.
[2023-03-16 04:58:49] [INFO ] After 15576ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND (NOT p3) (NOT p2) (NOT p0) (NOT p1)), (X (NOT (AND (NOT p0) (NOT p3) p1))), (X (AND (NOT p0) (NOT p3) (NOT p2))), (X (AND (NOT p0) (NOT p3) (NOT p1))), (X (NOT (AND (NOT p0) (NOT p3) p2))), (X (X (NOT (AND (NOT p0) (NOT p3) p1)))), (X (X (AND (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p3) p2)))), (X (X (NOT p3))), (X (X (NOT (AND p0 (NOT p3) p2))))]
False Knowledge obtained : []
Knowledge based reduction with 12 factoid took 417 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 32 ms :[(NOT p3)]
Stuttering acceptance computed with spot in 34 ms :[(NOT p3)]
[2023-03-16 04:58:49] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 04:58:49] [INFO ] Computed 13 place invariants in 48 ms
Could not prove EG (NOT p3)
Support contains 2 out of 627 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 173 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 04:59:05] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 04:59:05] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 04:59:07] [INFO ] Implicit Places using invariants in 1982 ms returned []
Implicit Place search using SMT only with invariants took 1983 ms to find 0 implicit places.
[2023-03-16 04:59:07] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:59:07] [INFO ] Invariant cache hit.
[2023-03-16 04:59:15] [INFO ] Dead Transitions using invariants and state equation in 7907 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10068 ms. Remains : 626/627 places, 31352/31353 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p3), (X (NOT p3)), (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 137 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 34 ms :[(NOT p3)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 264 ms. (steps per millisecond=37 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25157 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25157 steps, saw 22745 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 04:59:18] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 04:59:18] [INFO ] Invariant cache hit.
[2023-03-16 04:59:18] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 04:59:35] [INFO ] After 16485ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 04:59:35] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 04:59:38] [INFO ] After 3229ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 04:59:38] [INFO ] After 20014ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 04:59:38] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 04:59:55] [INFO ] After 16218ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 04:59:59] [INFO ] After 4163ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:00:00] [INFO ] Deduced a trap composed of 65 places in 432 ms of which 1 ms to minimize.
[2023-03-16 05:00:00] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1276 ms
[2023-03-16 05:00:00] [INFO ] After 5881ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1072 ms.
[2023-03-16 05:00:02] [INFO ] After 23264ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 179 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 181 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 278 ms. (steps per millisecond=35 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25233 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25233 steps, saw 22812 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:00:05] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:00:05] [INFO ] Invariant cache hit.
[2023-03-16 05:00:05] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:00:22] [INFO ] After 16438ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:00:22] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:00:25] [INFO ] After 3153ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:00:25] [INFO ] After 19772ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:00:25] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:00:41] [INFO ] After 16512ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:00:46] [INFO ] After 4211ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:00:47] [INFO ] Deduced a trap composed of 65 places in 461 ms of which 1 ms to minimize.
[2023-03-16 05:00:47] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1427 ms
[2023-03-16 05:00:48] [INFO ] After 6103ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1314 ms.
[2023-03-16 05:00:49] [INFO ] After 24018ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 156 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 157 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 266 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:00:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:00:49] [INFO ] Invariant cache hit.
[2023-03-16 05:00:51] [INFO ] Implicit Places using invariants in 1954 ms returned []
Implicit Place search using SMT only with invariants took 1955 ms to find 0 implicit places.
[2023-03-16 05:00:51] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:00:51] [INFO ] Invariant cache hit.
[2023-03-16 05:00:59] [INFO ] Dead Transitions using invariants and state equation in 7913 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10147 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(NOT p3), (X (NOT p3)), (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 114 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 38 ms :[(NOT p3)]
Stuttering acceptance computed with spot in 38 ms :[(NOT p3)]
[2023-03-16 05:00:59] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:01:00] [INFO ] Invariant cache hit.
Could not prove EG (NOT p3)
Stuttering acceptance computed with spot in 39 ms :[(NOT p3)]
Product exploration explored 100000 steps with 3 reset in 3235 ms.
Product exploration explored 100000 steps with 2 reset in 3375 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 161 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:01:21] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:01:21] [INFO ] Invariant cache hit.
[2023-03-16 05:01:23] [INFO ] Implicit Places using invariants in 1960 ms returned []
Implicit Place search using SMT only with invariants took 1961 ms to find 0 implicit places.
[2023-03-16 05:01:23] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:01:23] [INFO ] Invariant cache hit.
[2023-03-16 05:01:32] [INFO ] Dead Transitions using invariants and state equation in 8148 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10272 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-01 finished in 301457 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((G((G(F(p1)) U !p1))||p0)))'
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:01:33] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 05:01:33] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 05:01:35] [INFO ] Implicit Places using invariants in 1964 ms returned []
Implicit Place search using SMT only with invariants took 1965 ms to find 0 implicit places.
[2023-03-16 05:01:35] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:01:35] [INFO ] Invariant cache hit.
[2023-03-16 05:01:43] [INFO ] Dead Transitions using invariants and state equation in 8147 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10184 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 251 ms :[(AND (NOT p0) p1), (AND (NOT p0) p1), (NOT p1), p1, p1, (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 3}, { cond=(NOT p0), acceptance={} source=1 dest: 4}], [{ cond=true, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={} source=2 dest: 5}], [{ cond=p1, acceptance={0} source=3 dest: 2}, { cond=p1, acceptance={0} source=3 dest: 3}], [{ cond=p1, acceptance={} source=4 dest: 2}, { cond=p1, acceptance={} source=4 dest: 3}, { cond=true, acceptance={} source=4 dest: 4}], [{ cond=(NOT p1), acceptance={0} source=5 dest: 5}]], initial=0, aps=[p0:(OR (LT s194 1) (LT s315 1)), p1:(AND (GEQ s194 1) (GEQ s315 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 4383 ms.
Product exploration explored 100000 steps with 50000 reset in 4294 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND p0 (NOT p1)), (X p0), (X (NOT (AND (NOT p0) p1))), true, (X (X (NOT p1)))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge :(X p0)
Knowledge based reduction with 5 factoid took 156 ms. Reduced automaton from 6 states, 12 edges and 2 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA RERS17pb113-PT-6-LTLFireability-02 TRUE TECHNIQUES KNOWLEDGE
Treatment of property RERS17pb113-PT-6-LTLFireability-02 finished in 19413 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 194 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:01:52] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:01:52] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 05:01:54] [INFO ] Implicit Places using invariants in 1993 ms returned []
Implicit Place search using SMT only with invariants took 1993 ms to find 0 implicit places.
[2023-03-16 05:01:54] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:01:54] [INFO ] Invariant cache hit.
[2023-03-16 05:02:03] [INFO ] Dead Transitions using invariants and state equation in 8427 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10616 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 50 ms :[(NOT p0)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(OR (LT s511 1) (LT s625 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 3099 ms.
Product exploration explored 100000 steps with 0 reset in 3201 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 125 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 29 ms :[(NOT p0)]
Finished random walk after 924 steps, including 0 resets, run visited all 1 properties in 20 ms. (steps per millisecond=46 )
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 130 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 36 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 38 ms :[(NOT p0)]
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 153 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:02:10] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:02:10] [INFO ] Invariant cache hit.
[2023-03-16 05:02:12] [INFO ] Implicit Places using invariants in 1835 ms returned []
Implicit Place search using SMT only with invariants took 1837 ms to find 0 implicit places.
[2023-03-16 05:02:12] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:02:12] [INFO ] Invariant cache hit.
[2023-03-16 05:02:19] [INFO ] Dead Transitions using invariants and state equation in 7886 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9878 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 143 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 38 ms :[(NOT p0)]
Finished random walk after 1077 steps, including 0 resets, run visited all 1 properties in 17 ms. (steps per millisecond=63 )
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 3 factoid took 147 ms. Reduced automaton from 1 states, 2 edges and 1 AP (stutter insensitive) to 1 states, 2 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 30 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 48 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 29 ms :[(NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3204 ms.
Product exploration explored 100000 steps with 0 reset in 3329 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 155 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:02:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:02:27] [INFO ] Invariant cache hit.
[2023-03-16 05:02:29] [INFO ] Implicit Places using invariants in 2087 ms returned []
Implicit Place search using SMT only with invariants took 2088 ms to find 0 implicit places.
[2023-03-16 05:02:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:02:29] [INFO ] Invariant cache hit.
[2023-03-16 05:02:37] [INFO ] Dead Transitions using invariants and state equation in 8468 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10714 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-03 finished in 46536 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((F(p1)&&p0)))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:02:39] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 05:02:39] [INFO ] Computed 13 place invariants in 54 ms
[2023-03-16 05:02:41] [INFO ] Implicit Places using invariants in 1975 ms returned []
Implicit Place search using SMT only with invariants took 1979 ms to find 0 implicit places.
[2023-03-16 05:02:41] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:02:41] [INFO ] Invariant cache hit.
[2023-03-16 05:02:49] [INFO ] Dead Transitions using invariants and state equation in 7939 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9991 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 152 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), true]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=(NOT p1), acceptance={0} source=0 dest: 0}], [{ cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 0}, { cond=(NOT p0), acceptance={} source=1 dest: 3}], [{ cond=true, acceptance={} source=2 dest: 1}], [{ cond=true, acceptance={0} source=3 dest: 3}]], initial=2, aps=[p1:(AND (GEQ s299 1) (GEQ s625 1)), p0:(AND (GEQ s328 1) (GEQ s374 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 1 ms.
FORMULA RERS17pb113-PT-6-LTLFireability-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-6-LTLFireability-04 finished in 10231 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((X(G(F(X((!X(G(p0)) U p1)))))||p0)))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 167 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:02:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:02:49] [INFO ] Computed 13 place invariants in 50 ms
[2023-03-16 05:02:51] [INFO ] Implicit Places using invariants in 1996 ms returned []
Implicit Place search using SMT only with invariants took 1997 ms to find 0 implicit places.
[2023-03-16 05:02:51] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:02:51] [INFO ] Invariant cache hit.
[2023-03-16 05:02:59] [INFO ] Dead Transitions using invariants and state equation in 8300 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10466 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 85 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-05 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (GEQ s161 1) (GEQ s383 1)), p1:(AND (GEQ s49 1) (GEQ s108 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 3177 ms.
Product exploration explored 100000 steps with 0 reset in 3243 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p1) (NOT p0))), (X (NOT p0)), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 191 ms. Reduced automaton from 2 states, 3 edges and 2 AP (stutter insensitive) to 2 states, 3 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 90 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 340 ms. (steps per millisecond=29 ) properties (out of 2) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:03:07] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:03:07] [INFO ] Invariant cache hit.
[2023-03-16 05:03:07] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:03:20] [INFO ] After 13177ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:03:20] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:03:25] [INFO ] After 4932ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:03:25] [INFO ] After 18286ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:03:25] [INFO ] [Nat]Absence check using 13 positive place invariants in 11 ms returned sat
[2023-03-16 05:03:40] [INFO ] After 14548ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:03:44] [INFO ] After 4395ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:03:45] [INFO ] Deduced a trap composed of 40 places in 494 ms of which 5 ms to minimize.
[2023-03-16 05:03:46] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1301 ms
[2023-03-16 05:03:46] [INFO ] After 6176ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 492 ms.
[2023-03-16 05:03:46] [INFO ] After 21315ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 5 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 177 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 309 ms. (steps per millisecond=32 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25426 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25426 steps, saw 22986 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:03:50] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:03:50] [INFO ] Invariant cache hit.
[2023-03-16 05:03:50] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:04:04] [INFO ] After 13768ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:04:04] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:04:09] [INFO ] After 5190ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:04:09] [INFO ] After 19146ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:04:09] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:04:24] [INFO ] After 14999ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:04:28] [INFO ] After 4373ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:04:29] [INFO ] Deduced a trap composed of 40 places in 477 ms of which 0 ms to minimize.
[2023-03-16 05:04:30] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1280 ms
[2023-03-16 05:04:30] [INFO ] After 6129ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 485 ms.
[2023-03-16 05:04:31] [INFO ] After 21699ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 175 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 177 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 175 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:04:31] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:04:31] [INFO ] Invariant cache hit.
[2023-03-16 05:04:33] [INFO ] Implicit Places using invariants in 1903 ms returned []
Implicit Place search using SMT only with invariants took 1903 ms to find 0 implicit places.
[2023-03-16 05:04:33] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:04:33] [INFO ] Invariant cache hit.
[2023-03-16 05:04:41] [INFO ] Dead Transitions using invariants and state equation in 8444 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10526 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 601 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:04:42] [INFO ] Computed 13 place invariants in 53 ms
[2023-03-16 05:04:42] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:04:57] [INFO ] After 15131ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:04:57] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:05:12] [INFO ] After 15063ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:05:13] [INFO ] After 15691ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 400 ms.
[2023-03-16 05:05:13] [INFO ] After 16186ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p1) (NOT p0))), (X (NOT p0)), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT p0)))]
False Knowledge obtained : [(F (NOT (AND (NOT p1) (NOT p0))))]
Knowledge based reduction with 5 factoid took 234 ms. Reduced automaton from 2 states, 3 edges and 2 AP (stutter insensitive) to 2 states, 3 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 77 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 62 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 05:05:14] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:05:14] [INFO ] Computed 13 place invariants in 53 ms
Could not prove EG (AND (NOT p0) (NOT p1))
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 193 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:05:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:05:29] [INFO ] Invariant cache hit.
[2023-03-16 05:05:31] [INFO ] Implicit Places using invariants in 1901 ms returned []
Implicit Place search using SMT only with invariants took 1902 ms to find 0 implicit places.
[2023-03-16 05:05:31] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:05:31] [INFO ] Invariant cache hit.
[2023-03-16 05:05:39] [INFO ] Dead Transitions using invariants and state equation in 8029 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10124 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p1) (NOT p0))), (X (NOT p0)), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 196 ms. Reduced automaton from 2 states, 3 edges and 2 AP (stutter insensitive) to 2 states, 3 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 63 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 333 ms. (steps per millisecond=30 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 24720 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24720 steps, saw 22362 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-16 05:05:43] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:05:43] [INFO ] Invariant cache hit.
[2023-03-16 05:05:43] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:06:01] [INFO ] After 17365ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-16 05:06:01] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:06:08] [INFO ] After 7472ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:06:08] [INFO ] After 25038ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:06:08] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:06:24] [INFO ] After 16189ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-16 05:06:30] [INFO ] After 5549ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-16 05:06:31] [INFO ] Deduced a trap composed of 40 places in 482 ms of which 0 ms to minimize.
[2023-03-16 05:06:32] [INFO ] Deduced a trap composed of 40 places in 342 ms of which 1 ms to minimize.
[2023-03-16 05:06:32] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1962 ms
[2023-03-16 05:06:36] [INFO ] Deduced a trap composed of 64 places in 2479 ms of which 0 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:06:36] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:06:36] [INFO ] After 27512ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 7 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 177 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 338 ms. (steps per millisecond=29 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 25048 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25048 steps, saw 22651 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-16 05:06:39] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:06:39] [INFO ] Invariant cache hit.
[2023-03-16 05:06:39] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 05:06:57] [INFO ] After 17150ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:1
[2023-03-16 05:06:57] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:07:04] [INFO ] After 7689ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:07:04] [INFO ] After 25039ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:07:04] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:07:20] [INFO ] After 15179ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-16 05:07:25] [INFO ] After 5253ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-16 05:07:26] [INFO ] Deduced a trap composed of 40 places in 454 ms of which 0 ms to minimize.
[2023-03-16 05:07:26] [INFO ] Deduced a trap composed of 40 places in 329 ms of which 0 ms to minimize.
[2023-03-16 05:07:27] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 1879 ms
[2023-03-16 05:07:29] [INFO ] After 9001ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 748 ms.
[2023-03-16 05:07:29] [INFO ] After 25032ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 17 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 175 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 176 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 175 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:07:30] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:07:30] [INFO ] Invariant cache hit.
[2023-03-16 05:07:32] [INFO ] Implicit Places using invariants in 1924 ms returned []
Implicit Place search using SMT only with invariants took 1924 ms to find 0 implicit places.
[2023-03-16 05:07:32] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:07:32] [INFO ] Invariant cache hit.
[2023-03-16 05:07:40] [INFO ] Dead Transitions using invariants and state equation in 7904 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10007 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p1) (NOT p0))), (X (NOT p0)), (X (X (AND (NOT p1) (NOT p0)))), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 202 ms. Reduced automaton from 2 states, 3 edges and 2 AP (stutter insensitive) to 2 states, 3 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 62 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 76 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
[2023-03-16 05:07:40] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:07:40] [INFO ] Invariant cache hit.
Could not prove EG (AND (NOT p0) (NOT p1))
Stuttering acceptance computed with spot in 67 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 0 reset in 3218 ms.
Product exploration explored 100000 steps with 0 reset in 3326 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 157 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:08:02] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:08:02] [INFO ] Invariant cache hit.
[2023-03-16 05:08:04] [INFO ] Implicit Places using invariants in 1917 ms returned []
Implicit Place search using SMT only with invariants took 1917 ms to find 0 implicit places.
[2023-03-16 05:08:04] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:08:04] [INFO ] Invariant cache hit.
[2023-03-16 05:08:12] [INFO ] Dead Transitions using invariants and state equation in 8057 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10133 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-05 finished in 324128 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((X(G(p0))&&F(p1)&&G(p2))))'
Support contains 8 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:08:13] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 05:08:13] [INFO ] Computed 13 place invariants in 54 ms
[2023-03-16 05:08:15] [INFO ] Implicit Places using invariants in 1954 ms returned []
Implicit Place search using SMT only with invariants took 1957 ms to find 0 implicit places.
[2023-03-16 05:08:15] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:08:15] [INFO ] Invariant cache hit.
[2023-03-16 05:08:24] [INFO ] Dead Transitions using invariants and state equation in 8655 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10685 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 213 ms :[(OR (NOT p0) (NOT p2)), (OR (NOT p2) (NOT p0) (NOT p1)), (OR (NOT p2) (NOT p0) (NOT p1)), true, (OR (NOT p2) (NOT p0) (NOT p1))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-06 automaton TGBA Formula[mat=[[{ cond=(AND p2 p0), acceptance={} source=0 dest: 0}, { cond=(OR (NOT p2) (NOT p0)), acceptance={} source=0 dest: 3}], [{ cond=(AND p1 p2), acceptance={} source=1 dest: 0}, { cond=(AND (NOT p1) p2), acceptance={} source=1 dest: 2}, { cond=(NOT p2), acceptance={} source=1 dest: 3}], [{ cond=(AND p1 p2 p0), acceptance={0} source=2 dest: 0}, { cond=(AND (NOT p1) p2 p0), acceptance={0} source=2 dest: 2}, { cond=(OR (NOT p2) (NOT p0)), acceptance={0} source=2 dest: 3}], [{ cond=true, acceptance={0} source=3 dest: 3}], [{ cond=true, acceptance={} source=4 dest: 1}]], initial=4, aps=[p2:(OR (LT s0 1) (LT s118 1)), p0:(OR (LT s152 1) (LT s475 1)), p1:(OR (AND (GEQ s295 1) (GEQ s573 1)) (AND (GEQ s345 1) (GEQ s538 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 8871 steps with 0 reset in 286 ms.
FORMULA RERS17pb113-PT-6-LTLFireability-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-6-LTLFireability-06 finished in 11267 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((X(G(p1))&&p0)))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 169 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:08:24] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:08:24] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 05:08:27] [INFO ] Implicit Places using invariants in 2655 ms returned []
Implicit Place search using SMT only with invariants took 2656 ms to find 0 implicit places.
[2023-03-16 05:08:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:08:27] [INFO ] Invariant cache hit.
[2023-03-16 05:08:35] [INFO ] Dead Transitions using invariants and state equation in 8313 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 11143 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 90 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-07 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}, { cond=p0, acceptance={0} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (GEQ s68 1) (GEQ s121 1)), p1:(AND (GEQ s211 1) (GEQ s224 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 3601 ms.
Product exploration explored 100000 steps with 0 reset in 3306 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT p1)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 352 ms. Reduced automaton from 2 states, 5 edges and 2 AP (stutter insensitive) to 2 states, 5 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 70 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 375 ms. (steps per millisecond=26 ) properties (out of 4) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-16 05:08:43] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:08:43] [INFO ] Invariant cache hit.
[2023-03-16 05:08:44] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:09:01] [INFO ] After 17664ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-16 05:09:01] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:09:19] [INFO ] After 17766ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-16 05:09:19] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:09:25] [INFO ] After 5978ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-16 05:09:26] [INFO ] Deduced a trap composed of 40 places in 538 ms of which 1 ms to minimize.
[2023-03-16 05:09:28] [INFO ] Deduced a trap composed of 64 places in 2374 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:09:28] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:09:29] [INFO ] After 27412ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:2
Parikh walk visited 0 properties in 8 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 169 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 170 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 387 ms. (steps per millisecond=25 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 24189 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24189 steps, saw 21883 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-16 05:09:32] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:09:32] [INFO ] Invariant cache hit.
[2023-03-16 05:09:32] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:09:50] [INFO ] After 17565ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-16 05:09:50] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:10:08] [INFO ] After 17775ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-16 05:10:08] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:10:14] [INFO ] After 5750ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-16 05:10:15] [INFO ] Deduced a trap composed of 40 places in 534 ms of which 0 ms to minimize.
[2023-03-16 05:10:15] [INFO ] Deduced a trap composed of 64 places in 455 ms of which 0 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:10:15] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:10:15] [INFO ] After 25549ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:2
Parikh walk visited 0 properties in 8 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 176 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 179 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:10:16] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:16] [INFO ] Invariant cache hit.
[2023-03-16 05:10:18] [INFO ] Implicit Places using invariants in 1855 ms returned []
Implicit Place search using SMT only with invariants took 1856 ms to find 0 implicit places.
[2023-03-16 05:10:18] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:18] [INFO ] Invariant cache hit.
[2023-03-16 05:10:26] [INFO ] Dead Transitions using invariants and state equation in 8291 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10340 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT p1)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT p1)))]
False Knowledge obtained : [(F p1), (F (NOT (AND (NOT p0) (NOT p1))))]
Knowledge based reduction with 9 factoid took 426 ms. Reduced automaton from 2 states, 5 edges and 2 AP (stutter insensitive) to 2 states, 5 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 84 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Stuttering acceptance computed with spot in 80 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
[2023-03-16 05:10:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:27] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
[2023-03-16 05:10:42] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:42] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 160 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:10:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:57] [INFO ] Invariant cache hit.
[2023-03-16 05:10:59] [INFO ] Implicit Places using invariants in 1928 ms returned []
Implicit Place search using SMT only with invariants took 1929 ms to find 0 implicit places.
[2023-03-16 05:10:59] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:10:59] [INFO ] Invariant cache hit.
[2023-03-16 05:11:07] [INFO ] Dead Transitions using invariants and state equation in 8084 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10174 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT p1)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 345 ms. Reduced automaton from 2 states, 5 edges and 2 AP (stutter insensitive) to 2 states, 5 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 70 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 444 ms. (steps per millisecond=22 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 24005 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 24005 steps, saw 21717 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:11:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:11:11] [INFO ] Invariant cache hit.
[2023-03-16 05:11:11] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:11:28] [INFO ] After 17212ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:11:28] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:11:48] [INFO ] After 19312ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:11:48] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:11:53] [INFO ] After 5490ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 05:11:53] [INFO ] After 5493ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-16 05:11:53] [INFO ] After 25031ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 19 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 174 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 175 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 458 ms. (steps per millisecond=21 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 25163 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25163 steps, saw 22750 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:11:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:11:57] [INFO ] Invariant cache hit.
[2023-03-16 05:11:57] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:12:14] [INFO ] After 16828ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:12:14] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:12:33] [INFO ] After 19213ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:12:34] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:12:39] [INFO ] After 5596ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 05:12:39] [INFO ] After 5597ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-16 05:12:39] [INFO ] After 25038ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 19 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 155 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 156 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 156 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:12:39] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:12:39] [INFO ] Invariant cache hit.
[2023-03-16 05:12:41] [INFO ] Implicit Places using invariants in 1856 ms returned []
Implicit Place search using SMT only with invariants took 1857 ms to find 0 implicit places.
[2023-03-16 05:12:41] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:12:41] [INFO ] Invariant cache hit.
[2023-03-16 05:12:49] [INFO ] Dead Transitions using invariants and state equation in 7934 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 9950 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT p0)), (X (NOT p1)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT p1)))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 341 ms. Reduced automaton from 2 states, 5 edges and 2 AP (stutter insensitive) to 2 states, 5 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 63 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Stuttering acceptance computed with spot in 74 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
[2023-03-16 05:12:50] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:12:50] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
[2023-03-16 05:13:05] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:05] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 83 ms :[(OR (NOT p0) (NOT p1)), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 3203 ms.
Product exploration explored 100000 steps with 0 reset in 3326 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 157 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:13:27] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:27] [INFO ] Invariant cache hit.
[2023-03-16 05:13:29] [INFO ] Implicit Places using invariants in 2108 ms returned []
Implicit Place search using SMT only with invariants took 2109 ms to find 0 implicit places.
[2023-03-16 05:13:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:29] [INFO ] Invariant cache hit.
[2023-03-16 05:13:37] [INFO ] Dead Transitions using invariants and state equation in 8175 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10443 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-07 finished in 313877 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G((p0||F(p1)))||F((G(p2)||G(p3)))))'
Support contains 8 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 164 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:13:38] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:38] [INFO ] Invariant cache hit.
[2023-03-16 05:13:40] [INFO ] Implicit Places using invariants in 1916 ms returned []
Implicit Place search using SMT only with invariants took 1916 ms to find 0 implicit places.
[2023-03-16 05:13:40] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:40] [INFO ] Invariant cache hit.
[2023-03-16 05:13:48] [INFO ] Dead Transitions using invariants and state equation in 8122 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10204 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 95 ms :[(AND (NOT p0) (NOT p1) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=0 dest: 1}], [{ cond=(AND p2 (NOT p1) p3), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p2) (NOT p1) p3), acceptance={0} source=1 dest: 1}, { cond=(AND p2 (NOT p1) (NOT p3)), acceptance={1} source=1 dest: 1}, { cond=(AND (NOT p2) (NOT p1) (NOT p3)), acceptance={0, 1} source=1 dest: 1}]], initial=0, aps=[p0:(AND (GEQ s79 1) (GEQ s354 1)), p1:(OR (LT s248 1) (LT s474 1)), p2:(OR (LT s33 1) (LT s297 1)), p3:(OR (LT s224 1) (LT s561 1))], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 6 reset in 4470 ms.
Product exploration explored 100000 steps with 7 reset in 4403 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p1 p2 p3), (X (NOT (AND (NOT p2) (NOT p1) p3))), (X (NOT (AND p2 (NOT p1) p3))), (X (NOT (AND p2 (NOT p1) (NOT p3)))), (X (NOT (AND (NOT p2) (NOT p1) (NOT p3)))), (X (X (NOT (AND (NOT p2) (NOT p1) p3)))), (X (X (NOT (AND p2 (NOT p1) p3)))), (X (X (NOT (AND p2 (NOT p1) (NOT p3))))), (X (X (NOT (AND (NOT p2) (NOT p1) (NOT p3)))))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 393 ms. Reduced automaton from 2 states, 6 edges and 4 AP (stutter insensitive) to 2 states, 6 edges and 4 AP (stutter insensitive).
Stuttering acceptance computed with spot in 86 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 348 ms. (steps per millisecond=28 ) properties (out of 5) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-16 05:13:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:13:58] [INFO ] Invariant cache hit.
[2023-03-16 05:13:59] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 05:14:15] [INFO ] After 16960ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-16 05:14:16] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:14:31] [INFO ] After 15738ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-16 05:14:31] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:14:39] [INFO ] After 7408ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 05:14:40] [INFO ] Deduced a trap composed of 24 places in 272 ms of which 0 ms to minimize.
[2023-03-16 05:14:40] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1073 ms
[2023-03-16 05:14:40] [INFO ] After 9078ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-03-16 05:14:40] [INFO ] After 25032ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Parikh walk visited 0 properties in 13 ms.
Support contains 6 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 171 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 172 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 320 ms. (steps per millisecond=31 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 24858 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24858 steps, saw 22487 distinct states, run finished after 3004 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 3 properties.
[2023-03-16 05:14:44] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:14:44] [INFO ] Invariant cache hit.
[2023-03-16 05:14:44] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:14:58] [INFO ] After 14227ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-16 05:14:58] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:15:14] [INFO ] After 15528ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-16 05:15:14] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:15:21] [INFO ] After 7319ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-16 05:15:22] [INFO ] Deduced a trap composed of 24 places in 277 ms of which 1 ms to minimize.
[2023-03-16 05:15:23] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1052 ms
[2023-03-16 05:15:24] [INFO ] Deduced a trap composed of 40 places in 345 ms of which 0 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:15:24] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:15:24] [INFO ] After 25388ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:3
Parikh walk visited 0 properties in 13 ms.
Support contains 6 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 161 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 162 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:15:24] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:15:24] [INFO ] Invariant cache hit.
[2023-03-16 05:15:26] [INFO ] Implicit Places using invariants in 1873 ms returned []
Implicit Place search using SMT only with invariants took 1873 ms to find 0 implicit places.
[2023-03-16 05:15:26] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:15:26] [INFO ] Invariant cache hit.
[2023-03-16 05:15:34] [INFO ] Dead Transitions using invariants and state equation in 8150 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10190 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 529 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 3 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:15:35] [INFO ] Computed 13 place invariants in 51 ms
[2023-03-16 05:15:35] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:15:52] [INFO ] After 16752ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-16 05:15:52] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:16:11] [INFO ] After 19743ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-16 05:16:14] [INFO ] After 22658ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 2093 ms.
[2023-03-16 05:16:16] [INFO ] After 24875ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Knowledge obtained : [(AND (NOT p0) p1 p2 p3), (X (NOT (AND (NOT p2) (NOT p1) p3))), (X (NOT (AND p2 (NOT p1) p3))), (X (NOT (AND p2 (NOT p1) (NOT p3)))), (X (NOT (AND (NOT p2) (NOT p1) (NOT p3)))), (X (X (NOT (AND (NOT p2) (NOT p1) p3)))), (X (X (NOT (AND p2 (NOT p1) p3)))), (X (X (NOT (AND p2 (NOT p1) (NOT p3))))), (X (X (NOT (AND (NOT p2) (NOT p1) (NOT p3)))))]
False Knowledge obtained : [(F (AND (NOT p1) (NOT p0))), (F (AND (NOT p1) p2 p3))]
Knowledge based reduction with 9 factoid took 449 ms. Reduced automaton from 2 states, 6 edges and 4 AP (stutter insensitive) to 2 states, 6 edges and 4 AP (stutter insensitive).
Stuttering acceptance computed with spot in 84 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 80 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Support contains 8 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 152 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:16:17] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:16:17] [INFO ] Computed 13 place invariants in 49 ms
[2023-03-16 05:16:19] [INFO ] Implicit Places using invariants in 1872 ms returned []
Implicit Place search using SMT only with invariants took 1878 ms to find 0 implicit places.
[2023-03-16 05:16:19] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:16:19] [INFO ] Invariant cache hit.
[2023-03-16 05:16:27] [INFO ] Dead Transitions using invariants and state equation in 8133 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10167 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 (NOT p0) p2 p3), (X (NOT (AND (NOT p1) p2 (NOT p3)))), (X (NOT (AND (NOT p1) (NOT p2) (NOT p3)))), (X (NOT (AND (NOT p1) (NOT p2) p3))), (X (NOT (AND (NOT p1) p2 p3))), (X (X (NOT (AND (NOT p1) p2 (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p3)))), (X (X (NOT (AND (NOT p1) p2 p3))))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 409 ms. Reduced automaton from 2 states, 6 edges and 4 AP (stutter insensitive) to 2 states, 6 edges and 4 AP (stutter insensitive).
Stuttering acceptance computed with spot in 68 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 389 ms. (steps per millisecond=25 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Interrupted probabilistic random walk after 24353 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24353 steps, saw 22031 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 5 properties.
[2023-03-16 05:16:32] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:16:32] [INFO ] Invariant cache hit.
[2023-03-16 05:16:32] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:16:47] [INFO ] After 15553ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 05:16:47] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:17:04] [INFO ] After 16342ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 05:17:04] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:17:12] [INFO ] After 8321ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-03-16 05:17:12] [INFO ] After 8441ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 6 ms.
[2023-03-16 05:17:12] [INFO ] After 25028ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 22 ms.
Support contains 8 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 154 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 155 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 349 ms. (steps per millisecond=28 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Interrupted probabilistic random walk after 22941 steps, run timeout after 3002 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 22941 steps, saw 20770 distinct states, run finished after 3002 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 5 properties.
[2023-03-16 05:17:16] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:17:16] [INFO ] Invariant cache hit.
[2023-03-16 05:17:16] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:17:31] [INFO ] After 14832ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 05:17:31] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:17:48] [INFO ] After 16682ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 05:17:48] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:17:56] [INFO ] After 8111ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 05:17:56] [INFO ] After 8112ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-03-16 05:17:56] [INFO ] After 25036ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Parikh walk visited 0 properties in 23 ms.
Support contains 8 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 187 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 187 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 175 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:17:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:17:56] [INFO ] Invariant cache hit.
[2023-03-16 05:17:58] [INFO ] Implicit Places using invariants in 1850 ms returned []
Implicit Place search using SMT only with invariants took 1850 ms to find 0 implicit places.
[2023-03-16 05:17:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:17:58] [INFO ] Invariant cache hit.
[2023-03-16 05:18:06] [INFO ] Dead Transitions using invariants and state equation in 8094 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10122 ms. Remains : 626/626 places, 31352/31352 transitions.
Ensure Unique test removed 13027 transitions
Reduce isomorphic transitions removed 13027 transitions.
Iterating post reduction 0 with 13027 rules applied. Total rules applied 13027 place count 626 transition count 18325
Applied a total of 13027 rules in 511 ms. Remains 626 /626 variables (removed 0) and now considering 18325/31352 (removed 13027) transitions.
Running SMT prover for 5 properties.
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:18:07] [INFO ] Computed 13 place invariants in 50 ms
[2023-03-16 05:18:07] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:18:25] [INFO ] After 17760ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-16 05:18:25] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:18:45] [INFO ] After 19990ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-16 05:18:48] [INFO ] After 23546ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 2440 ms.
[2023-03-16 05:18:51] [INFO ] After 26154ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Knowledge obtained : [(AND p1 (NOT p0) p2 p3), (X (NOT (AND (NOT p1) p2 (NOT p3)))), (X (NOT (AND (NOT p1) (NOT p2) (NOT p3)))), (X (NOT (AND (NOT p1) (NOT p2) p3))), (X (NOT (AND (NOT p1) p2 p3))), (X (X (NOT (AND (NOT p1) p2 (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) (NOT p3))))), (X (X (NOT (AND (NOT p1) (NOT p2) p3)))), (X (X (NOT (AND (NOT p1) p2 p3))))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 354 ms. Reduced automaton from 2 states, 6 edges and 4 AP (stutter insensitive) to 2 states, 6 edges and 4 AP (stutter insensitive).
Stuttering acceptance computed with spot in 83 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 73 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Stuttering acceptance computed with spot in 82 ms :[(AND (NOT p1) (NOT p0) (NOT p2) (NOT p3)), (AND (NOT p1) (NOT p2) (NOT p3))]
Product exploration explored 100000 steps with 4 reset in 3041 ms.
Product exploration explored 100000 steps with 5 reset in 3162 ms.
Support contains 8 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 154 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:18:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:18:58] [INFO ] Computed 13 place invariants in 50 ms
[2023-03-16 05:19:00] [INFO ] Implicit Places using invariants in 1892 ms returned []
Implicit Place search using SMT only with invariants took 1892 ms to find 0 implicit places.
[2023-03-16 05:19:00] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:19:00] [INFO ] Invariant cache hit.
[2023-03-16 05:19:08] [INFO ] Dead Transitions using invariants and state equation in 7878 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9925 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-08 finished in 330628 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F((X(p1)&&p0))||X(G(p1))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:19:09] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 05:19:09] [INFO ] Computed 13 place invariants in 47 ms
[2023-03-16 05:19:11] [INFO ] Implicit Places using invariants in 1814 ms returned []
Implicit Place search using SMT only with invariants took 1814 ms to find 0 implicit places.
[2023-03-16 05:19:11] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:19:11] [INFO ] Invariant cache hit.
[2023-03-16 05:19:18] [INFO ] Dead Transitions using invariants and state equation in 7869 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9755 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 146 ms :[(OR (NOT p0) (NOT p1)), (NOT p1), (NOT p1), (NOT p1)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-09 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}, { cond=p0, acceptance={0} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={0} source=1 dest: 1}], [{ cond=p0, acceptance={} source=2 dest: 1}, { cond=(NOT p0), acceptance={} source=2 dest: 3}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=3 dest: 0}, { cond=p0, acceptance={} source=3 dest: 1}, { cond=(AND (NOT p0) p1), acceptance={} source=3 dest: 3}]], initial=2, aps=[p0:(AND (GEQ s20 1) (GEQ s505 1)), p1:(AND (GEQ s92 1) (GEQ s455 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3100 ms.
Product exploration explored 100000 steps with 0 reset in 3092 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT (AND (NOT p0) p1))), (X (NOT p0)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT (AND (NOT p0) p1))))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 444 ms. Reduced automaton from 4 states, 9 edges and 2 AP (stutter sensitive) to 4 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 150 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
Finished random walk after 6382 steps, including 1 resets, run visited all 3 properties in 182 ms. (steps per millisecond=35 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (AND (NOT p0) (NOT p1))), (X (NOT (AND p0 (NOT p1)))), (X (NOT (AND (NOT p0) p1))), (X (NOT p0)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (X (X (NOT p0))), (X (X (NOT (AND (NOT p0) p1))))]
False Knowledge obtained : [(F (AND p0 (NOT p1))), (F p0), (F (NOT (AND (NOT p0) (NOT p1))))]
Knowledge based reduction with 9 factoid took 430 ms. Reduced automaton from 4 states, 6 edges and 2 AP (stutter sensitive) to 4 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 157 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
Stuttering acceptance computed with spot in 161 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p1) (NOT p0))]
[2023-03-16 05:19:27] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:19:27] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
[2023-03-16 05:19:42] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:19:42] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 69 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:19:57] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:19:57] [INFO ] Invariant cache hit.
[2023-03-16 05:19:59] [INFO ] Implicit Places using invariants in 1848 ms returned []
Implicit Place search using SMT only with invariants took 1848 ms to find 0 implicit places.
[2023-03-16 05:19:59] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:19:59] [INFO ] Invariant cache hit.
[2023-03-16 05:20:07] [INFO ] Dead Transitions using invariants and state equation in 7855 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9772 ms. Remains : 627/627 places, 31353/31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 2 factoid took 90 ms. Reduced automaton from 4 states, 6 edges and 2 AP (stutter sensitive) to 4 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 135 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Finished random walk after 5955 steps, including 1 resets, run visited all 3 properties in 190 ms. (steps per millisecond=31 )
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (X (NOT p0)))]
False Knowledge obtained : [(F (AND (NOT p1) p0)), (F p0), (F (NOT (AND (NOT p1) (NOT p0))))]
Knowledge based reduction with 2 factoid took 168 ms. Reduced automaton from 4 states, 6 edges and 2 AP (stutter sensitive) to 4 states, 6 edges and 2 AP (stutter sensitive).
Stuttering acceptance computed with spot in 160 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Stuttering acceptance computed with spot in 147 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
[2023-03-16 05:20:08] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:08] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
[2023-03-16 05:20:23] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:23] [INFO ] Invariant cache hit.
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 169 ms :[(NOT p1), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 0 reset in 3293 ms.
Product exploration explored 100000 steps with 0 reset in 3394 ms.
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 72 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:20:45] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:45] [INFO ] Invariant cache hit.
[2023-03-16 05:20:47] [INFO ] Implicit Places using invariants in 1820 ms returned []
Implicit Place search using SMT only with invariants took 1822 ms to find 0 implicit places.
[2023-03-16 05:20:47] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:47] [INFO ] Invariant cache hit.
[2023-03-16 05:20:55] [INFO ] Dead Transitions using invariants and state equation in 8205 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10100 ms. Remains : 627/627 places, 31353/31353 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-09 finished in 107723 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0||G(p1))))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 73 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:20:56] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:56] [INFO ] Invariant cache hit.
[2023-03-16 05:20:58] [INFO ] Implicit Places using invariants in 1882 ms returned []
Implicit Place search using SMT only with invariants took 1882 ms to find 0 implicit places.
[2023-03-16 05:20:58] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:20:58] [INFO ] Invariant cache hit.
[2023-03-16 05:21:07] [INFO ] Dead Transitions using invariants and state equation in 8208 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10169 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 123 ms :[true, (AND (NOT p1) (NOT p0)), (NOT p1), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 3}], [{ cond=(NOT p1), acceptance={} source=2 dest: 0}, { cond=p1, acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=3 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={} source=3 dest: 2}]], initial=1, aps=[p1:(OR (AND (OR (LT s149 1) (LT s524 1)) (OR (LT s39 1) (LT s94 1))) (LT s39 1) (LT s94 1)), p0:(AND (GEQ s149 1) (GEQ s524 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 57361 steps with 0 reset in 1892 ms.
FORMULA RERS17pb113-PT-6-LTLFireability-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-6-LTLFireability-10 finished in 12261 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(p0))'
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 166 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:21:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:21:09] [INFO ] Computed 13 place invariants in 46 ms
[2023-03-16 05:21:11] [INFO ] Implicit Places using invariants in 1810 ms returned []
Implicit Place search using SMT only with invariants took 1810 ms to find 0 implicit places.
[2023-03-16 05:21:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:21:11] [INFO ] Invariant cache hit.
[2023-03-16 05:21:19] [INFO ] Dead Transitions using invariants and state equation in 8156 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10134 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 43 ms :[true, (NOT p0)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-11 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}]], initial=1, aps=[p0:(OR (LT s525 1) (LT s573 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 3145 ms.
Product exploration explored 100000 steps with 0 reset in 3293 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 151 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 57 ms :[true, (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 300 ms. (steps per millisecond=33 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25270 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25270 steps, saw 22845 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:21:29] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:21:29] [INFO ] Invariant cache hit.
[2023-03-16 05:21:29] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:21:48] [INFO ] After 18539ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:21:48] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:22:07] [INFO ] After 19167ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:22:07] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:22:13] [INFO ] After 5683ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 05:22:13] [INFO ] After 25027ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 9 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 154 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 155 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 354 ms. (steps per millisecond=28 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 24821 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24821 steps, saw 22454 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:22:16] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:22:16] [INFO ] Invariant cache hit.
[2023-03-16 05:22:16] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:22:35] [INFO ] After 18708ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:22:35] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:22:54] [INFO ] After 19089ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:22:54] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:23:00] [INFO ] After 5756ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 05:23:00] [INFO ] After 25029ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 8 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 167 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 167 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 165 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:23:00] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:23:00] [INFO ] Invariant cache hit.
[2023-03-16 05:23:02] [INFO ] Implicit Places using invariants in 1853 ms returned []
Implicit Place search using SMT only with invariants took 1857 ms to find 0 implicit places.
[2023-03-16 05:23:02] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:23:02] [INFO ] Invariant cache hit.
[2023-03-16 05:23:10] [INFO ] Dead Transitions using invariants and state equation in 7990 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10016 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 161 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 47 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 40 ms :[true, (NOT p0)]
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 152 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:23:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:23:11] [INFO ] Invariant cache hit.
[2023-03-16 05:23:12] [INFO ] Implicit Places using invariants in 1821 ms returned []
Implicit Place search using SMT only with invariants took 1821 ms to find 0 implicit places.
[2023-03-16 05:23:12] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:23:12] [INFO ] Invariant cache hit.
[2023-03-16 05:23:20] [INFO ] Dead Transitions using invariants and state equation in 8039 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10013 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 125 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 39 ms :[true, (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 315 ms. (steps per millisecond=31 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25289 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25289 steps, saw 22862 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:23:24] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:23:24] [INFO ] Invariant cache hit.
[2023-03-16 05:23:24] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:23:42] [INFO ] After 18159ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:23:42] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:24:01] [INFO ] After 18933ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:24:01] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:24:07] [INFO ] After 5906ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 05:24:07] [INFO ] After 25027ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 172 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 172 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 291 ms. (steps per millisecond=34 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25170 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25170 steps, saw 22756 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:24:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:24:11] [INFO ] Invariant cache hit.
[2023-03-16 05:24:11] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:24:29] [INFO ] After 18509ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:24:30] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:24:48] [INFO ] After 18771ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:24:48] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:24:54] [INFO ] After 6085ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 05:24:54] [INFO ] After 25033ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 6 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 169 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 169 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 156 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:24:55] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:24:55] [INFO ] Invariant cache hit.
[2023-03-16 05:24:57] [INFO ] Implicit Places using invariants in 1879 ms returned []
Implicit Place search using SMT only with invariants took 1880 ms to find 0 implicit places.
[2023-03-16 05:24:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:24:57] [INFO ] Invariant cache hit.
[2023-03-16 05:25:05] [INFO ] Dead Transitions using invariants and state equation in 8436 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10476 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 149 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 46 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 50 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 50 ms :[true, (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3224 ms.
Entered a terminal (fully accepting) state of product in 13407 steps with 0 reset in 422 ms.
FORMULA RERS17pb113-PT-6-LTLFireability-11 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-6-LTLFireability-11 finished in 240536 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((F(p1)&&X(p2)&&p0)))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 71 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 05:25:09] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 05:25:09] [INFO ] Computed 13 place invariants in 49 ms
[2023-03-16 05:25:11] [INFO ] Implicit Places using invariants in 1946 ms returned []
Implicit Place search using SMT only with invariants took 1946 ms to find 0 implicit places.
[2023-03-16 05:25:11] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 05:25:11] [INFO ] Invariant cache hit.
[2023-03-16 05:25:19] [INFO ] Dead Transitions using invariants and state equation in 8279 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10299 ms. Remains : 627/627 places, 31353/31353 transitions.
Stuttering acceptance computed with spot in 166 ms :[(OR (NOT p0) (NOT p1) (NOT p2)), (OR (NOT p0) (NOT p1) (NOT p2)), true, (NOT p1), (NOT p2)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-12 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={} source=1 dest: 2}, { cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 3}, { cond=p0, acceptance={} source=1 dest: 4}], [{ cond=true, acceptance={} source=2 dest: 2}], [{ cond=(NOT p1), acceptance={} source=3 dest: 3}], [{ cond=(NOT p2), acceptance={} source=4 dest: 2}]], initial=0, aps=[p0:(AND (GEQ s290 1) (GEQ s315 1)), p1:(AND (GEQ s432 1) (GEQ s615 1)), p2:(AND (GEQ s290 1) (GEQ s315 1))], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 1 ms.
FORMULA RERS17pb113-PT-6-LTLFireability-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb113-PT-6-LTLFireability-12 finished in 10559 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 166 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:25:20] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
// Phase 1: matrix 18325 rows 626 cols
[2023-03-16 05:25:20] [INFO ] Computed 13 place invariants in 52 ms
[2023-03-16 05:25:22] [INFO ] Implicit Places using invariants in 1913 ms returned []
Implicit Place search using SMT only with invariants took 1914 ms to find 0 implicit places.
[2023-03-16 05:25:22] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:25:22] [INFO ] Invariant cache hit.
[2023-03-16 05:25:30] [INFO ] Dead Transitions using invariants and state equation in 8167 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10249 ms. Remains : 626/627 places, 31352/31353 transitions.
Stuttering acceptance computed with spot in 38 ms :[(NOT p0)]
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-13 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(OR (AND (GEQ s374 1) (GEQ s561 1)) (AND (GEQ s32 1) (GEQ s258 1) (GEQ s374 1) (GEQ s561 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 3204 ms.
Product exploration explored 100000 steps with 0 reset in 3315 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 125 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 42 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 300 ms. (steps per millisecond=33 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25270 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25270 steps, saw 22845 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:25:40] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:25:40] [INFO ] Invariant cache hit.
[2023-03-16 05:25:40] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:25:58] [INFO ] After 17302ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:25:58] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:26:16] [INFO ] After 18022ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:26:16] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:26:20] [INFO ] After 4167ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:26:21] [INFO ] Deduced a trap composed of 24 places in 364 ms of which 0 ms to minimize.
[2023-03-16 05:26:22] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1168 ms
[2023-03-16 05:26:22] [INFO ] After 6343ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 486 ms.
[2023-03-16 05:26:23] [INFO ] After 25022ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 9 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 153 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 153 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 355 ms. (steps per millisecond=28 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 24897 steps, run timeout after 3002 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 24897 steps, saw 22522 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:26:26] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:26:26] [INFO ] Invariant cache hit.
[2023-03-16 05:26:26] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:26:44] [INFO ] After 17873ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:26:44] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:27:02] [INFO ] After 17947ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:27:02] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:27:06] [INFO ] After 4038ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:27:08] [INFO ] Deduced a trap composed of 24 places in 361 ms of which 1 ms to minimize.
[2023-03-16 05:27:08] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1149 ms
[2023-03-16 05:27:08] [INFO ] After 6173ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 732 ms.
[2023-03-16 05:27:09] [INFO ] After 25034ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 0 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 171 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 171 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 168 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:27:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:09] [INFO ] Invariant cache hit.
[2023-03-16 05:27:11] [INFO ] Implicit Places using invariants in 1819 ms returned []
Implicit Place search using SMT only with invariants took 1819 ms to find 0 implicit places.
[2023-03-16 05:27:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:11] [INFO ] Invariant cache hit.
[2023-03-16 05:27:19] [INFO ] Dead Transitions using invariants and state equation in 8012 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10004 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 112 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 43 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 29 ms :[(NOT p0)]
[2023-03-16 05:27:20] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:20] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 158 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:27:35] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:35] [INFO ] Invariant cache hit.
[2023-03-16 05:27:37] [INFO ] Implicit Places using invariants in 1938 ms returned []
Implicit Place search using SMT only with invariants took 1939 ms to find 0 implicit places.
[2023-03-16 05:27:37] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:37] [INFO ] Invariant cache hit.
[2023-03-16 05:27:45] [INFO ] Dead Transitions using invariants and state equation in 8367 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10465 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 141 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 37 ms :[(NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 286 ms. (steps per millisecond=34 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25015 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25015 steps, saw 22623 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:27:49] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:27:49] [INFO ] Invariant cache hit.
[2023-03-16 05:27:49] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:28:08] [INFO ] After 19260ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:28:08] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:28:27] [INFO ] After 18300ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:28:27] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:28:31] [INFO ] After 4213ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:28:32] [INFO ] Deduced a trap composed of 24 places in 370 ms of which 0 ms to minimize.
[2023-03-16 05:28:33] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1194 ms
[2023-03-16 05:28:33] [INFO ] After 6457ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 98 ms.
[2023-03-16 05:28:33] [INFO ] After 25031ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 4 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 158 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 159 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 290 ms. (steps per millisecond=34 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25250 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25250 steps, saw 22827 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:28:37] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:28:37] [INFO ] Invariant cache hit.
[2023-03-16 05:28:37] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:28:55] [INFO ] After 18045ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:28:55] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:29:13] [INFO ] After 18210ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:29:13] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:29:17] [INFO ] After 4191ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:29:19] [INFO ] Deduced a trap composed of 24 places in 378 ms of which 1 ms to minimize.
[2023-03-16 05:29:19] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1204 ms
[2023-03-16 05:29:20] [INFO ] After 6425ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 210 ms.
[2023-03-16 05:29:20] [INFO ] After 25035ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 11 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 236 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 236 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 180 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:29:20] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:29:20] [INFO ] Invariant cache hit.
[2023-03-16 05:29:22] [INFO ] Implicit Places using invariants in 1892 ms returned []
Implicit Place search using SMT only with invariants took 1892 ms to find 0 implicit places.
[2023-03-16 05:29:22] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:29:22] [INFO ] Invariant cache hit.
[2023-03-16 05:29:31] [INFO ] Dead Transitions using invariants and state equation in 8383 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10457 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 97 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 27 ms :[(NOT p0)]
Stuttering acceptance computed with spot in 34 ms :[(NOT p0)]
[2023-03-16 05:29:31] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:29:31] [INFO ] Invariant cache hit.
Could not prove EG (NOT p0)
Stuttering acceptance computed with spot in 37 ms :[(NOT p0)]
Product exploration explored 100000 steps with 0 reset in 3107 ms.
Product exploration explored 100000 steps with 0 reset in 3228 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 156 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:29:52] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:29:52] [INFO ] Invariant cache hit.
[2023-03-16 05:29:54] [INFO ] Implicit Places using invariants in 1918 ms returned []
Implicit Place search using SMT only with invariants took 1919 ms to find 0 implicit places.
[2023-03-16 05:29:54] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:29:54] [INFO ] Invariant cache hit.
[2023-03-16 05:30:02] [INFO ] Dead Transitions using invariants and state equation in 8026 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10102 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-13 finished in 283592 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G((X(p2)||p1))))))'
Found a Lengthening insensitive property : RERS17pb113-PT-6-LTLFireability-00
Stuttering acceptance computed with spot in 164 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Support contains 4 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:30:04] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:30:04] [INFO ] Invariant cache hit.
[2023-03-16 05:30:06] [INFO ] Implicit Places using invariants in 1853 ms returned []
Implicit Place search using SMT only with invariants took 1853 ms to find 0 implicit places.
[2023-03-16 05:30:06] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:30:06] [INFO ] Invariant cache hit.
[2023-03-16 05:30:14] [INFO ] Dead Transitions using invariants and state equation in 7964 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 9996 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=true, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={0} source=2 dest: 3}], [{ cond=(NOT p2), acceptance={} source=3 dest: 2}, { cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=3 dest: 3}]], initial=0, aps=[p0:(OR (LT s54 1) (LT s377 1)), p1:(OR (LT s391 1) (LT s535 1)), p2:(OR (LT s391 1) (LT s535 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, sl-invariant], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 7 reset in 3321 ms.
Product exploration explored 100000 steps with 13 reset in 3209 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 422 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 152 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 401 ms. (steps per millisecond=24 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 25004 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25004 steps, saw 22614 distinct states, run finished after 3002 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:30:25] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:30:25] [INFO ] Invariant cache hit.
[2023-03-16 05:30:25] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:30:42] [INFO ] After 17218ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:30:42] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:30:56] [INFO ] After 14549ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:30:57] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:31:04] [INFO ] After 7874ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 05:31:05] [INFO ] Deduced a trap composed of 40 places in 531 ms of which 3 ms to minimize.
[2023-03-16 05:31:06] [INFO ] Deduced a trap composed of 40 places in 453 ms of which 0 ms to minimize.
[2023-03-16 05:31:07] [INFO ] Deduced a trap composed of 40 places in 330 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:31:07] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:31:07] [INFO ] After 25083ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:4
Parikh walk visited 0 properties in 16 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 168 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 168 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 497 ms. (steps per millisecond=20 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 22961 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 22961 steps, saw 20788 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:31:11] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:31:11] [INFO ] Invariant cache hit.
[2023-03-16 05:31:11] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:31:28] [INFO ] After 17736ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:31:29] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:31:43] [INFO ] After 14731ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:31:43] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:31:52] [INFO ] After 8101ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 05:31:53] [INFO ] Deduced a trap composed of 40 places in 517 ms of which 0 ms to minimize.
[2023-03-16 05:31:53] [INFO ] Deduced a trap composed of 40 places in 443 ms of which 1 ms to minimize.
[2023-03-16 05:31:56] [INFO ] Deduced a trap composed of 64 places in 2397 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:31:56] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:31:56] [INFO ] After 27472ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:4
Parikh walk visited 0 properties in 14 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 183 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 184 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 176 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:31:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:31:56] [INFO ] Invariant cache hit.
[2023-03-16 05:31:58] [INFO ] Implicit Places using invariants in 1915 ms returned []
Implicit Place search using SMT only with invariants took 1916 ms to find 0 implicit places.
[2023-03-16 05:31:58] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:31:58] [INFO ] Invariant cache hit.
[2023-03-16 05:32:06] [INFO ] Dead Transitions using invariants and state equation in 8158 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10252 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 343 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 135 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 251 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 70 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:32:07] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:32:07] [INFO ] Invariant cache hit.
[2023-03-16 05:32:09] [INFO ] Implicit Places using invariants in 1857 ms returned []
Implicit Place search using SMT only with invariants took 1857 ms to find 0 implicit places.
[2023-03-16 05:32:09] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:32:09] [INFO ] Invariant cache hit.
[2023-03-16 05:32:17] [INFO ] Dead Transitions using invariants and state equation in 8102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10033 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 404 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 136 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 467 ms. (steps per millisecond=21 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 22696 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 22696 steps, saw 20550 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:32:22] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:32:22] [INFO ] Invariant cache hit.
[2023-03-16 05:32:22] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:32:39] [INFO ] After 17436ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:32:39] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:32:54] [INFO ] After 14402ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:32:54] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:33:02] [INFO ] After 8212ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 05:33:03] [INFO ] Deduced a trap composed of 40 places in 536 ms of which 1 ms to minimize.
[2023-03-16 05:33:04] [INFO ] Deduced a trap composed of 40 places in 476 ms of which 1 ms to minimize.
[2023-03-16 05:33:04] [INFO ] Deduced a trap composed of 40 places in 333 ms of which 1 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:33:04] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:33:04] [INFO ] After 25293ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:4
Parikh walk visited 0 properties in 17 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 166 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 167 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 514 ms. (steps per millisecond=19 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Interrupted probabilistic random walk after 22961 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 22961 steps, saw 20788 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 4 properties.
[2023-03-16 05:33:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:33:08] [INFO ] Invariant cache hit.
[2023-03-16 05:33:09] [INFO ] [Real]Absence check using 13 positive place invariants in 8 ms returned sat
[2023-03-16 05:33:28] [INFO ] After 19327ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-16 05:33:28] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 05:33:43] [INFO ] After 14972ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-16 05:33:43] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:33:51] [INFO ] After 7892ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :4
[2023-03-16 05:33:52] [INFO ] Deduced a trap composed of 40 places in 525 ms of which 0 ms to minimize.
[2023-03-16 05:33:53] [INFO ] Deduced a trap composed of 40 places in 472 ms of which 0 ms to minimize.
[2023-03-16 05:33:55] [INFO ] Deduced a trap composed of 64 places in 2336 ms of which 0 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 05:33:55] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 05:33:55] [INFO ] After 27370ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:4
Parikh walk visited 0 properties in 20 ms.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 204 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 204 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 202 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:33:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:33:56] [INFO ] Invariant cache hit.
[2023-03-16 05:33:57] [INFO ] Implicit Places using invariants in 1778 ms returned []
Implicit Place search using SMT only with invariants took 1778 ms to find 0 implicit places.
[2023-03-16 05:33:57] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:33:57] [INFO ] Invariant cache hit.
[2023-03-16 05:34:05] [INFO ] Dead Transitions using invariants and state equation in 8059 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10042 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(AND p0 p1 p2), (X (NOT (AND (NOT p1) (NOT p2)))), (X p0), (X p2), true, (X (X p1)), (X (X (NOT (AND (NOT p1) (NOT p2))))), (X (X p0)), (X (X p2))]
False Knowledge obtained : []
Knowledge based reduction with 9 factoid took 398 ms. Reduced automaton from 4 states, 8 edges and 3 AP (stutter sensitive) to 4 states, 8 edges and 3 AP (stutter sensitive).
Stuttering acceptance computed with spot in 159 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 159 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Stuttering acceptance computed with spot in 149 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Product exploration explored 100000 steps with 10 reset in 3209 ms.
Product exploration explored 100000 steps with 6 reset in 3249 ms.
Applying partial POR strategy [false, true, false, false]
Stuttering acceptance computed with spot in 166 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 169 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:34:13] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:13] [INFO ] Invariant cache hit.
[2023-03-16 05:34:21] [INFO ] Dead Transitions using invariants and state equation in 8265 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 8436 ms. Remains : 626/626 places, 31352/31352 transitions.
Support contains 4 out of 626 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 70 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:34:22] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:22] [INFO ] Invariant cache hit.
[2023-03-16 05:34:24] [INFO ] Implicit Places using invariants in 2022 ms returned []
Implicit Place search using SMT only with invariants took 2022 ms to find 0 implicit places.
[2023-03-16 05:34:24] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:24] [INFO ] Invariant cache hit.
[2023-03-16 05:34:32] [INFO ] Dead Transitions using invariants and state equation in 8279 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10373 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-00 finished in 269445 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((X(p0)||p1) U ((X(G(p2)) U p0)||F(p3))))'
Found a Lengthening insensitive property : RERS17pb113-PT-6-LTLFireability-01
Stuttering acceptance computed with spot in 215 ms :[(AND (NOT p3) (NOT p2)), (AND (NOT p0) (NOT p3)), (AND (NOT p0) (NOT p3)), (NOT p3), (OR (AND (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p3)))]
Support contains 8 out of 627 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 166 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
[2023-03-16 05:34:33] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:33] [INFO ] Invariant cache hit.
[2023-03-16 05:34:35] [INFO ] Implicit Places using invariants in 2043 ms returned []
Implicit Place search using SMT only with invariants took 2044 ms to find 0 implicit places.
[2023-03-16 05:34:35] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:35] [INFO ] Invariant cache hit.
[2023-03-16 05:34:43] [INFO ] Dead Transitions using invariants and state equation in 8042 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 10255 ms. Remains : 626/627 places, 31352/31353 transitions.
Running random walk in product with property : RERS17pb113-PT-6-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p3) p2), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p3) (NOT p2)), acceptance={} source=0 dest: 3}], [{ cond=(AND (NOT p0) (NOT p3) p1), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p3) (NOT p1)), acceptance={0} source=1 dest: 2}], [{ cond=(AND (NOT p0) (NOT p3) (NOT p2)), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p0) (NOT p3) p2), acceptance={} source=2 dest: 4}], [{ cond=(NOT p3), acceptance={0} source=3 dest: 3}], [{ cond=(AND p0 (NOT p3) p2), acceptance={0} source=4 dest: 0}, { cond=(AND (NOT p3) (NOT p2)), acceptance={0} source=4 dest: 3}, { cond=(AND (NOT p0) (NOT p3) p2), acceptance={0} source=4 dest: 4}]], initial=1, aps=[p3:(AND (GEQ s171 1) (GEQ s591 1)), p2:(AND (GEQ s132 1) (GEQ s134 1)), p0:(AND (GEQ s250 1) (GEQ s462 1)), p1:(AND (GEQ s456 1) (GEQ s519 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 3198 ms.
Product exploration explored 100000 steps with 3 reset in 3305 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p3) (NOT p2) (NOT p0) (NOT p1)), (X (NOT (AND (NOT p0) (NOT p3) p1))), (X (AND (NOT p0) (NOT p3) (NOT p2))), (X (AND (NOT p0) (NOT p3) (NOT p1))), (X (NOT (AND (NOT p0) (NOT p3) p2))), (X (X (NOT (AND (NOT p0) (NOT p3) p1)))), (X (X (AND (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p3) p2)))), (X (X (NOT p3))), (X (X (NOT (AND p0 (NOT p3) p2))))]
False Knowledge obtained : []
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 12 factoid took 556 ms. Reduced automaton from 5 states, 10 edges and 4 AP (stutter sensitive) to 2 states, 2 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 70 ms :[(NOT p3), (NOT p3)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 272 ms. (steps per millisecond=36 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25781 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25781 steps, saw 23305 distinct states, run finished after 3003 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:34:54] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:34:54] [INFO ] Invariant cache hit.
[2023-03-16 05:34:54] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:35:11] [INFO ] After 16849ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:35:11] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:35:14] [INFO ] After 3206ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:35:14] [INFO ] After 20235ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:35:14] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:35:31] [INFO ] After 16441ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:35:35] [INFO ] After 4154ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:35:36] [INFO ] Deduced a trap composed of 65 places in 436 ms of which 0 ms to minimize.
[2023-03-16 05:35:36] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1291 ms
[2023-03-16 05:35:37] [INFO ] After 5896ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1022 ms.
[2023-03-16 05:35:38] [INFO ] After 23449ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 149 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 149 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 281 ms. (steps per millisecond=35 ) properties (out of 1) seen :0
Finished Best-First random walk after 6324 steps, including 1 resets, run visited all 1 properties in 15 ms. (steps per millisecond=421 )
Knowledge obtained : [(AND (NOT p3) (NOT p2) (NOT p0) (NOT p1)), (X (NOT (AND (NOT p0) (NOT p3) p1))), (X (AND (NOT p0) (NOT p3) (NOT p2))), (X (AND (NOT p0) (NOT p3) (NOT p1))), (X (NOT (AND (NOT p0) (NOT p3) p2))), (X (X (NOT (AND (NOT p0) (NOT p3) p1)))), (X (X (AND (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p2)))), (X (X (AND (NOT p0) (NOT p3) (NOT p1)))), (X (X (NOT (AND (NOT p0) (NOT p3) p2)))), (X (X (NOT p3))), (X (X (NOT (AND p0 (NOT p3) p2))))]
False Knowledge obtained : [(F p3)]
Knowledge based reduction with 12 factoid took 526 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 28 ms :[(NOT p3)]
Stuttering acceptance computed with spot in 39 ms :[(NOT p3)]
[2023-03-16 05:35:39] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:35:39] [INFO ] Invariant cache hit.
Could not prove EG (NOT p3)
Support contains 2 out of 626 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 148 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:35:54] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:35:54] [INFO ] Invariant cache hit.
[2023-03-16 05:35:56] [INFO ] Implicit Places using invariants in 1825 ms returned []
Implicit Place search using SMT only with invariants took 1834 ms to find 0 implicit places.
[2023-03-16 05:35:56] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:35:56] [INFO ] Invariant cache hit.
[2023-03-16 05:36:04] [INFO ] Dead Transitions using invariants and state equation in 7990 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 9972 ms. Remains : 626/626 places, 31352/31352 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p3), (X (NOT p3)), (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 120 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 29 ms :[(NOT p3)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 289 ms. (steps per millisecond=34 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25724 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25724 steps, saw 23255 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:36:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:36:08] [INFO ] Invariant cache hit.
[2023-03-16 05:36:08] [INFO ] [Real]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:36:23] [INFO ] After 15678ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:36:23] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:36:27] [INFO ] After 3198ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:36:27] [INFO ] After 19053ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:36:27] [INFO ] [Nat]Absence check using 13 positive place invariants in 6 ms returned sat
[2023-03-16 05:36:43] [INFO ] After 15889ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:36:47] [INFO ] After 4278ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:36:48] [INFO ] Deduced a trap composed of 65 places in 450 ms of which 1 ms to minimize.
[2023-03-16 05:36:48] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1325 ms
[2023-03-16 05:36:49] [INFO ] After 6065ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1075 ms.
[2023-03-16 05:36:50] [INFO ] After 23128ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 154 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 155 ms. Remains : 626/626 places, 31352/31352 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 376 ms. (steps per millisecond=26 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 25391 steps, run timeout after 3001 ms. (steps per millisecond=8 ) properties seen :{}
Probabilistic random walk after 25391 steps, saw 22954 distinct states, run finished after 3001 ms. (steps per millisecond=8 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 05:36:53] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:36:53] [INFO ] Invariant cache hit.
[2023-03-16 05:36:53] [INFO ] [Real]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:37:09] [INFO ] After 15759ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 05:37:09] [INFO ] State equation strengthened by 268 read => feed constraints.
[2023-03-16 05:37:12] [INFO ] After 3155ms SMT Verify possible using 268 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:37:12] [INFO ] After 19097ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 05:37:13] [INFO ] [Nat]Absence check using 13 positive place invariants in 5 ms returned sat
[2023-03-16 05:37:29] [INFO ] After 16141ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 05:37:33] [INFO ] After 4200ms SMT Verify possible using 268 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-16 05:37:34] [INFO ] Deduced a trap composed of 65 places in 446 ms of which 0 ms to minimize.
[2023-03-16 05:37:34] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 1304 ms
[2023-03-16 05:37:35] [INFO ] After 5955ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1033 ms.
[2023-03-16 05:37:36] [INFO ] After 23213ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 4 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 164 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 164 ms. Remains : 626/626 places, 31352/31352 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 164 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:37:36] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:37:36] [INFO ] Invariant cache hit.
[2023-03-16 05:37:38] [INFO ] Implicit Places using invariants in 1811 ms returned []
Implicit Place search using SMT only with invariants took 1812 ms to find 0 implicit places.
[2023-03-16 05:37:38] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:37:38] [INFO ] Invariant cache hit.
[2023-03-16 05:37:46] [INFO ] Dead Transitions using invariants and state equation in 8240 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10218 ms. Remains : 626/626 places, 31352/31352 transitions.
Knowledge obtained : [(NOT p3), (X (NOT p3)), (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 109 ms. Reduced automaton from 1 states, 1 edges and 1 AP (stutter insensitive) to 1 states, 1 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 32 ms :[(NOT p3)]
Stuttering acceptance computed with spot in 27 ms :[(NOT p3)]
[2023-03-16 05:37:46] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:37:46] [INFO ] Invariant cache hit.
Could not prove EG (NOT p3)
Stuttering acceptance computed with spot in 34 ms :[(NOT p3)]
Product exploration explored 100000 steps with 3 reset in 3189 ms.
Product exploration explored 100000 steps with 1 reset in 3227 ms.
Support contains 2 out of 626 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 626/626 places, 31352/31352 transitions.
Applied a total of 0 rules in 152 ms. Remains 626 /626 variables (removed 0) and now considering 31352/31352 (removed 0) transitions.
[2023-03-16 05:38:08] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:38:08] [INFO ] Invariant cache hit.
[2023-03-16 05:38:10] [INFO ] Implicit Places using invariants in 1976 ms returned []
Implicit Place search using SMT only with invariants took 1977 ms to find 0 implicit places.
[2023-03-16 05:38:10] [INFO ] Flow matrix only has 18325 transitions (discarded 13027 similar events)
[2023-03-16 05:38:10] [INFO ] Invariant cache hit.
[2023-03-16 05:38:18] [INFO ] Dead Transitions using invariants and state equation in 8192 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 10322 ms. Remains : 626/626 places, 31352/31352 transitions.
Treatment of property RERS17pb113-PT-6-LTLFireability-01 finished in 226492 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((X(G(F(X((!X(G(p0)) U p1)))))||p0)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((X(G(p1))&&p0)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((G((p0||F(p1)))||F((G(p2)||G(p3)))))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F((X(p1)&&p0))||X(G(p1))))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(p0))'
[2023-03-16 05:38:21] [INFO ] Flatten gal took : 774 ms
[2023-03-16 05:38:21] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/LTLFireability.sr.xml took 2 ms.
[2023-03-16 05:38:21] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 627 places, 31353 transitions and 125406 arcs took 98 ms.
Total runtime 2956210 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RERS17pb113-PT-6
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
LTLFireability

FORMULA RERS17pb113-PT-6-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-6-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-6-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 6704896 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16032080 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 12 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 17 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 22 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 27 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 32 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 37 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 42 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 47 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 52 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 57 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 62 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 67 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 72 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 77 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 82 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 87 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 92 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 97 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 11.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 102 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 107 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 112 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 117 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 122 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 127 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 132 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 137 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: Created skeleton in 40.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 142 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 147 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 152 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 157 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 162 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 167 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 172 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 177 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 182 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 187 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 192 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 197 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 8
lola: LAUNCH task # 5 (type EXCL) for 0 RERS17pb113-PT-6-LTLFireability-00
lola: time limit : 377 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 3/377 1/32 RERS17pb113-PT-6-LTLFireability-00 43403 m, 8680 m/sec, 44432 t fired, .

Time elapsed: 202 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 8
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 8/377 3/32 RERS17pb113-PT-6-LTLFireability-00 195460 m, 30411 m/sec, 208048 t fired, .

Time elapsed: 207 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 13/377 5/32 RERS17pb113-PT-6-LTLFireability-00 351155 m, 31139 m/sec, 393331 t fired, .

Time elapsed: 212 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 18/377 7/32 RERS17pb113-PT-6-LTLFireability-00 503526 m, 30474 m/sec, 572292 t fired, .

Time elapsed: 217 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 23/377 9/32 RERS17pb113-PT-6-LTLFireability-00 655298 m, 30354 m/sec, 752061 t fired, .

Time elapsed: 222 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 28/377 10/32 RERS17pb113-PT-6-LTLFireability-00 807247 m, 30389 m/sec, 933660 t fired, .

Time elapsed: 227 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 33/377 12/32 RERS17pb113-PT-6-LTLFireability-00 958008 m, 30152 m/sec, 1112172 t fired, .

Time elapsed: 232 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 38/377 14/32 RERS17pb113-PT-6-LTLFireability-00 1107984 m, 29995 m/sec, 1288471 t fired, .

Time elapsed: 237 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 43/377 16/32 RERS17pb113-PT-6-LTLFireability-00 1258913 m, 30185 m/sec, 1467173 t fired, .

Time elapsed: 242 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 48/377 18/32 RERS17pb113-PT-6-LTLFireability-00 1408370 m, 29891 m/sec, 1647661 t fired, .

Time elapsed: 247 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 53/377 19/32 RERS17pb113-PT-6-LTLFireability-00 1559007 m, 30127 m/sec, 1830115 t fired, .

Time elapsed: 252 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 58/377 21/32 RERS17pb113-PT-6-LTLFireability-00 1710368 m, 30272 m/sec, 2008966 t fired, .

Time elapsed: 257 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 63/377 23/32 RERS17pb113-PT-6-LTLFireability-00 1861186 m, 30163 m/sec, 2190273 t fired, .

Time elapsed: 262 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 68/377 25/32 RERS17pb113-PT-6-LTLFireability-00 2010052 m, 29773 m/sec, 2373335 t fired, .

Time elapsed: 267 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 73/377 26/32 RERS17pb113-PT-6-LTLFireability-00 2161400 m, 30269 m/sec, 2550731 t fired, .

Time elapsed: 272 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 78/377 28/32 RERS17pb113-PT-6-LTLFireability-00 2309020 m, 29524 m/sec, 2724742 t fired, .

Time elapsed: 277 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 83/377 30/32 RERS17pb113-PT-6-LTLFireability-00 2456398 m, 29475 m/sec, 2906704 t fired, .

Time elapsed: 282 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 88/377 32/32 RERS17pb113-PT-6-LTLFireability-00 2604545 m, 29629 m/sec, 3081138 t fired, .

Time elapsed: 287 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: CANCELED task # 5 (type EXCL) for RERS17pb113-PT-6-LTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 292 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: LAUNCH task # 23 (type EXCL) for 22 RERS17pb113-PT-6-LTLFireability-09
lola: time limit : 413 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for RERS17pb113-PT-6-LTLFireability-09
lola: result : false
lola: markings : 6131
lola: fired transitions : 6131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 RERS17pb113-PT-6-LTLFireability-07
lola: time limit : 472 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for RERS17pb113-PT-6-LTLFireability-07
lola: result : false
lola: markings : 6131
lola: fired transitions : 6131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 7 RERS17pb113-PT-6-LTLFireability-01
lola: time limit : 551 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for RERS17pb113-PT-6-LTLFireability-01
lola: result : false
lola: markings : 6131
lola: fired transitions : 6131
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 25 RERS17pb113-PT-6-LTLFireability-13
lola: time limit : 661 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 5/661 1/32 RERS17pb113-PT-6-LTLFireability-13 356 m, 71 m/sec, 355 t fired, .

Time elapsed: 297 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 10/661 1/32 RERS17pb113-PT-6-LTLFireability-13 767 m, 82 m/sec, 766 t fired, .

Time elapsed: 302 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 15/661 1/32 RERS17pb113-PT-6-LTLFireability-13 1178 m, 82 m/sec, 1177 t fired, .

Time elapsed: 307 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 20/661 1/32 RERS17pb113-PT-6-LTLFireability-13 1596 m, 83 m/sec, 1595 t fired, .

Time elapsed: 312 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 25/661 1/32 RERS17pb113-PT-6-LTLFireability-13 1959 m, 72 m/sec, 1958 t fired, .

Time elapsed: 317 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 30/661 1/32 RERS17pb113-PT-6-LTLFireability-13 2369 m, 82 m/sec, 2368 t fired, .

Time elapsed: 322 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 35/661 1/32 RERS17pb113-PT-6-LTLFireability-13 2804 m, 87 m/sec, 2803 t fired, .

Time elapsed: 327 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 40/661 1/32 RERS17pb113-PT-6-LTLFireability-13 3230 m, 85 m/sec, 3229 t fired, .

Time elapsed: 332 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 45/661 1/32 RERS17pb113-PT-6-LTLFireability-13 3661 m, 86 m/sec, 3660 t fired, .

Time elapsed: 337 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 50/661 1/32 RERS17pb113-PT-6-LTLFireability-13 4091 m, 86 m/sec, 4090 t fired, .

Time elapsed: 342 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 55/661 1/32 RERS17pb113-PT-6-LTLFireability-13 4523 m, 86 m/sec, 4522 t fired, .

Time elapsed: 347 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 60/661 1/32 RERS17pb113-PT-6-LTLFireability-13 4949 m, 85 m/sec, 4948 t fired, .

Time elapsed: 352 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 65/661 1/32 RERS17pb113-PT-6-LTLFireability-13 5378 m, 85 m/sec, 5377 t fired, .

Time elapsed: 357 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 70/661 1/32 RERS17pb113-PT-6-LTLFireability-13 5822 m, 88 m/sec, 5821 t fired, .

Time elapsed: 362 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 75/661 1/32 RERS17pb113-PT-6-LTLFireability-13 6263 m, 88 m/sec, 6262 t fired, .

Time elapsed: 367 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 80/661 1/32 RERS17pb113-PT-6-LTLFireability-13 6719 m, 91 m/sec, 6718 t fired, .

Time elapsed: 372 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 85/661 1/32 RERS17pb113-PT-6-LTLFireability-13 7172 m, 90 m/sec, 7171 t fired, .

Time elapsed: 377 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 90/661 1/32 RERS17pb113-PT-6-LTLFireability-13 7613 m, 88 m/sec, 7612 t fired, .

Time elapsed: 382 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 95/661 1/32 RERS17pb113-PT-6-LTLFireability-13 8046 m, 86 m/sec, 8045 t fired, .

Time elapsed: 387 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 100/661 1/32 RERS17pb113-PT-6-LTLFireability-13 8473 m, 85 m/sec, 8472 t fired, .

Time elapsed: 392 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 105/661 1/32 RERS17pb113-PT-6-LTLFireability-13 8894 m, 84 m/sec, 8893 t fired, .

Time elapsed: 397 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 110/661 1/32 RERS17pb113-PT-6-LTLFireability-13 9315 m, 84 m/sec, 9314 t fired, .

Time elapsed: 402 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 115/661 1/32 RERS17pb113-PT-6-LTLFireability-13 9742 m, 85 m/sec, 9741 t fired, .

Time elapsed: 407 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 120/661 1/32 RERS17pb113-PT-6-LTLFireability-13 10167 m, 85 m/sec, 10166 t fired, .

Time elapsed: 412 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 125/661 1/32 RERS17pb113-PT-6-LTLFireability-13 10609 m, 88 m/sec, 10608 t fired, .

Time elapsed: 417 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 130/661 1/32 RERS17pb113-PT-6-LTLFireability-13 11058 m, 89 m/sec, 11057 t fired, .

Time elapsed: 422 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 135/661 1/32 RERS17pb113-PT-6-LTLFireability-13 11488 m, 86 m/sec, 11487 t fired, .

Time elapsed: 427 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 140/661 1/32 RERS17pb113-PT-6-LTLFireability-13 11920 m, 86 m/sec, 11919 t fired, .

Time elapsed: 432 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 145/661 1/32 RERS17pb113-PT-6-LTLFireability-13 12351 m, 86 m/sec, 12350 t fired, .

Time elapsed: 437 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 150/661 1/32 RERS17pb113-PT-6-LTLFireability-13 12785 m, 86 m/sec, 12784 t fired, .

Time elapsed: 442 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 155/661 1/32 RERS17pb113-PT-6-LTLFireability-13 13211 m, 85 m/sec, 13210 t fired, .

Time elapsed: 447 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 160/661 1/32 RERS17pb113-PT-6-LTLFireability-13 13639 m, 85 m/sec, 13638 t fired, .

Time elapsed: 452 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 165/661 1/32 RERS17pb113-PT-6-LTLFireability-13 14087 m, 89 m/sec, 14086 t fired, .

Time elapsed: 457 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 170/661 1/32 RERS17pb113-PT-6-LTLFireability-13 14531 m, 88 m/sec, 14530 t fired, .

Time elapsed: 462 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 175/661 1/32 RERS17pb113-PT-6-LTLFireability-13 14975 m, 88 m/sec, 14974 t fired, .

Time elapsed: 467 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 180/661 1/32 RERS17pb113-PT-6-LTLFireability-13 15406 m, 86 m/sec, 15405 t fired, .

Time elapsed: 472 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 185/661 1/32 RERS17pb113-PT-6-LTLFireability-13 15838 m, 86 m/sec, 15837 t fired, .

Time elapsed: 477 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 190/661 1/32 RERS17pb113-PT-6-LTLFireability-13 16271 m, 86 m/sec, 16270 t fired, .

Time elapsed: 482 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 195/661 1/32 RERS17pb113-PT-6-LTLFireability-13 16708 m, 87 m/sec, 16707 t fired, .

Time elapsed: 487 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 200/661 1/32 RERS17pb113-PT-6-LTLFireability-13 17137 m, 85 m/sec, 17136 t fired, .

Time elapsed: 492 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 205/661 1/32 RERS17pb113-PT-6-LTLFireability-13 17568 m, 86 m/sec, 17567 t fired, .

Time elapsed: 497 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 210/661 1/32 RERS17pb113-PT-6-LTLFireability-13 18011 m, 88 m/sec, 18010 t fired, .

Time elapsed: 502 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 215/661 1/32 RERS17pb113-PT-6-LTLFireability-13 18454 m, 88 m/sec, 18453 t fired, .

Time elapsed: 507 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 220/661 1/32 RERS17pb113-PT-6-LTLFireability-13 18904 m, 90 m/sec, 18903 t fired, .

Time elapsed: 512 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 225/661 1/32 RERS17pb113-PT-6-LTLFireability-13 19360 m, 91 m/sec, 19359 t fired, .

Time elapsed: 517 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 230/661 1/32 RERS17pb113-PT-6-LTLFireability-13 19802 m, 88 m/sec, 19801 t fired, .

Time elapsed: 522 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 235/661 1/32 RERS17pb113-PT-6-LTLFireability-13 20231 m, 85 m/sec, 20230 t fired, .

Time elapsed: 527 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 240/661 1/32 RERS17pb113-PT-6-LTLFireability-13 20669 m, 87 m/sec, 20668 t fired, .

Time elapsed: 532 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 245/661 1/32 RERS17pb113-PT-6-LTLFireability-13 21099 m, 86 m/sec, 21098 t fired, .

Time elapsed: 537 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 250/661 1/32 RERS17pb113-PT-6-LTLFireability-13 21528 m, 85 m/sec, 21527 t fired, .

Time elapsed: 542 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 255/661 1/32 RERS17pb113-PT-6-LTLFireability-13 21963 m, 87 m/sec, 21962 t fired, .

Time elapsed: 547 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 260/661 1/32 RERS17pb113-PT-6-LTLFireability-13 22394 m, 86 m/sec, 22393 t fired, .

Time elapsed: 552 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 265/661 1/32 RERS17pb113-PT-6-LTLFireability-13 22825 m, 86 m/sec, 22824 t fired, .

Time elapsed: 557 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 270/661 1/32 RERS17pb113-PT-6-LTLFireability-13 23271 m, 89 m/sec, 23270 t fired, .

Time elapsed: 562 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 275/661 1/32 RERS17pb113-PT-6-LTLFireability-13 23707 m, 87 m/sec, 23706 t fired, .

Time elapsed: 567 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 280/661 1/32 RERS17pb113-PT-6-LTLFireability-13 24137 m, 86 m/sec, 24136 t fired, .

Time elapsed: 572 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 285/661 1/32 RERS17pb113-PT-6-LTLFireability-13 24574 m, 87 m/sec, 24573 t fired, .

Time elapsed: 577 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 290/661 1/32 RERS17pb113-PT-6-LTLFireability-13 24995 m, 84 m/sec, 24994 t fired, .

Time elapsed: 582 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 295/661 1/32 RERS17pb113-PT-6-LTLFireability-13 25419 m, 84 m/sec, 25418 t fired, .

Time elapsed: 587 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 300/661 1/32 RERS17pb113-PT-6-LTLFireability-13 25840 m, 84 m/sec, 25839 t fired, .

Time elapsed: 592 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 305/661 1/32 RERS17pb113-PT-6-LTLFireability-13 26270 m, 86 m/sec, 26269 t fired, .

Time elapsed: 597 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 310/661 1/32 RERS17pb113-PT-6-LTLFireability-13 26696 m, 85 m/sec, 26695 t fired, .

Time elapsed: 602 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 315/661 1/32 RERS17pb113-PT-6-LTLFireability-13 27118 m, 84 m/sec, 27117 t fired, .

Time elapsed: 607 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 320/661 1/32 RERS17pb113-PT-6-LTLFireability-13 27540 m, 84 m/sec, 27539 t fired, .

Time elapsed: 612 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 325/661 1/32 RERS17pb113-PT-6-LTLFireability-13 27966 m, 85 m/sec, 27965 t fired, .

Time elapsed: 617 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 330/661 1/32 RERS17pb113-PT-6-LTLFireability-13 28386 m, 84 m/sec, 28385 t fired, .

Time elapsed: 622 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 335/661 1/32 RERS17pb113-PT-6-LTLFireability-13 28807 m, 84 m/sec, 28806 t fired, .

Time elapsed: 627 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 340/661 1/32 RERS17pb113-PT-6-LTLFireability-13 29228 m, 84 m/sec, 29227 t fired, .

Time elapsed: 632 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-6-LTLFireability-00: CONJ 0 1 0 0 2 0 1 0
RERS17pb113-PT-6-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-6-LTLFireability-13: F 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 EG EXCL 345/661 1/32 RERS17pb113-PT-6-LTLFireability-13 29651 m, 84 m/sec, 29650 t fired, .

Time elapsed: 637 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 8
lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-6-LTLFireability-00: CONJ unknown CONJ
RERS17pb113-PT-6-LTLFireability-01: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-03: LTL unknown AGGR
RERS17pb113-PT-6-LTLFireability-05: LTL unknown AGGR
RERS17pb113-PT-6-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-08: LTL unknown AGGR
RERS17pb113-PT-6-LTLFireability-09: LTL false LTL model checker
RERS17pb113-PT-6-LTLFireability-13: F unknown AGGR


Time elapsed: 641 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-6"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RERS17pb113-PT-6, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199100044"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-6.tgz
mv RERS17pb113-PT-6 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;