Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199000001.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RERS17pb113-PT-1, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199000001
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 4.6K Feb 26 18:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 42K Feb 26 18:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 26 18:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 18:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.4K Feb 26 18:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 26 18:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 18:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 18:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 15M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-00
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-01
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-02
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-03
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-04
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-05
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-06
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-07
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-08
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-09
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-10
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-11
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-12
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-13
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-14
FORMULA_NAME RERS17pb113-PT-1-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678929978324

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb113-PT-1
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 01:26:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-16 01:26:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 01:26:20] [INFO ] Load time of PNML (sax parser for PT used): 612 ms
[2023-03-16 01:26:20] [INFO ] Transformed 639 places.
[2023-03-16 01:26:20] [INFO ] Transformed 31353 transitions.
[2023-03-16 01:26:20] [INFO ] Found NUPN structural information;
[2023-03-16 01:26:20] [INFO ] Parsed PT model containing 639 places and 31353 transitions and 125418 arcs in 816 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 9 ms.
FORMULA RERS17pb113-PT-1-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 65 out of 639 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 639/639 places, 31353/31353 transitions.
Ensure Unique test removed 12 places
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 627 transition count 31353
Applied a total of 12 rules in 303 ms. Remains 627 /639 variables (removed 12) and now considering 31353/31353 (removed 0) transitions.
[2023-03-16 01:26:21] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
// Phase 1: matrix 18326 rows 627 cols
[2023-03-16 01:26:21] [INFO ] Computed 13 place invariants in 128 ms
[2023-03-16 01:26:23] [INFO ] Implicit Places using invariants in 2188 ms returned []
Implicit Place search using SMT only with invariants took 2217 ms to find 0 implicit places.
[2023-03-16 01:26:23] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 01:26:23] [INFO ] Invariant cache hit.
[2023-03-16 01:26:32] [INFO ] Dead Transitions using invariants and state equation in 8720 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 627/639 places, 31353/31353 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11249 ms. Remains : 627/639 places, 31353/31353 transitions.
Support contains 65 out of 627 places after structural reductions.
[2023-03-16 01:26:33] [INFO ] Flatten gal took : 922 ms
[2023-03-16 01:26:34] [INFO ] Flatten gal took : 731 ms
[2023-03-16 01:26:36] [INFO ] Input system was already deterministic with 31353 transitions.
Support contains 56 out of 627 places (down from 65) after GAL structural reductions.
FORMULA RERS17pb113-PT-1-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 545 ms. (steps per millisecond=18 ) properties (out of 33) seen :32
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-16 01:26:37] [INFO ] Flow matrix only has 18326 transitions (discarded 13027 similar events)
[2023-03-16 01:26:37] [INFO ] Invariant cache hit.
[2023-03-16 01:26:37] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 01:26:49] [INFO ] After 12208ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-16 01:26:49] [INFO ] [Nat]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-16 01:27:01] [INFO ] After 12130ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-16 01:27:01] [INFO ] State equation strengthened by 829 read => feed constraints.
[2023-03-16 01:27:12] [INFO ] After 10712ms SMT Verify possible using 829 Read/Feed constraints in natural domain returned unsat :0 sat :0
[2023-03-16 01:27:12] [INFO ] After 23297ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 19 ms.
Support contains 2 out of 627 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 626 transition count 31352
Applied a total of 1 rules in 498 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 500 ms. Remains : 626/627 places, 31352/31353 transitions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 252 ms. (steps per millisecond=39 ) properties (out of 1) seen :0
Finished Best-First random walk after 6590 steps, including 1 resets, run visited all 1 properties in 23 ms. (steps per millisecond=286 )
[2023-03-16 01:27:14] [INFO ] Flatten gal took : 611 ms
[2023-03-16 01:27:14] [INFO ] Flatten gal took : 616 ms
[2023-03-16 01:27:16] [INFO ] Input system was already deterministic with 31353 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 208 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 209 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:17] [INFO ] Flatten gal took : 558 ms
[2023-03-16 01:27:17] [INFO ] Flatten gal took : 643 ms
[2023-03-16 01:27:19] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 76 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 77 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:20] [INFO ] Flatten gal took : 554 ms
[2023-03-16 01:27:20] [INFO ] Flatten gal took : 652 ms
[2023-03-16 01:27:22] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 77 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 79 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:22] [INFO ] Flatten gal took : 553 ms
[2023-03-16 01:27:23] [INFO ] Flatten gal took : 643 ms
[2023-03-16 01:27:24] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 70 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:25] [INFO ] Flatten gal took : 560 ms
[2023-03-16 01:27:26] [INFO ] Flatten gal took : 652 ms
[2023-03-16 01:27:27] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 70 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 70 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:28] [INFO ] Flatten gal took : 570 ms
[2023-03-16 01:27:28] [INFO ] Flatten gal took : 619 ms
[2023-03-16 01:27:30] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 73 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 73 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:30] [INFO ] Flatten gal took : 559 ms
[2023-03-16 01:27:31] [INFO ] Flatten gal took : 656 ms
[2023-03-16 01:27:32] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 181 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 182 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:33] [INFO ] Flatten gal took : 557 ms
[2023-03-16 01:27:34] [INFO ] Flatten gal took : 650 ms
[2023-03-16 01:27:35] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 177 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 178 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:36] [INFO ] Flatten gal took : 550 ms
[2023-03-16 01:27:37] [INFO ] Flatten gal took : 651 ms
[2023-03-16 01:27:38] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 167 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 168 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:39] [INFO ] Flatten gal took : 550 ms
[2023-03-16 01:27:40] [INFO ] Flatten gal took : 644 ms
[2023-03-16 01:27:41] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in LTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Applied a total of 0 rules in 69 ms. Remains 627 /627 variables (removed 0) and now considering 31353/31353 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 69 ms. Remains : 627/627 places, 31353/31353 transitions.
[2023-03-16 01:27:42] [INFO ] Flatten gal took : 548 ms
[2023-03-16 01:27:42] [INFO ] Flatten gal took : 643 ms
[2023-03-16 01:27:43] [INFO ] Input system was already deterministic with 31353 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 199 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 201 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:44] [INFO ] Flatten gal took : 553 ms
[2023-03-16 01:27:45] [INFO ] Flatten gal took : 647 ms
[2023-03-16 01:27:46] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 159 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 161 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:47] [INFO ] Flatten gal took : 550 ms
[2023-03-16 01:27:48] [INFO ] Flatten gal took : 640 ms
[2023-03-16 01:27:49] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 159 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 160 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:50] [INFO ] Flatten gal took : 560 ms
[2023-03-16 01:27:50] [INFO ] Flatten gal took : 618 ms
[2023-03-16 01:27:52] [INFO ] Input system was already deterministic with 31352 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 627/627 places, 31353/31353 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 151 ms. Remains 626 /627 variables (removed 1) and now considering 31352/31353 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 152 ms. Remains : 626/627 places, 31352/31353 transitions.
[2023-03-16 01:27:52] [INFO ] Flatten gal took : 541 ms
[2023-03-16 01:27:53] [INFO ] Flatten gal took : 626 ms
[2023-03-16 01:27:54] [INFO ] Input system was already deterministic with 31352 transitions.
[2023-03-16 01:27:55] [INFO ] Flatten gal took : 600 ms
[2023-03-16 01:27:56] [INFO ] Flatten gal took : 627 ms
[2023-03-16 01:27:56] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-16 01:27:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 627 places, 31353 transitions and 125406 arcs took 84 ms.
Total runtime 96206 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RERS17pb113-PT-1
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372

FORMULA RERS17pb113-PT-1-CTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RERS17pb113-PT-1-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678930531247
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 15699200 kB
After kill :
MemTotal: 16393216 kB
MemFree: 15698192 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:475
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-CTLCardinality-00: F 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-01: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-02: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-03: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-05: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-07: EG 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-08: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-11: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-12: EGEF 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 17 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-1-CTLCardinality-00: F 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-01: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-02: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-03: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-05: CTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
RERS17pb113-PT-1-CTLCardinality-07: EG 0 0 0 0 0 0 0 0
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24 AGEF EXCL 4/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 --

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24 AGEF EXCL 9/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 377 m, 75 m/sec, 377 t fired, .

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24 AGEF EXCL 16/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 1334 m, 191 m/sec, 1334 t fired, .

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24 AGEF EXCL 21/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 1660 m, 65 m/sec, 1660 t fired, .

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24 AGEF EXCL 26/201 1/32 RERS17pb113-PT-1-CTLCardinality-08 2560 m, 180 m/sec, 2560 t fired, .

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lola: LAUNCH task # 65 (type SRCH) for 28 RERS17pb113-PT-1-CTLCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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RERS17pb113-PT-1-CTLCardinality-00: F 0 1 0 0 1 0 0 0
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RERS17pb113-PT-1-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
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RERS17pb113-PT-1-CTLCardinality-07: EG 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-08: CONJ 0 0 1 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-09: CONJ 2 2 2 0 3 0 0 0
RERS17pb113-PT-1-CTLCardinality-10: CTL 1 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-11: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-12: EGEF 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 AGEF EXCL 31/201 1/32 RERS17pb113-PT-1-CTLCardinality-08 3124 m, 112 m/sec, 3124 t fired, .
63 EF STEQ 0/1595 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara not yet started (preprocessing).
65 EF SRCH 0/3191 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 61 (type FNDP) for 28 RERS17pb113-PT-1-CTLCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: try reading problem file /home/mcc/execution/372/CTLCardinality-63.sara.
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RERS17pb113-PT-1-CTLCardinality-09: CONJ 0 6 3 0 3 0 0 0
RERS17pb113-PT-1-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-11: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-12: EGEF 1 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 AGEF EXCL 44/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 4939 m, 363 m/sec, 4940 t fired, .
61 EF FNDP 7/1585 0/5 RERS17pb113-PT-1-CTLCardinality-09 --
63 EF STEQ 13/1582 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
65 EF SRCH 13/1582 1/5 RERS17pb113-PT-1-CTLCardinality-09 --

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RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 AGEF EXCL 49/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 5377 m, 87 m/sec, 5378 t fired, .
61 EF FNDP 12/1581 0/5 RERS17pb113-PT-1-CTLCardinality-09 267 t fired, 1 attempts, .
63 EF STEQ 18/3174 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 5/1585 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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RERS17pb113-PT-1-CTLCardinality-09: CONJ 0 5 3 0 4 0 0 0
RERS17pb113-PT-1-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-11: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-12: EGEF 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-14: CTL 1 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 AGEF EXCL 54/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 5562 m, 37 m/sec, 5563 t fired, .
61 EF FNDP 17/1580 0/5 RERS17pb113-PT-1-CTLCardinality-09 585 t fired, 1 attempts, .
63 EF STEQ 23/3173 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 10/1584 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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RERS17pb113-PT-1-CTLCardinality-08: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-09: CONJ 0 5 3 0 4 0 0 0
RERS17pb113-PT-1-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-11: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-1-CTLCardinality-12: EGEF 0 1 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-14: CTL 1 0 0 0 1 0 0 0
RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
24 AGEF EXCL 59/189 1/32 RERS17pb113-PT-1-CTLCardinality-08 5741 m, 35 m/sec, 5742 t fired, .
61 EF FNDP 22/1575 0/5 RERS17pb113-PT-1-CTLCardinality-09 717 t fired, 1 attempts, .
63 EF STEQ 28/3168 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 15/1579 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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lola: fired transitions : 5844
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RERS17pb113-PT-1-CTLCardinality-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 2/210 1/32 RERS17pb113-PT-1-CTLCardinality-10 50 m, 10 m/sec, 100 t fired, .
61 EF FNDP 27/1566 0/5 RERS17pb113-PT-1-CTLCardinality-09 999 t fired, 1 attempts, .
63 EF STEQ 33/3159 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 20/1570 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 7/210 1/32 RERS17pb113-PT-1-CTLCardinality-10 50 m, 0 m/sec, 100 t fired, .
61 EF FNDP 32/1565 0/5 RERS17pb113-PT-1-CTLCardinality-09 1040 t fired, 1 attempts, .
63 EF STEQ 38/3158 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 25/1569 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 12/210 1/32 RERS17pb113-PT-1-CTLCardinality-10 789 m, 147 m/sec, 1577 t fired, .
61 EF FNDP 37/1560 0/5 RERS17pb113-PT-1-CTLCardinality-09 1127 t fired, 1 attempts, .
63 EF STEQ 43/3153 0/5 RERS17pb113-PT-1-CTLCardinality-09 sara is running.
66 EF FNDP 30/1564 0/5 RERS17pb113-PT-1-CTLCardinality-09 --

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 483 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
sara: place or transition ordering is non-deterministic

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-1"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RERS17pb113-PT-1, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199000001"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-1.tgz
mv RERS17pb113-PT-1 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;