fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r326-tall-167889198300394
Last Updated
May 14, 2023

About the Execution of LoLA for Railroad-PT-100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16193.596 3600000.00 1327041.00 9068.60 ?TFTTF?TFFTTT??T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r326-tall-167889198300394.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Railroad-PT-100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r326-tall-167889198300394
=====================================================================


--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.6M
-rw-r--r-- 1 mcc users 5.8K Feb 25 22:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 22:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 22:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K Feb 25 22:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 22:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 5.2M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-100-CTLFireability-00
FORMULA_NAME Railroad-PT-100-CTLFireability-01
FORMULA_NAME Railroad-PT-100-CTLFireability-02
FORMULA_NAME Railroad-PT-100-CTLFireability-03
FORMULA_NAME Railroad-PT-100-CTLFireability-04
FORMULA_NAME Railroad-PT-100-CTLFireability-05
FORMULA_NAME Railroad-PT-100-CTLFireability-06
FORMULA_NAME Railroad-PT-100-CTLFireability-07
FORMULA_NAME Railroad-PT-100-CTLFireability-08
FORMULA_NAME Railroad-PT-100-CTLFireability-09
FORMULA_NAME Railroad-PT-100-CTLFireability-10
FORMULA_NAME Railroad-PT-100-CTLFireability-11
FORMULA_NAME Railroad-PT-100-CTLFireability-12
FORMULA_NAME Railroad-PT-100-CTLFireability-13
FORMULA_NAME Railroad-PT-100-CTLFireability-14
FORMULA_NAME Railroad-PT-100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679044801098

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Railroad-PT-100
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Railroad-PT-100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA Railroad-PT-100-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Railroad-PT-100-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 241556 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16229672 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Rule S: 100 transitions removed,301 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 Railroad-PT-100-CTLFireability-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type CNST) for 28 Railroad-PT-100-CTLFireability-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 29 (type CNST) for Railroad-PT-100-CTLFireability-08
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type SKEL/FNDP) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 4 (type CNST) for Railroad-PT-100-CTLFireability-01
lola: result : true
lola: LAUNCH task # 56 (type SKEL/SRCH) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/SRCH) for Railroad-PT-100-CTLFireability-12
lola: result : unknown
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type SKEL/FNDP) for Railroad-PT-100-CTLFireability-12
lola: result : true
lola: fired transitions : 116
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for Railroad-PT-100-CTLFireability-12 (obsolete)
lola: CANCELED task # 55 (type SRCH) for Railroad-PT-100-CTLFireability-12 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-54.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 54 (type SKEL/EQUN) for Railroad-PT-100-CTLFireability-12
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type SKEL/FNDP) for 25 Railroad-PT-100-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 25 Railroad-PT-100-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 25 Railroad-PT-100-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 25 Railroad-PT-100-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type SKEL/SRCH) for Railroad-PT-100-CTLFireability-07
lola: result : unknown
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 60 (type SKEL/SRCH) for Railroad-PT-100-CTLFireability-07
lola: result : true
lola: markings : 22
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for Railroad-PT-100-CTLFireability-07 (obsolete)
lola: CANCELED task # 59 (type EQUN) for Railroad-PT-100-CTLFireability-07 (obsolete)
lola: FINISHED task # 58 (type SKEL/FNDP) for Railroad-PT-100-CTLFireability-07
lola: result : true
lola: fired transitions : 20
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-59.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: RELEASE

lola: FINISHED task # 59 (type SKEL/EQUN) for Railroad-PT-100-CTLFireability-07
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 64 (type SKEL/FNDP) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/SRCH) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/SRCH) for Railroad-PT-100-CTLFireability-09
lola: result : true
lola: markings : 144
lola: fired transitions : 143
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: CANCELED task # 65 (type EQUN) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: CANCELED task # 67 (type SRCH) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 64 (type SKEL/FNDP) for Railroad-PT-100-CTLFireability-09
lola: result : true
lola: fired transitions : 142
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-65.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type SKEL/SRCH) for 19 Railroad-PT-100-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/SRCH) for Railroad-PT-100-CTLFireability-05
lola: result : true
lola: markings : 197
lola: fired transitions : 196
lola: time used : 0.000000
lola: memory pages used : 1
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 65 (type SKEL/EQUN) for Railroad-PT-100-CTLFireability-09
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Railroad-PT-100-CTLFireability-01: INITIAL true preprocessing
Railroad-PT-100-CTLFireability-08: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Railroad-PT-100-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-03: DISJ 0 0 0 0 2 0 0 0
Railroad-PT-100-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-05: AXAG 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-07: EF 0 0 0 0 4 0 0 0
Railroad-PT-100-CTLFireability-09: AG 0 0 0 0 3 0 0 1
Railroad-PT-100-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-12: EF 0 0 0 0 3 0 0 1
Railroad-PT-100-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-15: EG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 12 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Railroad-PT-100-CTLFireability-01: INITIAL true preprocessing
Railroad-PT-100-CTLFireability-08: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Railroad-PT-100-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-03: DISJ 0 0 0 0 2 0 0 0
Railroad-PT-100-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-05: AXAG 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-07: EF 0 0 0 0 4 0 0 0
Railroad-PT-100-CTLFireability-09: AG 0 0 0 0 3 0 0 1
Railroad-PT-100-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-12: EF 0 0 0 0 3 0 0 1
Railroad-PT-100-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
Railroad-PT-100-CTLFireability-15: EG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 17 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type EXCL) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 71 (type FNDP) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type EQUN) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SRCH) for 31 Railroad-PT-100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
sara: try reading problem file /home/mcc/execution/CTLFireability-72.sara.
lola: FINISHED task # 73 (type EXCL) for Railroad-PT-100-CTLFireability-09
lola: result : true
lola: markings : 144
lola: fired transitions : 143
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: CANCELED task # 72 (type EQUN) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: CANCELED task # 74 (type SRCH) for Railroad-PT-100-CTLFireability-09 (obsolete)
lola: LAUNCH task # 77 (type EXCL) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 75 (type FNDP) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SRCH) for 40 Railroad-PT-100-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SRCH) for Railroad-PT-100-CTLFireability-09
lola: result : unknown
lola: time used : 2.000000
lola: memory pages used : 1
lola: FINISHED task # 71 (type FNDP) for Railroad-PT-100-CTLFireability-09
lola: result : true
lola: fired transitions : 142
lola: tried executions : 1
lola: time used : 2.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 78 (type SRCH) for Railroad-PT-100-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/CTLFireability-76.sara.
lola: FINISHED task # 77 (type EXCL) for Railroad-PT-100-CTLFireability-12
lola: result : true
lola: markings : 121
lola: fired transitions : 120
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for Railroad-PT-100-CTLFireability-12 (obsolete)
lola: CANCELED task # 76 (type EQUN) for Railroad-PT-100-CTLFireability-12 (obsolete)
lola: LAUNCH task # 38 (type EXCL) for 37 Railroad-PT-100-CTLFireability-11
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 76 (type EQUN) for Railroad-PT-100-CTLFireability-12
lola: result : unknown
lola: FINISHED task # 38 (type EXCL) for Railroad-PT-100-CTLFireability-11
lola: result : true
lola: markings : 42
lola: fired transitions : 84
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 75 (type FNDP) for Railroad-PT-100-CTLFireability-12
lola: result : unknown
lola: fired transitions : 80
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: LAUNCH task # 50 (type EXCL) for 49 Railroad-PT-100-CTLFireability-15
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 50 (type EXCL) for Railroad-PT-100-CTLFireability-15
lola: result : true
lola: markings : 12
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 Railroad-PT-100-CTLFireability-04
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Railroad-PT-100-CTLFireability-04
lola: result : true
lola: markings : 42
lola: fired transitions : 87
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 35 (type EXCL) for 34 Railroad-PT-100-CTLFireability-10
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 35 (type EXCL) for Railroad-PT-100-CTLFireability-10
lola: result : true
lola: markings : 45
lola: fired transitions : 90
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 12 (type EXCL) for 9 Railroad-PT-100-CTLFireability-03
lola: time limit : 447 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for Railroad-PT-100-CTLFireability-03
lola: result : true
lola: markings : 3982
lola: fired transitions : 4081
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Railroad-PT-100-CTLFireability-02
lola: time limit : 596 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Railroad-PT-100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r326-tall-167889198300394"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-100.tgz
mv Railroad-PT-100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;