About the Execution of LoLA for RERS17pb113-PT-7
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16219.052 | 3600000.00 | 10564103.00 | 25190.70 | FFFTFFTFF??FF?TF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r326-tall-167889197900052.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RERS17pb113-PT-7, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r326-tall-167889197900052
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 5.6K Feb 26 18:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Feb 26 18:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 18:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 18:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:38 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 18:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 133K Feb 26 18:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 18:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 18:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:38 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:38 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 15M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-00
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-01
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-02
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-03
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-04
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-05
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-06
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-07
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-08
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-09
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-10
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-11
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-12
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-13
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-14
FORMULA_NAME RERS17pb113-PT-7-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1678941679667
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb113-PT-7
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT RERS17pb113-PT-7
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability
FORMULA RERS17pb113-PT-7-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-7-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 180184 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16247716 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:409
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:518
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:427
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 11 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 16 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 21 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 26 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 31 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 36 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 41 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 46 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 51 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 56 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 61 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 66 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 71 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 76 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 81 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 86 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 91 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 96 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 101 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 106 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 111 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 116 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 121 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 126 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 131 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 136 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 141 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 146 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 151 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 156 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 161 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 166 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 171 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 176 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 181 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 186 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 191 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 196 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 201 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 206 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 105.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 211 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 216 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 221 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 226 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 19.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 231 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 236 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 241 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 246 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 251 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 260 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 29.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 265 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 270 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 275 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 280 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 285 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 290 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 295 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 33.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 300 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 305 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 310 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 315 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 320 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 325 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 0 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 330 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 64 (type EXCL) for 31 RERS17pb113-PT-7-LTLFireability-09
lola: time limit : 130 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 66 (type FNDP) for 3 RERS17pb113-PT-7-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 3 RERS17pb113-PT-7-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type SRCH) for 3 RERS17pb113-PT-7-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 2 3 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 1 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EG EXCL 3/130 1/32 RERS17pb113-PT-7-LTLFireability-09 --
66 EF FNDP 3/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 --
67 EF STEQ 3/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 sara not yet started (preprocessing).
69 EF SRCH 4/3268 1/5 RERS17pb113-PT-7-LTLFireability-01 --
Time elapsed: 336 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 2 3 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 1 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EG EXCL 9/130 1/32 RERS17pb113-PT-7-LTLFireability-09 --
66 EF FNDP 9/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 --
67 EF STEQ 9/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 sara is running.
69 EF SRCH 9/3268 1/5 RERS17pb113-PT-7-LTLFireability-01 --
Time elapsed: 341 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-01: CONJ 0 2 3 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 1 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EG EXCL 19/130 1/32 RERS17pb113-PT-7-LTLFireability-09 --
66 EF FNDP 19/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 --
67 EF STEQ 19/3268 0/5 RERS17pb113-PT-7-LTLFireability-01 sara is running.
69 EF SRCH 19/3268 1/5 RERS17pb113-PT-7-LTLFireability-01 --
Time elapsed: 351 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/LTLFireability-67.sara.
lola: FINISHED task # 64 (type EXCL) for RERS17pb113-PT-7-LTLFireability-09
lola: result : false
lola: markings : 1
lola: time used : 21.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 61 RERS17pb113-PT-7-LTLFireability-15
lola: time limit : 135 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type SRCH) for RERS17pb113-PT-7-LTLFireability-01
lola: result : unknown
lola: time used : 21.000000
lola: memory pages used : 1
lola: FINISHED task # 66 (type FNDP) for RERS17pb113-PT-7-LTLFireability-01
lola: result : true
lola: tried executions : 1
lola: time used : 22.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for RERS17pb113-PT-7-LTLFireability-01 (obsolete)
lola: FINISHED task # 67 (type EQUN) for RERS17pb113-PT-7-LTLFireability-01
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 3/147 1/32 RERS17pb113-PT-7-LTLFireability-15 54859 m, 10971 m/sec, 54858 t fired, .
Time elapsed: 356 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 8/147 3/32 RERS17pb113-PT-7-LTLFireability-15 146963 m, 18420 m/sec, 146962 t fired, .
Time elapsed: 361 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-15: LTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
62 LTL EXCL 13/147 5/32 RERS17pb113-PT-7-LTLFireability-15 292596 m, 29126 m/sec, 292595 t fired, .
Time elapsed: 366 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 62 (type EXCL) for RERS17pb113-PT-7-LTLFireability-15
lola: result : false
lola: markings : 334138
lola: fired transitions : 334138
lola: time used : 14.000000
lola: memory pages used : 6
lola: LAUNCH task # 57 (type EXCL) for 54 RERS17pb113-PT-7-LTLFireability-14
lola: time limit : 161 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for RERS17pb113-PT-7-LTLFireability-14
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 RERS17pb113-PT-7-LTLFireability-12
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: Created skeleton in 36.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 1 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 LTL EXCL 4/190 2/32 RERS17pb113-PT-7-LTLFireability-12 76000 m, 15200 m/sec, 76000 t fired, .
Time elapsed: 371 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-12: LTL 0 0 1 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 LTL EXCL 9/190 4/32 RERS17pb113-PT-7-LTLFireability-12 227063 m, 30212 m/sec, 227062 t fired, .
Time elapsed: 376 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 49 (type EXCL) for RERS17pb113-PT-7-LTLFireability-12
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 12.000000
lola: memory pages used : 6
lola: LAUNCH task # 46 (type EXCL) for 45 RERS17pb113-PT-7-LTLFireability-11
lola: time limit : 214 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 0 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 LTL EXCL 2/214 1/32 RERS17pb113-PT-7-LTLFireability-11 36652 m, 7330 m/sec, 36651 t fired, .
Time elapsed: 381 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 LTL EXCL 7/230 3/32 RERS17pb113-PT-7-LTLFireability-11 178878 m, 28445 m/sec, 178877 t fired, .
Time elapsed: 386 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 LTL EXCL 12/230 6/32 RERS17pb113-PT-7-LTLFireability-11 327001 m, 29624 m/sec, 327000 t fired, .
Time elapsed: 391 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 46 (type EXCL) for RERS17pb113-PT-7-LTLFireability-11
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 12.000000
lola: memory pages used : 6
lola: LAUNCH task # 29 (type EXCL) for 28 RERS17pb113-PT-7-LTLFireability-08
lola: time limit : 246 sec
lola: memory limit: 32 pages
lola: Created skeleton in 15.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 LTL EXCL 5/246 3/32 RERS17pb113-PT-7-LTLFireability-08 138179 m, 27635 m/sec, 138178 t fired, .
Time elapsed: 396 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 LTL EXCL 10/246 5/32 RERS17pb113-PT-7-LTLFireability-08 284843 m, 29332 m/sec, 284842 t fired, .
Time elapsed: 401 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 LTL EXCL 15/246 7/32 RERS17pb113-PT-7-LTLFireability-08 430310 m, 29093 m/sec, 430309 t fired, .
Time elapsed: 406 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
lola: Created skeleton in 12.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 LTL EXCL 20/246 9/32 RERS17pb113-PT-7-LTLFireability-08 574987 m, 28935 m/sec, 574986 t fired, .
Time elapsed: 411 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 29 (type EXCL) for RERS17pb113-PT-7-LTLFireability-08
lola: result : false
lola: markings : 668769
lola: fired transitions : 668769
lola: time used : 23.000000
lola: memory pages used : 11
lola: LAUNCH task # 26 (type EXCL) for 25 RERS17pb113-PT-7-LTLFireability-07
lola: time limit : 265 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 0 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 LTL EXCL 2/265 1/32 RERS17pb113-PT-7-LTLFireability-07 45269 m, 9053 m/sec, 45268 t fired, .
Time elapsed: 416 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: Created skeleton in 13.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-14: CONJ 0 1 0 0 3 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
26 LTL EXCL 7/265 4/32 RERS17pb113-PT-7-LTLFireability-07 194431 m, 29832 m/sec, 194430 t fired, .
Time elapsed: 421 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 26 (type EXCL) for RERS17pb113-PT-7-LTLFireability-07
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 11.000000
lola: memory pages used : 6
lola: LAUNCH task # 59 (type EXCL) for 54 RERS17pb113-PT-7-LTLFireability-14
lola: time limit : 288 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for RERS17pb113-PT-7-LTLFireability-14
lola: result : true
lola: markings : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 RERS17pb113-PT-7-LTLFireability-06
lola: time limit : 317 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for RERS17pb113-PT-7-LTLFireability-06
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 RERS17pb113-PT-7-LTLFireability-05
lola: time limit : 352 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 LTL EXCL 0/352 1/32 RERS17pb113-PT-7-LTLFireability-05 4098 m, 819 m/sec, 4098 t fired, .
Time elapsed: 426 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 LTL EXCL 5/352 3/32 RERS17pb113-PT-7-LTLFireability-05 151532 m, 29486 m/sec, 151531 t fired, .
Time elapsed: 431 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 LTL EXCL 10/352 5/32 RERS17pb113-PT-7-LTLFireability-05 302847 m, 30263 m/sec, 302847 t fired, .
Time elapsed: 436 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 20 (type EXCL) for RERS17pb113-PT-7-LTLFireability-05
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 11.000000
lola: memory pages used : 6
lola: LAUNCH task # 17 (type EXCL) for 16 RERS17pb113-PT-7-LTLFireability-04
lola: time limit : 395 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 LTL EXCL 4/395 2/32 RERS17pb113-PT-7-LTLFireability-04 111916 m, 22383 m/sec, 111915 t fired, .
Time elapsed: 441 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 LTL EXCL 9/395 5/32 RERS17pb113-PT-7-LTLFireability-04 264293 m, 30475 m/sec, 264293 t fired, .
Time elapsed: 446 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 17 (type EXCL) for RERS17pb113-PT-7-LTLFireability-04
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 11.000000
lola: memory pages used : 6
lola: LAUNCH task # 14 (type EXCL) for 13 RERS17pb113-PT-7-LTLFireability-03
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for RERS17pb113-PT-7-LTLFireability-03
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 RERS17pb113-PT-7-LTLFireability-02
lola: time limit : 525 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 LTL EXCL 3/525 2/32 RERS17pb113-PT-7-LTLFireability-02 66866 m, 13373 m/sec, 66865 t fired, .
Time elapsed: 451 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 LTL EXCL 8/525 4/32 RERS17pb113-PT-7-LTLFireability-02 209894 m, 28605 m/sec, 209893 t fired, .
Time elapsed: 456 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 11 (type EXCL) for RERS17pb113-PT-7-LTLFireability-02
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 12.000000
lola: memory pages used : 6
lola: LAUNCH task # 1 (type EXCL) for 0 RERS17pb113-PT-7-LTLFireability-00
lola: time limit : 628 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 1/628 1/32 RERS17pb113-PT-7-LTLFireability-00 21245 m, 4249 m/sec, 21244 t fired, .
Time elapsed: 461 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 6/628 3/32 RERS17pb113-PT-7-LTLFireability-00 171058 m, 29962 m/sec, 171057 t fired, .
Time elapsed: 466 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 11/628 6/32 RERS17pb113-PT-7-LTLFireability-00 324011 m, 30590 m/sec, 324010 t fired, .
Time elapsed: 471 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 1 (type EXCL) for RERS17pb113-PT-7-LTLFireability-00
lola: result : false
lola: markings : 334135
lola: fired transitions : 334135
lola: time used : 11.000000
lola: memory pages used : 6
lola: LAUNCH task # 41 (type EXCL) for 38 RERS17pb113-PT-7-LTLFireability-10
lola: time limit : 782 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 5/782 1/32 RERS17pb113-PT-7-LTLFireability-10 311 m, 62 m/sec, 310 t fired, .
Time elapsed: 476 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 10/782 1/32 RERS17pb113-PT-7-LTLFireability-10 686 m, 75 m/sec, 685 t fired, .
Time elapsed: 481 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 15/782 1/32 RERS17pb113-PT-7-LTLFireability-10 1064 m, 75 m/sec, 1063 t fired, .
Time elapsed: 486 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 20/782 1/32 RERS17pb113-PT-7-LTLFireability-10 1417 m, 70 m/sec, 1416 t fired, .
Time elapsed: 491 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 25/782 1/32 RERS17pb113-PT-7-LTLFireability-10 1805 m, 77 m/sec, 1804 t fired, .
Time elapsed: 496 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 30/782 1/32 RERS17pb113-PT-7-LTLFireability-10 2175 m, 74 m/sec, 2174 t fired, .
Time elapsed: 501 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 35/782 1/32 RERS17pb113-PT-7-LTLFireability-10 2560 m, 77 m/sec, 2559 t fired, .
Time elapsed: 506 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 40/782 1/32 RERS17pb113-PT-7-LTLFireability-10 2910 m, 70 m/sec, 2909 t fired, .
Time elapsed: 511 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 45/782 1/32 RERS17pb113-PT-7-LTLFireability-10 3282 m, 74 m/sec, 3281 t fired, .
Time elapsed: 516 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 50/782 1/32 RERS17pb113-PT-7-LTLFireability-10 3596 m, 62 m/sec, 3595 t fired, .
Time elapsed: 521 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 55/782 1/32 RERS17pb113-PT-7-LTLFireability-10 3980 m, 76 m/sec, 3979 t fired, .
Time elapsed: 526 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 60/782 1/32 RERS17pb113-PT-7-LTLFireability-10 4349 m, 73 m/sec, 4348 t fired, .
Time elapsed: 531 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 65/782 1/32 RERS17pb113-PT-7-LTLFireability-10 4740 m, 78 m/sec, 4739 t fired, .
Time elapsed: 536 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 70/782 1/32 RERS17pb113-PT-7-LTLFireability-10 5133 m, 78 m/sec, 5132 t fired, .
Time elapsed: 541 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 75/782 1/32 RERS17pb113-PT-7-LTLFireability-10 5537 m, 80 m/sec, 5536 t fired, .
Time elapsed: 546 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 80/782 1/32 RERS17pb113-PT-7-LTLFireability-10 5911 m, 74 m/sec, 5910 t fired, .
Time elapsed: 551 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 85/782 1/32 RERS17pb113-PT-7-LTLFireability-10 6291 m, 76 m/sec, 6290 t fired, .
Time elapsed: 556 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 90/782 1/32 RERS17pb113-PT-7-LTLFireability-10 6677 m, 77 m/sec, 6676 t fired, .
Time elapsed: 561 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 95/782 1/32 RERS17pb113-PT-7-LTLFireability-10 7057 m, 76 m/sec, 7056 t fired, .
Time elapsed: 566 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 100/782 1/32 RERS17pb113-PT-7-LTLFireability-10 7424 m, 73 m/sec, 7423 t fired, .
Time elapsed: 571 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 105/782 1/32 RERS17pb113-PT-7-LTLFireability-10 7810 m, 77 m/sec, 7809 t fired, .
Time elapsed: 576 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 110/782 1/32 RERS17pb113-PT-7-LTLFireability-10 8163 m, 70 m/sec, 8162 t fired, .
Time elapsed: 581 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 115/782 1/32 RERS17pb113-PT-7-LTLFireability-10 8446 m, 56 m/sec, 8445 t fired, .
Time elapsed: 586 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 120/782 1/32 RERS17pb113-PT-7-LTLFireability-10 8735 m, 57 m/sec, 8734 t fired, .
Time elapsed: 591 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 125/782 1/32 RERS17pb113-PT-7-LTLFireability-10 9123 m, 77 m/sec, 9122 t fired, .
Time elapsed: 596 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 130/782 1/32 RERS17pb113-PT-7-LTLFireability-10 9492 m, 73 m/sec, 9491 t fired, .
Time elapsed: 601 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 135/782 1/32 RERS17pb113-PT-7-LTLFireability-10 9840 m, 69 m/sec, 9839 t fired, .
Time elapsed: 606 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 140/782 1/32 RERS17pb113-PT-7-LTLFireability-10 10239 m, 79 m/sec, 10238 t fired, .
Time elapsed: 611 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 145/782 1/32 RERS17pb113-PT-7-LTLFireability-10 10640 m, 80 m/sec, 10639 t fired, .
Time elapsed: 616 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 150/782 1/32 RERS17pb113-PT-7-LTLFireability-10 11034 m, 78 m/sec, 11033 t fired, .
Time elapsed: 621 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 155/782 1/32 RERS17pb113-PT-7-LTLFireability-10 11456 m, 84 m/sec, 11455 t fired, .
Time elapsed: 626 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 160/782 1/32 RERS17pb113-PT-7-LTLFireability-10 11825 m, 73 m/sec, 11824 t fired, .
Time elapsed: 631 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 165/782 1/32 RERS17pb113-PT-7-LTLFireability-10 12219 m, 78 m/sec, 12218 t fired, .
Time elapsed: 636 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 170/782 1/32 RERS17pb113-PT-7-LTLFireability-10 12622 m, 80 m/sec, 12621 t fired, .
Time elapsed: 641 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 175/782 1/32 RERS17pb113-PT-7-LTLFireability-10 13022 m, 80 m/sec, 13021 t fired, .
Time elapsed: 646 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 180/782 1/32 RERS17pb113-PT-7-LTLFireability-10 13420 m, 79 m/sec, 13419 t fired, .
Time elapsed: 651 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 185/782 1/32 RERS17pb113-PT-7-LTLFireability-10 13833 m, 82 m/sec, 13832 t fired, .
Time elapsed: 656 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 190/782 1/32 RERS17pb113-PT-7-LTLFireability-10 14232 m, 79 m/sec, 14231 t fired, .
Time elapsed: 661 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 195/782 1/32 RERS17pb113-PT-7-LTLFireability-10 14639 m, 81 m/sec, 14638 t fired, .
Time elapsed: 666 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 200/782 1/32 RERS17pb113-PT-7-LTLFireability-10 15009 m, 74 m/sec, 15008 t fired, .
Time elapsed: 671 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 205/782 1/32 RERS17pb113-PT-7-LTLFireability-10 15402 m, 78 m/sec, 15401 t fired, .
Time elapsed: 676 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 210/782 1/32 RERS17pb113-PT-7-LTLFireability-10 15811 m, 81 m/sec, 15810 t fired, .
Time elapsed: 681 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 215/782 1/32 RERS17pb113-PT-7-LTLFireability-10 16204 m, 78 m/sec, 16203 t fired, .
Time elapsed: 686 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 220/782 1/32 RERS17pb113-PT-7-LTLFireability-10 16564 m, 72 m/sec, 16563 t fired, .
Time elapsed: 691 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 225/782 1/32 RERS17pb113-PT-7-LTLFireability-10 16934 m, 74 m/sec, 16933 t fired, .
Time elapsed: 696 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 230/782 1/32 RERS17pb113-PT-7-LTLFireability-10 17327 m, 78 m/sec, 17326 t fired, .
Time elapsed: 701 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 235/782 1/32 RERS17pb113-PT-7-LTLFireability-10 17715 m, 77 m/sec, 17714 t fired, .
Time elapsed: 706 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 240/782 1/32 RERS17pb113-PT-7-LTLFireability-10 18104 m, 77 m/sec, 18103 t fired, .
Time elapsed: 711 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 245/782 1/32 RERS17pb113-PT-7-LTLFireability-10 18395 m, 58 m/sec, 18394 t fired, .
Time elapsed: 716 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 250/782 1/32 RERS17pb113-PT-7-LTLFireability-10 18762 m, 73 m/sec, 18761 t fired, .
Time elapsed: 721 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 255/782 1/32 RERS17pb113-PT-7-LTLFireability-10 19170 m, 81 m/sec, 19169 t fired, .
Time elapsed: 726 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 260/782 1/32 RERS17pb113-PT-7-LTLFireability-10 19551 m, 76 m/sec, 19550 t fired, .
Time elapsed: 731 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 265/782 1/32 RERS17pb113-PT-7-LTLFireability-10 19924 m, 74 m/sec, 19923 t fired, .
Time elapsed: 736 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 270/782 1/32 RERS17pb113-PT-7-LTLFireability-10 20308 m, 76 m/sec, 20307 t fired, .
Time elapsed: 741 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 275/782 1/32 RERS17pb113-PT-7-LTLFireability-10 20664 m, 71 m/sec, 20663 t fired, .
Time elapsed: 746 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 280/782 1/32 RERS17pb113-PT-7-LTLFireability-10 21035 m, 74 m/sec, 21034 t fired, .
Time elapsed: 751 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 285/782 1/32 RERS17pb113-PT-7-LTLFireability-10 21424 m, 77 m/sec, 21423 t fired, .
Time elapsed: 756 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 290/782 1/32 RERS17pb113-PT-7-LTLFireability-10 21764 m, 68 m/sec, 21763 t fired, .
Time elapsed: 761 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 295/782 1/32 RERS17pb113-PT-7-LTLFireability-10 22119 m, 71 m/sec, 22118 t fired, .
Time elapsed: 766 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 300/782 1/32 RERS17pb113-PT-7-LTLFireability-10 22506 m, 77 m/sec, 22505 t fired, .
Time elapsed: 771 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 305/782 1/32 RERS17pb113-PT-7-LTLFireability-10 22835 m, 65 m/sec, 22834 t fired, .
Time elapsed: 776 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 310/782 1/32 RERS17pb113-PT-7-LTLFireability-10 23206 m, 74 m/sec, 23205 t fired, .
Time elapsed: 781 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 315/782 1/32 RERS17pb113-PT-7-LTLFireability-10 23589 m, 76 m/sec, 23588 t fired, .
Time elapsed: 786 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 320/782 1/32 RERS17pb113-PT-7-LTLFireability-10 23907 m, 63 m/sec, 23906 t fired, .
Time elapsed: 791 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 325/782 1/32 RERS17pb113-PT-7-LTLFireability-10 24285 m, 75 m/sec, 24284 t fired, .
Time elapsed: 796 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 330/782 1/32 RERS17pb113-PT-7-LTLFireability-10 24663 m, 75 m/sec, 24662 t fired, .
Time elapsed: 801 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 335/782 1/32 RERS17pb113-PT-7-LTLFireability-10 25073 m, 82 m/sec, 25072 t fired, .
Time elapsed: 806 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 340/782 1/32 RERS17pb113-PT-7-LTLFireability-10 25488 m, 83 m/sec, 25487 t fired, .
Time elapsed: 811 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 345/782 1/32 RERS17pb113-PT-7-LTLFireability-10 25896 m, 81 m/sec, 25895 t fired, .
Time elapsed: 816 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 350/782 1/32 RERS17pb113-PT-7-LTLFireability-10 26287 m, 78 m/sec, 26286 t fired, .
Time elapsed: 821 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 355/782 1/32 RERS17pb113-PT-7-LTLFireability-10 26657 m, 74 m/sec, 26656 t fired, .
Time elapsed: 826 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 360/782 1/32 RERS17pb113-PT-7-LTLFireability-10 27061 m, 80 m/sec, 27060 t fired, .
Time elapsed: 831 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 365/782 1/32 RERS17pb113-PT-7-LTLFireability-10 27473 m, 82 m/sec, 27472 t fired, .
Time elapsed: 836 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 370/782 1/32 RERS17pb113-PT-7-LTLFireability-10 27894 m, 84 m/sec, 27893 t fired, .
Time elapsed: 841 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 375/782 1/32 RERS17pb113-PT-7-LTLFireability-10 28337 m, 88 m/sec, 28336 t fired, .
Time elapsed: 846 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 380/782 1/32 RERS17pb113-PT-7-LTLFireability-10 28750 m, 82 m/sec, 28749 t fired, .
Time elapsed: 851 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 385/782 1/32 RERS17pb113-PT-7-LTLFireability-10 29161 m, 82 m/sec, 29160 t fired, .
Time elapsed: 856 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 390/782 1/32 RERS17pb113-PT-7-LTLFireability-10 29595 m, 86 m/sec, 29594 t fired, .
Time elapsed: 861 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 395/782 1/32 RERS17pb113-PT-7-LTLFireability-10 30008 m, 82 m/sec, 30007 t fired, .
Time elapsed: 866 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 400/782 1/32 RERS17pb113-PT-7-LTLFireability-10 30427 m, 83 m/sec, 30426 t fired, .
Time elapsed: 871 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 405/782 1/32 RERS17pb113-PT-7-LTLFireability-10 30846 m, 83 m/sec, 30845 t fired, .
Time elapsed: 876 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 410/782 1/32 RERS17pb113-PT-7-LTLFireability-10 31299 m, 90 m/sec, 31298 t fired, .
Time elapsed: 881 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 415/782 1/32 RERS17pb113-PT-7-LTLFireability-10 31704 m, 81 m/sec, 31703 t fired, .
Time elapsed: 886 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 420/782 1/32 RERS17pb113-PT-7-LTLFireability-10 32105 m, 80 m/sec, 32104 t fired, .
Time elapsed: 891 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 425/782 1/32 RERS17pb113-PT-7-LTLFireability-10 32513 m, 81 m/sec, 32512 t fired, .
Time elapsed: 896 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 430/782 1/32 RERS17pb113-PT-7-LTLFireability-10 32930 m, 83 m/sec, 32929 t fired, .
Time elapsed: 901 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 435/782 1/32 RERS17pb113-PT-7-LTLFireability-10 33384 m, 90 m/sec, 33383 t fired, .
Time elapsed: 906 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 440/782 1/32 RERS17pb113-PT-7-LTLFireability-10 33826 m, 88 m/sec, 33825 t fired, .
Time elapsed: 911 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 445/782 1/32 RERS17pb113-PT-7-LTLFireability-10 34282 m, 91 m/sec, 34281 t fired, .
Time elapsed: 916 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 450/782 1/32 RERS17pb113-PT-7-LTLFireability-10 34719 m, 87 m/sec, 34718 t fired, .
Time elapsed: 921 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 455/782 1/32 RERS17pb113-PT-7-LTLFireability-10 35139 m, 84 m/sec, 35138 t fired, .
Time elapsed: 926 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 460/782 1/32 RERS17pb113-PT-7-LTLFireability-10 35555 m, 83 m/sec, 35554 t fired, .
Time elapsed: 931 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 465/782 1/32 RERS17pb113-PT-7-LTLFireability-10 36001 m, 89 m/sec, 36000 t fired, .
Time elapsed: 936 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 470/782 1/32 RERS17pb113-PT-7-LTLFireability-10 36403 m, 80 m/sec, 36402 t fired, .
Time elapsed: 941 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 475/782 1/32 RERS17pb113-PT-7-LTLFireability-10 36832 m, 85 m/sec, 36831 t fired, .
Time elapsed: 946 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 480/782 1/32 RERS17pb113-PT-7-LTLFireability-10 37254 m, 84 m/sec, 37253 t fired, .
Time elapsed: 951 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 485/782 1/32 RERS17pb113-PT-7-LTLFireability-10 37663 m, 81 m/sec, 37662 t fired, .
Time elapsed: 956 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 490/782 1/32 RERS17pb113-PT-7-LTLFireability-10 38062 m, 79 m/sec, 38061 t fired, .
Time elapsed: 961 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 495/782 1/32 RERS17pb113-PT-7-LTLFireability-10 38456 m, 78 m/sec, 38455 t fired, .
Time elapsed: 966 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 500/782 1/32 RERS17pb113-PT-7-LTLFireability-10 38867 m, 82 m/sec, 38866 t fired, .
Time elapsed: 971 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 505/782 1/32 RERS17pb113-PT-7-LTLFireability-10 39283 m, 83 m/sec, 39282 t fired, .
Time elapsed: 976 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 510/782 1/32 RERS17pb113-PT-7-LTLFireability-10 39688 m, 81 m/sec, 39687 t fired, .
Time elapsed: 981 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 515/782 1/32 RERS17pb113-PT-7-LTLFireability-10 40070 m, 76 m/sec, 40069 t fired, .
Time elapsed: 986 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 520/782 1/32 RERS17pb113-PT-7-LTLFireability-10 40505 m, 87 m/sec, 40504 t fired, .
Time elapsed: 991 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 525/782 1/32 RERS17pb113-PT-7-LTLFireability-10 40944 m, 87 m/sec, 40943 t fired, .
Time elapsed: 996 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 530/782 1/32 RERS17pb113-PT-7-LTLFireability-10 41398 m, 90 m/sec, 41397 t fired, .
Time elapsed: 1001 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 535/782 1/32 RERS17pb113-PT-7-LTLFireability-10 41835 m, 87 m/sec, 41834 t fired, .
Time elapsed: 1006 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 540/782 1/32 RERS17pb113-PT-7-LTLFireability-10 42282 m, 89 m/sec, 42281 t fired, .
Time elapsed: 1011 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 545/782 1/32 RERS17pb113-PT-7-LTLFireability-10 42690 m, 81 m/sec, 42689 t fired, .
Time elapsed: 1016 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 550/782 1/32 RERS17pb113-PT-7-LTLFireability-10 43102 m, 82 m/sec, 43101 t fired, .
Time elapsed: 1021 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 555/782 1/32 RERS17pb113-PT-7-LTLFireability-10 43552 m, 90 m/sec, 43551 t fired, .
Time elapsed: 1026 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 560/782 1/32 RERS17pb113-PT-7-LTLFireability-10 44004 m, 90 m/sec, 44003 t fired, .
Time elapsed: 1031 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 565/782 1/32 RERS17pb113-PT-7-LTLFireability-10 44440 m, 87 m/sec, 44439 t fired, .
Time elapsed: 1036 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 570/782 1/32 RERS17pb113-PT-7-LTLFireability-10 44866 m, 85 m/sec, 44865 t fired, .
Time elapsed: 1041 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 575/782 1/32 RERS17pb113-PT-7-LTLFireability-10 45287 m, 84 m/sec, 45286 t fired, .
Time elapsed: 1046 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 580/782 1/32 RERS17pb113-PT-7-LTLFireability-10 45706 m, 83 m/sec, 45705 t fired, .
Time elapsed: 1051 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 585/782 1/32 RERS17pb113-PT-7-LTLFireability-10 46128 m, 84 m/sec, 46127 t fired, .
Time elapsed: 1056 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 590/782 1/32 RERS17pb113-PT-7-LTLFireability-10 46566 m, 87 m/sec, 46565 t fired, .
Time elapsed: 1061 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 595/782 1/32 RERS17pb113-PT-7-LTLFireability-10 46995 m, 85 m/sec, 46994 t fired, .
Time elapsed: 1066 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 600/782 1/32 RERS17pb113-PT-7-LTLFireability-10 47415 m, 84 m/sec, 47414 t fired, .
Time elapsed: 1071 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 605/782 1/32 RERS17pb113-PT-7-LTLFireability-10 47837 m, 84 m/sec, 47836 t fired, .
Time elapsed: 1076 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 610/782 1/32 RERS17pb113-PT-7-LTLFireability-10 48291 m, 90 m/sec, 48290 t fired, .
Time elapsed: 1081 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 615/782 1/32 RERS17pb113-PT-7-LTLFireability-10 48702 m, 82 m/sec, 48701 t fired, .
Time elapsed: 1086 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 620/782 1/32 RERS17pb113-PT-7-LTLFireability-10 49121 m, 83 m/sec, 49120 t fired, .
Time elapsed: 1091 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 625/782 1/32 RERS17pb113-PT-7-LTLFireability-10 49548 m, 85 m/sec, 49547 t fired, .
Time elapsed: 1096 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 630/782 1/32 RERS17pb113-PT-7-LTLFireability-10 49979 m, 86 m/sec, 49978 t fired, .
Time elapsed: 1101 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 635/782 1/32 RERS17pb113-PT-7-LTLFireability-10 50390 m, 82 m/sec, 50389 t fired, .
Time elapsed: 1106 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 640/782 1/32 RERS17pb113-PT-7-LTLFireability-10 50791 m, 80 m/sec, 50790 t fired, .
Time elapsed: 1111 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 645/782 1/32 RERS17pb113-PT-7-LTLFireability-10 51185 m, 78 m/sec, 51184 t fired, .
Time elapsed: 1116 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 650/782 1/32 RERS17pb113-PT-7-LTLFireability-10 51587 m, 80 m/sec, 51586 t fired, .
Time elapsed: 1121 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 655/782 1/32 RERS17pb113-PT-7-LTLFireability-10 51997 m, 82 m/sec, 51996 t fired, .
Time elapsed: 1126 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 660/782 1/32 RERS17pb113-PT-7-LTLFireability-10 52371 m, 74 m/sec, 52370 t fired, .
Time elapsed: 1131 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 665/782 1/32 RERS17pb113-PT-7-LTLFireability-10 52779 m, 81 m/sec, 52778 t fired, .
Time elapsed: 1136 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 670/782 1/32 RERS17pb113-PT-7-LTLFireability-10 53180 m, 80 m/sec, 53179 t fired, .
Time elapsed: 1141 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 675/782 1/32 RERS17pb113-PT-7-LTLFireability-10 53584 m, 80 m/sec, 53583 t fired, .
Time elapsed: 1146 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 680/782 1/32 RERS17pb113-PT-7-LTLFireability-10 53976 m, 78 m/sec, 53975 t fired, .
Time elapsed: 1151 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 685/782 1/32 RERS17pb113-PT-7-LTLFireability-10 54355 m, 75 m/sec, 54354 t fired, .
Time elapsed: 1156 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 690/782 1/32 RERS17pb113-PT-7-LTLFireability-10 54762 m, 81 m/sec, 54761 t fired, .
Time elapsed: 1161 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 695/782 1/32 RERS17pb113-PT-7-LTLFireability-10 55162 m, 80 m/sec, 55161 t fired, .
Time elapsed: 1166 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 700/782 1/32 RERS17pb113-PT-7-LTLFireability-10 55562 m, 80 m/sec, 55561 t fired, .
Time elapsed: 1171 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 705/782 1/32 RERS17pb113-PT-7-LTLFireability-10 55947 m, 77 m/sec, 55946 t fired, .
Time elapsed: 1176 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 710/782 1/32 RERS17pb113-PT-7-LTLFireability-10 56325 m, 75 m/sec, 56324 t fired, .
Time elapsed: 1181 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 715/782 1/32 RERS17pb113-PT-7-LTLFireability-10 56714 m, 77 m/sec, 56713 t fired, .
Time elapsed: 1186 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 720/782 1/32 RERS17pb113-PT-7-LTLFireability-10 57110 m, 79 m/sec, 57109 t fired, .
Time elapsed: 1191 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 725/782 1/32 RERS17pb113-PT-7-LTLFireability-10 57506 m, 79 m/sec, 57505 t fired, .
Time elapsed: 1196 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 730/782 1/32 RERS17pb113-PT-7-LTLFireability-10 57915 m, 81 m/sec, 57914 t fired, .
Time elapsed: 1201 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 735/782 1/32 RERS17pb113-PT-7-LTLFireability-10 58305 m, 78 m/sec, 58304 t fired, .
Time elapsed: 1206 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 740/782 1/32 RERS17pb113-PT-7-LTLFireability-10 58671 m, 73 m/sec, 58670 t fired, .
Time elapsed: 1211 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 745/782 1/32 RERS17pb113-PT-7-LTLFireability-10 59082 m, 82 m/sec, 59081 t fired, .
Time elapsed: 1216 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 750/782 1/32 RERS17pb113-PT-7-LTLFireability-10 59460 m, 75 m/sec, 59459 t fired, .
Time elapsed: 1221 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 755/782 1/32 RERS17pb113-PT-7-LTLFireability-10 59877 m, 83 m/sec, 59876 t fired, .
Time elapsed: 1226 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 760/782 1/32 RERS17pb113-PT-7-LTLFireability-10 60289 m, 82 m/sec, 60288 t fired, .
Time elapsed: 1231 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 765/782 1/32 RERS17pb113-PT-7-LTLFireability-10 60719 m, 86 m/sec, 60718 t fired, .
Time elapsed: 1236 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 770/782 1/32 RERS17pb113-PT-7-LTLFireability-10 61165 m, 89 m/sec, 61164 t fired, .
Time elapsed: 1241 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 775/782 1/32 RERS17pb113-PT-7-LTLFireability-10 61641 m, 95 m/sec, 61640 t fired, .
Time elapsed: 1246 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 780/782 1/32 RERS17pb113-PT-7-LTLFireability-10 62077 m, 87 m/sec, 62076 t fired, .
Time elapsed: 1251 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL) for RERS17pb113-PT-7-LTLFireability-10 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 0 0 2 1 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 1256 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 51 RERS17pb113-PT-7-LTLFireability-13
lola: time limit : 781 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 41 (type EXCL) for 38 RERS17pb113-PT-7-LTLFireability-10
lola: time limit : 2344 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 5/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 412 m, -12333 m/sec, 411 t fired, .
52 LTL EXCL 5/781 1/32 RERS17pb113-PT-7-LTLFireability-13 378 m, 75 m/sec, 377 t fired, .
Time elapsed: 1261 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 10/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 837 m, 85 m/sec, 836 t fired, .
52 LTL EXCL 10/586 1/32 RERS17pb113-PT-7-LTLFireability-13 733 m, 71 m/sec, 732 t fired, .
Time elapsed: 1266 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 15/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 1263 m, 85 m/sec, 1262 t fired, .
52 LTL EXCL 15/586 1/32 RERS17pb113-PT-7-LTLFireability-13 1128 m, 79 m/sec, 1127 t fired, .
Time elapsed: 1271 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 20/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 1682 m, 83 m/sec, 1681 t fired, .
52 LTL EXCL 20/586 1/32 RERS17pb113-PT-7-LTLFireability-13 1522 m, 78 m/sec, 1521 t fired, .
Time elapsed: 1276 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 25/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 2093 m, 82 m/sec, 2092 t fired, .
52 LTL EXCL 25/586 1/32 RERS17pb113-PT-7-LTLFireability-13 1918 m, 79 m/sec, 1917 t fired, .
Time elapsed: 1281 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 30/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 2532 m, 87 m/sec, 2531 t fired, .
52 LTL EXCL 30/586 1/32 RERS17pb113-PT-7-LTLFireability-13 2315 m, 79 m/sec, 2314 t fired, .
Time elapsed: 1286 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 35/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 2937 m, 81 m/sec, 2936 t fired, .
52 LTL EXCL 35/586 1/32 RERS17pb113-PT-7-LTLFireability-13 2694 m, 75 m/sec, 2693 t fired, .
Time elapsed: 1291 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 40/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 3358 m, 84 m/sec, 3357 t fired, .
52 LTL EXCL 40/586 1/32 RERS17pb113-PT-7-LTLFireability-13 3076 m, 76 m/sec, 3075 t fired, .
Time elapsed: 1296 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 45/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 3729 m, 74 m/sec, 3728 t fired, .
52 LTL EXCL 45/586 1/32 RERS17pb113-PT-7-LTLFireability-13 3480 m, 80 m/sec, 3479 t fired, .
Time elapsed: 1301 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 50/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 4174 m, 89 m/sec, 4173 t fired, .
52 LTL EXCL 50/586 1/32 RERS17pb113-PT-7-LTLFireability-13 3893 m, 82 m/sec, 3892 t fired, .
Time elapsed: 1306 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 55/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 4603 m, 85 m/sec, 4602 t fired, .
52 LTL EXCL 55/586 1/32 RERS17pb113-PT-7-LTLFireability-13 4307 m, 82 m/sec, 4306 t fired, .
Time elapsed: 1311 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 60/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 5050 m, 89 m/sec, 5049 t fired, .
52 LTL EXCL 60/586 1/32 RERS17pb113-PT-7-LTLFireability-13 4677 m, 74 m/sec, 4676 t fired, .
Time elapsed: 1316 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 65/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 5512 m, 92 m/sec, 5511 t fired, .
52 LTL EXCL 65/586 1/32 RERS17pb113-PT-7-LTLFireability-13 5076 m, 79 m/sec, 5075 t fired, .
Time elapsed: 1321 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 70/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 5949 m, 87 m/sec, 5948 t fired, .
52 LTL EXCL 70/586 1/32 RERS17pb113-PT-7-LTLFireability-13 5480 m, 80 m/sec, 5479 t fired, .
Time elapsed: 1326 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 75/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 6379 m, 86 m/sec, 6378 t fired, .
52 LTL EXCL 75/586 1/32 RERS17pb113-PT-7-LTLFireability-13 5895 m, 83 m/sec, 5894 t fired, .
Time elapsed: 1331 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 80/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 6824 m, 89 m/sec, 6823 t fired, .
52 LTL EXCL 80/586 1/32 RERS17pb113-PT-7-LTLFireability-13 6304 m, 81 m/sec, 6303 t fired, .
Time elapsed: 1336 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 85/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 7229 m, 81 m/sec, 7228 t fired, .
52 LTL EXCL 85/586 1/32 RERS17pb113-PT-7-LTLFireability-13 6715 m, 82 m/sec, 6714 t fired, .
Time elapsed: 1341 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 90/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 7678 m, 89 m/sec, 7677 t fired, .
52 LTL EXCL 90/586 1/32 RERS17pb113-PT-7-LTLFireability-13 7136 m, 84 m/sec, 7135 t fired, .
Time elapsed: 1346 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 95/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 8062 m, 76 m/sec, 8061 t fired, .
52 LTL EXCL 95/586 1/32 RERS17pb113-PT-7-LTLFireability-13 7546 m, 82 m/sec, 7545 t fired, .
Time elapsed: 1351 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 100/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 8425 m, 72 m/sec, 8424 t fired, .
52 LTL EXCL 100/586 1/32 RERS17pb113-PT-7-LTLFireability-13 7930 m, 76 m/sec, 7929 t fired, .
Time elapsed: 1356 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 105/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 8732 m, 61 m/sec, 8731 t fired, .
52 LTL EXCL 105/586 1/32 RERS17pb113-PT-7-LTLFireability-13 8313 m, 76 m/sec, 8312 t fired, .
Time elapsed: 1361 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 110/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 9169 m, 87 m/sec, 9168 t fired, .
52 LTL EXCL 110/586 1/32 RERS17pb113-PT-7-LTLFireability-13 8713 m, 80 m/sec, 8712 t fired, .
Time elapsed: 1366 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 115/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 9581 m, 82 m/sec, 9580 t fired, .
52 LTL EXCL 115/586 1/32 RERS17pb113-PT-7-LTLFireability-13 9113 m, 80 m/sec, 9112 t fired, .
Time elapsed: 1371 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 120/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 9980 m, 79 m/sec, 9979 t fired, .
52 LTL EXCL 120/586 1/32 RERS17pb113-PT-7-LTLFireability-13 9518 m, 81 m/sec, 9517 t fired, .
Time elapsed: 1376 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 125/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 10419 m, 87 m/sec, 10418 t fired, .
52 LTL EXCL 125/586 1/32 RERS17pb113-PT-7-LTLFireability-13 9915 m, 79 m/sec, 9914 t fired, .
Time elapsed: 1381 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 130/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 10862 m, 88 m/sec, 10861 t fired, .
52 LTL EXCL 130/586 1/32 RERS17pb113-PT-7-LTLFireability-13 10317 m, 80 m/sec, 10316 t fired, .
Time elapsed: 1386 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 135/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 11332 m, 94 m/sec, 11331 t fired, .
52 LTL EXCL 135/586 1/32 RERS17pb113-PT-7-LTLFireability-13 10727 m, 82 m/sec, 10726 t fired, .
Time elapsed: 1391 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 140/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 11739 m, 81 m/sec, 11738 t fired, .
52 LTL EXCL 140/586 1/32 RERS17pb113-PT-7-LTLFireability-13 11129 m, 80 m/sec, 11128 t fired, .
Time elapsed: 1396 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 145/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 12185 m, 89 m/sec, 12184 t fired, .
52 LTL EXCL 145/586 1/32 RERS17pb113-PT-7-LTLFireability-13 11564 m, 87 m/sec, 11563 t fired, .
Time elapsed: 1401 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 150/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 12638 m, 90 m/sec, 12637 t fired, .
52 LTL EXCL 150/586 1/32 RERS17pb113-PT-7-LTLFireability-13 11955 m, 78 m/sec, 11954 t fired, .
Time elapsed: 1406 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 155/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 13083 m, 89 m/sec, 13082 t fired, .
52 LTL EXCL 155/586 1/32 RERS17pb113-PT-7-LTLFireability-13 12361 m, 81 m/sec, 12360 t fired, .
Time elapsed: 1411 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 160/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 13532 m, 89 m/sec, 13531 t fired, .
52 LTL EXCL 160/586 1/32 RERS17pb113-PT-7-LTLFireability-13 12777 m, 83 m/sec, 12776 t fired, .
Time elapsed: 1416 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 165/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 13985 m, 90 m/sec, 13984 t fired, .
52 LTL EXCL 165/586 1/32 RERS17pb113-PT-7-LTLFireability-13 13197 m, 84 m/sec, 13196 t fired, .
Time elapsed: 1421 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 170/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 14449 m, 92 m/sec, 14448 t fired, .
52 LTL EXCL 170/586 1/32 RERS17pb113-PT-7-LTLFireability-13 13621 m, 84 m/sec, 13620 t fired, .
Time elapsed: 1426 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 175/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 14868 m, 83 m/sec, 14867 t fired, .
52 LTL EXCL 175/586 1/32 RERS17pb113-PT-7-LTLFireability-13 14025 m, 80 m/sec, 14024 t fired, .
Time elapsed: 1431 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 180/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 15291 m, 84 m/sec, 15290 t fired, .
52 LTL EXCL 180/586 1/32 RERS17pb113-PT-7-LTLFireability-13 14429 m, 80 m/sec, 14428 t fired, .
Time elapsed: 1436 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 185/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 15745 m, 90 m/sec, 15744 t fired, .
52 LTL EXCL 185/586 1/32 RERS17pb113-PT-7-LTLFireability-13 14840 m, 82 m/sec, 14839 t fired, .
Time elapsed: 1441 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 190/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 16185 m, 88 m/sec, 16184 t fired, .
52 LTL EXCL 190/586 1/32 RERS17pb113-PT-7-LTLFireability-13 15256 m, 83 m/sec, 15255 t fired, .
Time elapsed: 1446 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 195/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 16611 m, 85 m/sec, 16610 t fired, .
52 LTL EXCL 195/586 1/32 RERS17pb113-PT-7-LTLFireability-13 15664 m, 81 m/sec, 15663 t fired, .
Time elapsed: 1451 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 200/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 17047 m, 87 m/sec, 17046 t fired, .
52 LTL EXCL 200/586 1/32 RERS17pb113-PT-7-LTLFireability-13 16064 m, 80 m/sec, 16063 t fired, .
Time elapsed: 1456 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 205/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 17490 m, 88 m/sec, 17489 t fired, .
52 LTL EXCL 205/586 1/32 RERS17pb113-PT-7-LTLFireability-13 16492 m, 85 m/sec, 16491 t fired, .
Time elapsed: 1461 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 210/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 17944 m, 90 m/sec, 17943 t fired, .
52 LTL EXCL 210/586 1/32 RERS17pb113-PT-7-LTLFireability-13 16908 m, 83 m/sec, 16907 t fired, .
Time elapsed: 1466 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 215/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 18311 m, 73 m/sec, 18310 t fired, .
52 LTL EXCL 215/586 1/32 RERS17pb113-PT-7-LTLFireability-13 17325 m, 83 m/sec, 17324 t fired, .
Time elapsed: 1471 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 220/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 18742 m, 86 m/sec, 18741 t fired, .
52 LTL EXCL 220/586 1/32 RERS17pb113-PT-7-LTLFireability-13 17737 m, 82 m/sec, 17736 t fired, .
Time elapsed: 1476 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 225/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 19228 m, 97 m/sec, 19227 t fired, .
52 LTL EXCL 225/586 1/32 RERS17pb113-PT-7-LTLFireability-13 18145 m, 81 m/sec, 18144 t fired, .
Time elapsed: 1481 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 230/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 19660 m, 86 m/sec, 19659 t fired, .
52 LTL EXCL 230/586 1/32 RERS17pb113-PT-7-LTLFireability-13 18547 m, 80 m/sec, 18546 t fired, .
Time elapsed: 1486 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 235/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 20112 m, 90 m/sec, 20111 t fired, .
52 LTL EXCL 235/586 1/32 RERS17pb113-PT-7-LTLFireability-13 18973 m, 85 m/sec, 18972 t fired, .
Time elapsed: 1491 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 240/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 20562 m, 90 m/sec, 20561 t fired, .
52 LTL EXCL 240/586 1/32 RERS17pb113-PT-7-LTLFireability-13 19381 m, 81 m/sec, 19380 t fired, .
Time elapsed: 1496 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 245/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 20975 m, 82 m/sec, 20974 t fired, .
52 LTL EXCL 245/586 1/32 RERS17pb113-PT-7-LTLFireability-13 19798 m, 83 m/sec, 19797 t fired, .
Time elapsed: 1501 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 250/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 21396 m, 84 m/sec, 21395 t fired, .
52 LTL EXCL 250/586 1/32 RERS17pb113-PT-7-LTLFireability-13 20183 m, 77 m/sec, 20182 t fired, .
Time elapsed: 1506 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 255/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 21762 m, 73 m/sec, 21761 t fired, .
52 LTL EXCL 255/586 1/32 RERS17pb113-PT-7-LTLFireability-13 20566 m, 76 m/sec, 20565 t fired, .
Time elapsed: 1511 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 260/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 22146 m, 76 m/sec, 22145 t fired, .
52 LTL EXCL 260/586 1/32 RERS17pb113-PT-7-LTLFireability-13 20955 m, 77 m/sec, 20954 t fired, .
Time elapsed: 1516 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 265/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 22591 m, 89 m/sec, 22590 t fired, .
52 LTL EXCL 265/586 1/32 RERS17pb113-PT-7-LTLFireability-13 21369 m, 82 m/sec, 21368 t fired, .
Time elapsed: 1521 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 270/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 22959 m, 73 m/sec, 22958 t fired, .
52 LTL EXCL 270/586 1/32 RERS17pb113-PT-7-LTLFireability-13 21780 m, 82 m/sec, 21779 t fired, .
Time elapsed: 1526 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 275/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 23341 m, 76 m/sec, 23340 t fired, .
52 LTL EXCL 275/586 1/32 RERS17pb113-PT-7-LTLFireability-13 22167 m, 77 m/sec, 22166 t fired, .
Time elapsed: 1531 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 280/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 23762 m, 84 m/sec, 23761 t fired, .
52 LTL EXCL 280/586 1/32 RERS17pb113-PT-7-LTLFireability-13 22535 m, 73 m/sec, 22534 t fired, .
Time elapsed: 1536 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 285/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 24091 m, 65 m/sec, 24090 t fired, .
52 LTL EXCL 285/586 1/32 RERS17pb113-PT-7-LTLFireability-13 22933 m, 79 m/sec, 22932 t fired, .
Time elapsed: 1541 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 290/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 24521 m, 86 m/sec, 24520 t fired, .
52 LTL EXCL 290/586 1/32 RERS17pb113-PT-7-LTLFireability-13 23340 m, 81 m/sec, 23339 t fired, .
Time elapsed: 1546 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 295/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 24929 m, 81 m/sec, 24928 t fired, .
52 LTL EXCL 295/586 1/32 RERS17pb113-PT-7-LTLFireability-13 23722 m, 76 m/sec, 23721 t fired, .
Time elapsed: 1551 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 300/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 25352 m, 84 m/sec, 25351 t fired, .
52 LTL EXCL 300/586 1/32 RERS17pb113-PT-7-LTLFireability-13 24103 m, 76 m/sec, 24102 t fired, .
Time elapsed: 1556 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 305/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 25767 m, 83 m/sec, 25766 t fired, .
52 LTL EXCL 305/586 1/32 RERS17pb113-PT-7-LTLFireability-13 24496 m, 78 m/sec, 24495 t fired, .
Time elapsed: 1561 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 310/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 26158 m, 78 m/sec, 26157 t fired, .
52 LTL EXCL 310/586 1/32 RERS17pb113-PT-7-LTLFireability-13 24891 m, 79 m/sec, 24890 t fired, .
Time elapsed: 1566 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 315/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 26574 m, 83 m/sec, 26573 t fired, .
52 LTL EXCL 315/586 1/32 RERS17pb113-PT-7-LTLFireability-13 25263 m, 74 m/sec, 25262 t fired, .
Time elapsed: 1571 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 320/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 26950 m, 75 m/sec, 26949 t fired, .
52 LTL EXCL 320/586 1/32 RERS17pb113-PT-7-LTLFireability-13 25652 m, 77 m/sec, 25651 t fired, .
Time elapsed: 1576 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 325/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 27368 m, 83 m/sec, 27367 t fired, .
52 LTL EXCL 325/586 1/32 RERS17pb113-PT-7-LTLFireability-13 26049 m, 79 m/sec, 26048 t fired, .
Time elapsed: 1581 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 330/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 27785 m, 83 m/sec, 27784 t fired, .
52 LTL EXCL 330/586 1/32 RERS17pb113-PT-7-LTLFireability-13 26445 m, 79 m/sec, 26444 t fired, .
Time elapsed: 1586 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 335/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 28220 m, 87 m/sec, 28219 t fired, .
52 LTL EXCL 335/586 1/32 RERS17pb113-PT-7-LTLFireability-13 26801 m, 71 m/sec, 26800 t fired, .
Time elapsed: 1591 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 340/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 28646 m, 85 m/sec, 28645 t fired, .
52 LTL EXCL 340/586 1/32 RERS17pb113-PT-7-LTLFireability-13 27145 m, 68 m/sec, 27144 t fired, .
Time elapsed: 1596 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 345/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 29070 m, 84 m/sec, 29069 t fired, .
52 LTL EXCL 345/586 1/32 RERS17pb113-PT-7-LTLFireability-13 27480 m, 67 m/sec, 27479 t fired, .
Time elapsed: 1601 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 350/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 29505 m, 87 m/sec, 29504 t fired, .
52 LTL EXCL 350/586 1/32 RERS17pb113-PT-7-LTLFireability-13 27821 m, 68 m/sec, 27820 t fired, .
Time elapsed: 1606 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 355/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 29930 m, 85 m/sec, 29929 t fired, .
52 LTL EXCL 355/586 1/32 RERS17pb113-PT-7-LTLFireability-13 28165 m, 68 m/sec, 28164 t fired, .
Time elapsed: 1611 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 360/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 30357 m, 85 m/sec, 30356 t fired, .
52 LTL EXCL 360/586 1/32 RERS17pb113-PT-7-LTLFireability-13 28499 m, 66 m/sec, 28498 t fired, .
Time elapsed: 1616 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 365/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 30766 m, 81 m/sec, 30765 t fired, .
52 LTL EXCL 365/586 1/32 RERS17pb113-PT-7-LTLFireability-13 28829 m, 66 m/sec, 28828 t fired, .
Time elapsed: 1621 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 370/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 31229 m, 92 m/sec, 31228 t fired, .
52 LTL EXCL 370/586 1/32 RERS17pb113-PT-7-LTLFireability-13 29167 m, 67 m/sec, 29166 t fired, .
Time elapsed: 1626 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 375/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 31649 m, 84 m/sec, 31648 t fired, .
52 LTL EXCL 375/586 1/32 RERS17pb113-PT-7-LTLFireability-13 29506 m, 67 m/sec, 29505 t fired, .
Time elapsed: 1631 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 380/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 32064 m, 83 m/sec, 32063 t fired, .
52 LTL EXCL 380/586 1/32 RERS17pb113-PT-7-LTLFireability-13 29854 m, 69 m/sec, 29853 t fired, .
Time elapsed: 1636 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 385/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 32482 m, 83 m/sec, 32481 t fired, .
52 LTL EXCL 385/586 1/32 RERS17pb113-PT-7-LTLFireability-13 30193 m, 67 m/sec, 30192 t fired, .
Time elapsed: 1641 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 390/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 32906 m, 84 m/sec, 32905 t fired, .
52 LTL EXCL 390/586 1/32 RERS17pb113-PT-7-LTLFireability-13 30524 m, 66 m/sec, 30523 t fired, .
Time elapsed: 1646 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 395/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 33354 m, 89 m/sec, 33353 t fired, .
52 LTL EXCL 395/586 1/32 RERS17pb113-PT-7-LTLFireability-13 30852 m, 65 m/sec, 30851 t fired, .
Time elapsed: 1651 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 400/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 33772 m, 83 m/sec, 33771 t fired, .
52 LTL EXCL 400/586 1/32 RERS17pb113-PT-7-LTLFireability-13 31182 m, 66 m/sec, 31181 t fired, .
Time elapsed: 1656 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 405/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 34240 m, 93 m/sec, 34239 t fired, .
52 LTL EXCL 405/586 1/32 RERS17pb113-PT-7-LTLFireability-13 31518 m, 67 m/sec, 31517 t fired, .
Time elapsed: 1661 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 410/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 34678 m, 87 m/sec, 34677 t fired, .
52 LTL EXCL 410/586 1/32 RERS17pb113-PT-7-LTLFireability-13 31854 m, 67 m/sec, 31853 t fired, .
Time elapsed: 1666 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 415/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 35081 m, 80 m/sec, 35080 t fired, .
52 LTL EXCL 415/586 1/32 RERS17pb113-PT-7-LTLFireability-13 32191 m, 67 m/sec, 32190 t fired, .
Time elapsed: 1671 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 420/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 35485 m, 80 m/sec, 35484 t fired, .
52 LTL EXCL 420/586 1/32 RERS17pb113-PT-7-LTLFireability-13 32526 m, 67 m/sec, 32525 t fired, .
Time elapsed: 1676 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 425/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 35930 m, 89 m/sec, 35929 t fired, .
52 LTL EXCL 425/586 1/32 RERS17pb113-PT-7-LTLFireability-13 32855 m, 65 m/sec, 32854 t fired, .
Time elapsed: 1681 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 430/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 36346 m, 83 m/sec, 36345 t fired, .
52 LTL EXCL 430/586 1/32 RERS17pb113-PT-7-LTLFireability-13 33191 m, 67 m/sec, 33190 t fired, .
Time elapsed: 1686 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 435/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 36770 m, 84 m/sec, 36769 t fired, .
52 LTL EXCL 435/586 1/32 RERS17pb113-PT-7-LTLFireability-13 33529 m, 67 m/sec, 33528 t fired, .
Time elapsed: 1691 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 440/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 37195 m, 85 m/sec, 37194 t fired, .
52 LTL EXCL 440/586 1/32 RERS17pb113-PT-7-LTLFireability-13 33871 m, 68 m/sec, 33870 t fired, .
Time elapsed: 1696 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 445/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 37592 m, 79 m/sec, 37591 t fired, .
52 LTL EXCL 445/586 1/32 RERS17pb113-PT-7-LTLFireability-13 34213 m, 68 m/sec, 34212 t fired, .
Time elapsed: 1701 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 450/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 37994 m, 80 m/sec, 37993 t fired, .
52 LTL EXCL 450/586 1/32 RERS17pb113-PT-7-LTLFireability-13 34545 m, 66 m/sec, 34544 t fired, .
Time elapsed: 1706 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 455/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 38371 m, 75 m/sec, 38370 t fired, .
52 LTL EXCL 455/586 1/32 RERS17pb113-PT-7-LTLFireability-13 34889 m, 68 m/sec, 34888 t fired, .
Time elapsed: 1711 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 460/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 38780 m, 81 m/sec, 38779 t fired, .
52 LTL EXCL 460/586 1/32 RERS17pb113-PT-7-LTLFireability-13 35233 m, 68 m/sec, 35232 t fired, .
Time elapsed: 1716 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 465/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 39189 m, 81 m/sec, 39188 t fired, .
52 LTL EXCL 465/586 1/32 RERS17pb113-PT-7-LTLFireability-13 35575 m, 68 m/sec, 35574 t fired, .
Time elapsed: 1721 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 470/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 39545 m, 71 m/sec, 39544 t fired, .
52 LTL EXCL 470/586 1/32 RERS17pb113-PT-7-LTLFireability-13 35930 m, 71 m/sec, 35929 t fired, .
Time elapsed: 1726 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 475/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 39903 m, 71 m/sec, 39902 t fired, .
52 LTL EXCL 475/586 1/32 RERS17pb113-PT-7-LTLFireability-13 36273 m, 68 m/sec, 36272 t fired, .
Time elapsed: 1731 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 480/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 40291 m, 77 m/sec, 40290 t fired, .
52 LTL EXCL 480/586 1/32 RERS17pb113-PT-7-LTLFireability-13 36614 m, 68 m/sec, 36613 t fired, .
Time elapsed: 1736 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 485/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 40696 m, 81 m/sec, 40695 t fired, .
52 LTL EXCL 485/586 1/32 RERS17pb113-PT-7-LTLFireability-13 36965 m, 70 m/sec, 36964 t fired, .
Time elapsed: 1741 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 490/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 41104 m, 81 m/sec, 41103 t fired, .
52 LTL EXCL 490/586 1/32 RERS17pb113-PT-7-LTLFireability-13 37328 m, 72 m/sec, 37327 t fired, .
Time elapsed: 1746 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 495/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 41527 m, 84 m/sec, 41526 t fired, .
52 LTL EXCL 495/586 1/32 RERS17pb113-PT-7-LTLFireability-13 37674 m, 69 m/sec, 37673 t fired, .
Time elapsed: 1751 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 500/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 41926 m, 79 m/sec, 41925 t fired, .
52 LTL EXCL 500/586 1/32 RERS17pb113-PT-7-LTLFireability-13 38017 m, 68 m/sec, 38016 t fired, .
Time elapsed: 1756 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 505/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 42336 m, 82 m/sec, 42335 t fired, .
52 LTL EXCL 505/586 1/32 RERS17pb113-PT-7-LTLFireability-13 38370 m, 70 m/sec, 38369 t fired, .
Time elapsed: 1761 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 510/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 42714 m, 75 m/sec, 42713 t fired, .
52 LTL EXCL 510/586 1/32 RERS17pb113-PT-7-LTLFireability-13 38716 m, 69 m/sec, 38715 t fired, .
Time elapsed: 1766 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 515/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 43102 m, 77 m/sec, 43101 t fired, .
52 LTL EXCL 515/586 1/32 RERS17pb113-PT-7-LTLFireability-13 39018 m, 60 m/sec, 39017 t fired, .
Time elapsed: 1771 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 520/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 43535 m, 86 m/sec, 43534 t fired, .
52 LTL EXCL 520/586 1/32 RERS17pb113-PT-7-LTLFireability-13 39365 m, 69 m/sec, 39364 t fired, .
Time elapsed: 1776 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 525/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 43972 m, 87 m/sec, 43971 t fired, .
52 LTL EXCL 525/586 1/32 RERS17pb113-PT-7-LTLFireability-13 39727 m, 72 m/sec, 39726 t fired, .
Time elapsed: 1781 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 530/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 44376 m, 80 m/sec, 44375 t fired, .
52 LTL EXCL 530/586 1/32 RERS17pb113-PT-7-LTLFireability-13 40045 m, 63 m/sec, 40044 t fired, .
Time elapsed: 1786 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 535/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 44771 m, 79 m/sec, 44770 t fired, .
52 LTL EXCL 535/586 1/32 RERS17pb113-PT-7-LTLFireability-13 40387 m, 68 m/sec, 40386 t fired, .
Time elapsed: 1791 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 540/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 45181 m, 82 m/sec, 45180 t fired, .
52 LTL EXCL 540/586 1/32 RERS17pb113-PT-7-LTLFireability-13 40725 m, 67 m/sec, 40724 t fired, .
Time elapsed: 1796 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 545/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 45565 m, 76 m/sec, 45564 t fired, .
52 LTL EXCL 545/586 1/32 RERS17pb113-PT-7-LTLFireability-13 41074 m, 69 m/sec, 41073 t fired, .
Time elapsed: 1801 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 550/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 45975 m, 82 m/sec, 45974 t fired, .
52 LTL EXCL 550/586 1/32 RERS17pb113-PT-7-LTLFireability-13 41431 m, 71 m/sec, 41430 t fired, .
Time elapsed: 1806 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 555/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 46376 m, 80 m/sec, 46375 t fired, .
52 LTL EXCL 555/586 1/32 RERS17pb113-PT-7-LTLFireability-13 41792 m, 72 m/sec, 41791 t fired, .
Time elapsed: 1811 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 560/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 46763 m, 77 m/sec, 46762 t fired, .
52 LTL EXCL 560/586 1/32 RERS17pb113-PT-7-LTLFireability-13 42171 m, 75 m/sec, 42170 t fired, .
Time elapsed: 1816 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 565/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 47170 m, 81 m/sec, 47169 t fired, .
52 LTL EXCL 565/586 1/32 RERS17pb113-PT-7-LTLFireability-13 42544 m, 74 m/sec, 42543 t fired, .
Time elapsed: 1821 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 570/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 47561 m, 78 m/sec, 47560 t fired, .
52 LTL EXCL 570/586 1/32 RERS17pb113-PT-7-LTLFireability-13 42914 m, 74 m/sec, 42913 t fired, .
Time elapsed: 1826 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 575/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 47982 m, 84 m/sec, 47981 t fired, .
52 LTL EXCL 575/586 1/32 RERS17pb113-PT-7-LTLFireability-13 43308 m, 78 m/sec, 43307 t fired, .
Time elapsed: 1831 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 580/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 48403 m, 84 m/sec, 48402 t fired, .
52 LTL EXCL 580/586 1/32 RERS17pb113-PT-7-LTLFireability-13 43688 m, 76 m/sec, 43687 t fired, .
Time elapsed: 1836 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 585/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 48803 m, 80 m/sec, 48802 t fired, .
52 LTL EXCL 585/586 1/32 RERS17pb113-PT-7-LTLFireability-13 44059 m, 74 m/sec, 44058 t fired, .
Time elapsed: 1841 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 52 (type EXCL) for RERS17pb113-PT-7-LTLFireability-13 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 590/2344 1/5 RERS17pb113-PT-7-LTLFireability-10 49225 m, 84 m/sec, 49224 t fired, .
Time elapsed: 1846 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 51 RERS17pb113-PT-7-LTLFireability-13
lola: time limit : 1754 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 595/781 1/5 RERS17pb113-PT-7-LTLFireability-10 49625 m, 80 m/sec, 49624 t fired, .
52 LTL EXCL 5/1754 1/5 RERS17pb113-PT-7-LTLFireability-13 338 m, -8744 m/sec, 337 t fired, .
Time elapsed: 1851 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 600/781 1/5 RERS17pb113-PT-7-LTLFireability-10 50036 m, 82 m/sec, 50035 t fired, .
52 LTL EXCL 10/438 1/5 RERS17pb113-PT-7-LTLFireability-13 638 m, 60 m/sec, 637 t fired, .
Time elapsed: 1856 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 605/781 1/5 RERS17pb113-PT-7-LTLFireability-10 50437 m, 80 m/sec, 50436 t fired, .
52 LTL EXCL 15/438 1/5 RERS17pb113-PT-7-LTLFireability-13 991 m, 70 m/sec, 990 t fired, .
Time elapsed: 1861 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 610/781 1/5 RERS17pb113-PT-7-LTLFireability-10 50834 m, 79 m/sec, 50833 t fired, .
52 LTL EXCL 20/438 1/5 RERS17pb113-PT-7-LTLFireability-13 1341 m, 70 m/sec, 1340 t fired, .
Time elapsed: 1866 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 615/781 1/5 RERS17pb113-PT-7-LTLFireability-10 51233 m, 79 m/sec, 51232 t fired, .
52 LTL EXCL 25/438 1/5 RERS17pb113-PT-7-LTLFireability-13 1700 m, 71 m/sec, 1699 t fired, .
Time elapsed: 1871 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 620/781 1/5 RERS17pb113-PT-7-LTLFireability-10 51678 m, 89 m/sec, 51677 t fired, .
52 LTL EXCL 30/438 1/5 RERS17pb113-PT-7-LTLFireability-13 2067 m, 73 m/sec, 2066 t fired, .
Time elapsed: 1876 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 625/781 1/5 RERS17pb113-PT-7-LTLFireability-10 52110 m, 86 m/sec, 52109 t fired, .
52 LTL EXCL 35/438 1/5 RERS17pb113-PT-7-LTLFireability-13 2427 m, 72 m/sec, 2426 t fired, .
Time elapsed: 1881 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 630/781 1/5 RERS17pb113-PT-7-LTLFireability-10 52506 m, 79 m/sec, 52505 t fired, .
52 LTL EXCL 40/438 1/5 RERS17pb113-PT-7-LTLFireability-13 2786 m, 71 m/sec, 2785 t fired, .
Time elapsed: 1886 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 635/781 1/5 RERS17pb113-PT-7-LTLFireability-10 52954 m, 89 m/sec, 52953 t fired, .
52 LTL EXCL 45/438 1/5 RERS17pb113-PT-7-LTLFireability-13 3153 m, 73 m/sec, 3152 t fired, .
Time elapsed: 1891 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 640/781 1/5 RERS17pb113-PT-7-LTLFireability-10 53390 m, 87 m/sec, 53389 t fired, .
52 LTL EXCL 50/438 1/5 RERS17pb113-PT-7-LTLFireability-13 3526 m, 74 m/sec, 3525 t fired, .
Time elapsed: 1896 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 645/781 1/5 RERS17pb113-PT-7-LTLFireability-10 53811 m, 84 m/sec, 53810 t fired, .
52 LTL EXCL 55/438 1/5 RERS17pb113-PT-7-LTLFireability-13 3900 m, 74 m/sec, 3899 t fired, .
Time elapsed: 1901 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 650/781 1/5 RERS17pb113-PT-7-LTLFireability-10 54211 m, 80 m/sec, 54210 t fired, .
52 LTL EXCL 60/438 1/5 RERS17pb113-PT-7-LTLFireability-13 4277 m, 75 m/sec, 4276 t fired, .
Time elapsed: 1906 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 655/781 1/5 RERS17pb113-PT-7-LTLFireability-10 54611 m, 80 m/sec, 54610 t fired, .
52 LTL EXCL 65/438 1/5 RERS17pb113-PT-7-LTLFireability-13 4598 m, 64 m/sec, 4597 t fired, .
Time elapsed: 1911 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 660/781 1/5 RERS17pb113-PT-7-LTLFireability-10 55024 m, 82 m/sec, 55023 t fired, .
52 LTL EXCL 70/438 1/5 RERS17pb113-PT-7-LTLFireability-13 4957 m, 71 m/sec, 4956 t fired, .
Time elapsed: 1916 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 665/781 1/5 RERS17pb113-PT-7-LTLFireability-10 55439 m, 83 m/sec, 55438 t fired, .
52 LTL EXCL 75/438 1/5 RERS17pb113-PT-7-LTLFireability-13 5328 m, 74 m/sec, 5327 t fired, .
Time elapsed: 1921 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 670/781 1/5 RERS17pb113-PT-7-LTLFireability-10 55852 m, 82 m/sec, 55851 t fired, .
52 LTL EXCL 80/438 1/5 RERS17pb113-PT-7-LTLFireability-13 5699 m, 74 m/sec, 5698 t fired, .
Time elapsed: 1926 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 675/781 1/5 RERS17pb113-PT-7-LTLFireability-10 56235 m, 76 m/sec, 56234 t fired, .
52 LTL EXCL 85/438 1/5 RERS17pb113-PT-7-LTLFireability-13 6091 m, 78 m/sec, 6090 t fired, .
Time elapsed: 1931 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 680/781 1/5 RERS17pb113-PT-7-LTLFireability-10 56653 m, 83 m/sec, 56652 t fired, .
52 LTL EXCL 90/438 1/5 RERS17pb113-PT-7-LTLFireability-13 6464 m, 74 m/sec, 6463 t fired, .
Time elapsed: 1936 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 685/781 1/5 RERS17pb113-PT-7-LTLFireability-10 57087 m, 86 m/sec, 57086 t fired, .
52 LTL EXCL 95/438 1/5 RERS17pb113-PT-7-LTLFireability-13 6853 m, 77 m/sec, 6852 t fired, .
Time elapsed: 1941 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 690/781 1/5 RERS17pb113-PT-7-LTLFireability-10 57509 m, 84 m/sec, 57508 t fired, .
52 LTL EXCL 100/438 1/5 RERS17pb113-PT-7-LTLFireability-13 7249 m, 79 m/sec, 7248 t fired, .
Time elapsed: 1946 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 695/781 1/5 RERS17pb113-PT-7-LTLFireability-10 57936 m, 85 m/sec, 57935 t fired, .
52 LTL EXCL 105/438 1/5 RERS17pb113-PT-7-LTLFireability-13 7623 m, 74 m/sec, 7622 t fired, .
Time elapsed: 1951 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 700/781 1/5 RERS17pb113-PT-7-LTLFireability-10 58322 m, 77 m/sec, 58321 t fired, .
52 LTL EXCL 110/438 1/5 RERS17pb113-PT-7-LTLFireability-13 7984 m, 72 m/sec, 7983 t fired, .
Time elapsed: 1956 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 705/781 1/5 RERS17pb113-PT-7-LTLFireability-10 58703 m, 76 m/sec, 58702 t fired, .
52 LTL EXCL 115/438 1/5 RERS17pb113-PT-7-LTLFireability-13 8355 m, 74 m/sec, 8354 t fired, .
Time elapsed: 1961 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 710/781 1/5 RERS17pb113-PT-7-LTLFireability-10 59111 m, 81 m/sec, 59110 t fired, .
52 LTL EXCL 120/438 1/5 RERS17pb113-PT-7-LTLFireability-13 8710 m, 71 m/sec, 8709 t fired, .
Time elapsed: 1966 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 715/781 1/5 RERS17pb113-PT-7-LTLFireability-10 59481 m, 74 m/sec, 59480 t fired, .
52 LTL EXCL 125/438 1/5 RERS17pb113-PT-7-LTLFireability-13 9067 m, 71 m/sec, 9066 t fired, .
Time elapsed: 1971 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 720/781 1/5 RERS17pb113-PT-7-LTLFireability-10 59873 m, 78 m/sec, 59872 t fired, .
52 LTL EXCL 130/438 1/5 RERS17pb113-PT-7-LTLFireability-13 9419 m, 70 m/sec, 9418 t fired, .
Time elapsed: 1976 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 725/781 1/5 RERS17pb113-PT-7-LTLFireability-10 60258 m, 77 m/sec, 60257 t fired, .
52 LTL EXCL 135/438 1/5 RERS17pb113-PT-7-LTLFireability-13 9784 m, 73 m/sec, 9783 t fired, .
Time elapsed: 1981 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 730/781 1/5 RERS17pb113-PT-7-LTLFireability-10 60662 m, 80 m/sec, 60661 t fired, .
52 LTL EXCL 140/438 1/5 RERS17pb113-PT-7-LTLFireability-13 10152 m, 73 m/sec, 10151 t fired, .
Time elapsed: 1986 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 735/781 1/5 RERS17pb113-PT-7-LTLFireability-10 61086 m, 84 m/sec, 61085 t fired, .
52 LTL EXCL 145/438 1/5 RERS17pb113-PT-7-LTLFireability-13 10522 m, 74 m/sec, 10521 t fired, .
Time elapsed: 1991 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 740/781 1/5 RERS17pb113-PT-7-LTLFireability-10 61504 m, 83 m/sec, 61503 t fired, .
52 LTL EXCL 150/438 1/5 RERS17pb113-PT-7-LTLFireability-13 10888 m, 73 m/sec, 10887 t fired, .
Time elapsed: 1996 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 745/781 1/5 RERS17pb113-PT-7-LTLFireability-10 61909 m, 81 m/sec, 61908 t fired, .
52 LTL EXCL 155/438 1/5 RERS17pb113-PT-7-LTLFireability-13 11257 m, 73 m/sec, 11256 t fired, .
Time elapsed: 2001 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 750/781 1/5 RERS17pb113-PT-7-LTLFireability-10 62289 m, 76 m/sec, 62288 t fired, .
52 LTL EXCL 160/438 1/5 RERS17pb113-PT-7-LTLFireability-13 11655 m, 79 m/sec, 11654 t fired, .
Time elapsed: 2006 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 755/781 1/5 RERS17pb113-PT-7-LTLFireability-10 62685 m, 79 m/sec, 62684 t fired, .
52 LTL EXCL 165/438 1/5 RERS17pb113-PT-7-LTLFireability-13 12005 m, 70 m/sec, 12004 t fired, .
Time elapsed: 2011 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 760/781 1/5 RERS17pb113-PT-7-LTLFireability-10 63041 m, 71 m/sec, 63040 t fired, .
52 LTL EXCL 170/438 1/5 RERS17pb113-PT-7-LTLFireability-13 12376 m, 74 m/sec, 12375 t fired, .
Time elapsed: 2016 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 765/781 2/5 RERS17pb113-PT-7-LTLFireability-10 63449 m, 81 m/sec, 63448 t fired, .
52 LTL EXCL 175/438 1/5 RERS17pb113-PT-7-LTLFireability-13 12751 m, 75 m/sec, 12750 t fired, .
Time elapsed: 2021 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 770/781 2/5 RERS17pb113-PT-7-LTLFireability-10 63856 m, 81 m/sec, 63855 t fired, .
52 LTL EXCL 180/438 1/5 RERS17pb113-PT-7-LTLFireability-13 13134 m, 76 m/sec, 13133 t fired, .
Time elapsed: 2026 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 775/781 2/5 RERS17pb113-PT-7-LTLFireability-10 64273 m, 83 m/sec, 64272 t fired, .
52 LTL EXCL 185/438 1/5 RERS17pb113-PT-7-LTLFireability-13 13527 m, 78 m/sec, 13526 t fired, .
Time elapsed: 2031 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 780/781 2/5 RERS17pb113-PT-7-LTLFireability-10 64687 m, 82 m/sec, 64686 t fired, .
52 LTL EXCL 190/438 1/5 RERS17pb113-PT-7-LTLFireability-13 13899 m, 74 m/sec, 13898 t fired, .
Time elapsed: 2036 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL) for RERS17pb113-PT-7-LTLFireability-10 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 0 0 2 1 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 LTL EXCL 195/438 1/5 RERS17pb113-PT-7-LTLFireability-13 14264 m, 73 m/sec, 14263 t fired, .
Time elapsed: 2041 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL) for 38 RERS17pb113-PT-7-LTLFireability-10
lola: time limit : 1559 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 5/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 267 m, -12884 m/sec, 266 t fired, .
52 LTL EXCL 200/584 1/5 RERS17pb113-PT-7-LTLFireability-13 14560 m, 59 m/sec, 14559 t fired, .
Time elapsed: 2046 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 10/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 551 m, 56 m/sec, 550 t fired, .
52 LTL EXCL 205/438 1/5 RERS17pb113-PT-7-LTLFireability-13 14856 m, 59 m/sec, 14855 t fired, .
Time elapsed: 2051 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 15/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 847 m, 59 m/sec, 846 t fired, .
52 LTL EXCL 210/438 1/5 RERS17pb113-PT-7-LTLFireability-13 15160 m, 60 m/sec, 15159 t fired, .
Time elapsed: 2056 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 20/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 1155 m, 61 m/sec, 1155 t fired, .
52 LTL EXCL 215/438 1/5 RERS17pb113-PT-7-LTLFireability-13 15462 m, 60 m/sec, 15461 t fired, .
Time elapsed: 2061 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 25/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 1454 m, 59 m/sec, 1453 t fired, .
52 LTL EXCL 220/438 1/5 RERS17pb113-PT-7-LTLFireability-13 15759 m, 59 m/sec, 15758 t fired, .
Time elapsed: 2066 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 30/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 1774 m, 64 m/sec, 1773 t fired, .
52 LTL EXCL 225/438 1/5 RERS17pb113-PT-7-LTLFireability-13 16038 m, 55 m/sec, 16037 t fired, .
Time elapsed: 2071 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 35/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 2074 m, 60 m/sec, 2073 t fired, .
52 LTL EXCL 230/438 1/5 RERS17pb113-PT-7-LTLFireability-13 16332 m, 58 m/sec, 16331 t fired, .
Time elapsed: 2076 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 40/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 2364 m, 58 m/sec, 2363 t fired, .
52 LTL EXCL 235/438 1/5 RERS17pb113-PT-7-LTLFireability-13 16665 m, 66 m/sec, 16664 t fired, .
Time elapsed: 2081 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 45/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 2660 m, 59 m/sec, 2659 t fired, .
52 LTL EXCL 240/438 1/5 RERS17pb113-PT-7-LTLFireability-13 16939 m, 54 m/sec, 16938 t fired, .
Time elapsed: 2086 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 50/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 2966 m, 61 m/sec, 2965 t fired, .
52 LTL EXCL 245/438 1/5 RERS17pb113-PT-7-LTLFireability-13 17243 m, 60 m/sec, 17242 t fired, .
Time elapsed: 2091 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 55/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 3261 m, 59 m/sec, 3260 t fired, .
52 LTL EXCL 250/438 1/5 RERS17pb113-PT-7-LTLFireability-13 17546 m, 60 m/sec, 17545 t fired, .
Time elapsed: 2096 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 60/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 3506 m, 49 m/sec, 3505 t fired, .
52 LTL EXCL 255/438 1/5 RERS17pb113-PT-7-LTLFireability-13 17772 m, 45 m/sec, 17771 t fired, .
Time elapsed: 2101 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 65/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 3746 m, 48 m/sec, 3745 t fired, .
52 LTL EXCL 260/438 1/5 RERS17pb113-PT-7-LTLFireability-13 18046 m, 54 m/sec, 18045 t fired, .
Time elapsed: 2106 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 70/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 4061 m, 63 m/sec, 4060 t fired, .
52 LTL EXCL 265/438 1/5 RERS17pb113-PT-7-LTLFireability-13 18275 m, 45 m/sec, 18274 t fired, .
Time elapsed: 2111 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 75/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 4318 m, 51 m/sec, 4317 t fired, .
52 LTL EXCL 270/438 1/5 RERS17pb113-PT-7-LTLFireability-13 18547 m, 54 m/sec, 18546 t fired, .
Time elapsed: 2116 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 80/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 4585 m, 53 m/sec, 4584 t fired, .
52 LTL EXCL 275/438 1/5 RERS17pb113-PT-7-LTLFireability-13 18825 m, 55 m/sec, 18824 t fired, .
Time elapsed: 2121 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 85/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 4870 m, 57 m/sec, 4869 t fired, .
52 LTL EXCL 280/438 1/5 RERS17pb113-PT-7-LTLFireability-13 19057 m, 46 m/sec, 19056 t fired, .
Time elapsed: 2126 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 90/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 5161 m, 58 m/sec, 5160 t fired, .
52 LTL EXCL 285/438 1/5 RERS17pb113-PT-7-LTLFireability-13 19264 m, 41 m/sec, 19263 t fired, .
Time elapsed: 2131 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 95/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 5418 m, 51 m/sec, 5417 t fired, .
52 LTL EXCL 290/438 1/5 RERS17pb113-PT-7-LTLFireability-13 19507 m, 48 m/sec, 19506 t fired, .
Time elapsed: 2136 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 100/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 5697 m, 55 m/sec, 5696 t fired, .
52 LTL EXCL 295/438 1/5 RERS17pb113-PT-7-LTLFireability-13 19778 m, 54 m/sec, 19777 t fired, .
Time elapsed: 2141 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 105/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 5958 m, 52 m/sec, 5957 t fired, .
52 LTL EXCL 300/438 1/5 RERS17pb113-PT-7-LTLFireability-13 20024 m, 49 m/sec, 20023 t fired, .
Time elapsed: 2146 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 110/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 6259 m, 60 m/sec, 6258 t fired, .
52 LTL EXCL 305/438 1/5 RERS17pb113-PT-7-LTLFireability-13 20307 m, 56 m/sec, 20306 t fired, .
Time elapsed: 2151 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 115/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 6518 m, 51 m/sec, 6517 t fired, .
52 LTL EXCL 310/438 1/5 RERS17pb113-PT-7-LTLFireability-13 20578 m, 54 m/sec, 20577 t fired, .
Time elapsed: 2156 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 120/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 6769 m, 50 m/sec, 6768 t fired, .
52 LTL EXCL 315/438 1/5 RERS17pb113-PT-7-LTLFireability-13 20867 m, 57 m/sec, 20866 t fired, .
Time elapsed: 2161 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 125/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 7041 m, 54 m/sec, 7040 t fired, .
52 LTL EXCL 320/438 1/5 RERS17pb113-PT-7-LTLFireability-13 21130 m, 52 m/sec, 21129 t fired, .
Time elapsed: 2166 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 130/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 7306 m, 53 m/sec, 7305 t fired, .
52 LTL EXCL 325/438 1/5 RERS17pb113-PT-7-LTLFireability-13 21399 m, 53 m/sec, 21398 t fired, .
Time elapsed: 2171 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 135/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 7595 m, 57 m/sec, 7594 t fired, .
52 LTL EXCL 330/438 1/5 RERS17pb113-PT-7-LTLFireability-13 21669 m, 54 m/sec, 21668 t fired, .
Time elapsed: 2176 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 140/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 7815 m, 44 m/sec, 7814 t fired, .
52 LTL EXCL 335/438 1/5 RERS17pb113-PT-7-LTLFireability-13 21907 m, 47 m/sec, 21906 t fired, .
Time elapsed: 2181 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 145/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 8057 m, 48 m/sec, 8056 t fired, .
52 LTL EXCL 340/438 1/5 RERS17pb113-PT-7-LTLFireability-13 22151 m, 48 m/sec, 22150 t fired, .
Time elapsed: 2186 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 150/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 8306 m, 49 m/sec, 8305 t fired, .
52 LTL EXCL 345/438 1/5 RERS17pb113-PT-7-LTLFireability-13 22368 m, 43 m/sec, 22367 t fired, .
Time elapsed: 2191 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 155/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 8455 m, 29 m/sec, 8454 t fired, .
52 LTL EXCL 350/438 1/5 RERS17pb113-PT-7-LTLFireability-13 22601 m, 46 m/sec, 22600 t fired, .
Time elapsed: 2196 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 160/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 8598 m, 28 m/sec, 8597 t fired, .
52 LTL EXCL 355/438 1/5 RERS17pb113-PT-7-LTLFireability-13 22861 m, 52 m/sec, 22860 t fired, .
Time elapsed: 2201 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 165/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 8820 m, 44 m/sec, 8819 t fired, .
52 LTL EXCL 360/438 1/5 RERS17pb113-PT-7-LTLFireability-13 23084 m, 44 m/sec, 23083 t fired, .
Time elapsed: 2206 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 170/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 9073 m, 50 m/sec, 9072 t fired, .
52 LTL EXCL 365/438 1/5 RERS17pb113-PT-7-LTLFireability-13 23347 m, 52 m/sec, 23346 t fired, .
Time elapsed: 2211 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 175/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 9351 m, 55 m/sec, 9350 t fired, .
52 LTL EXCL 370/438 1/5 RERS17pb113-PT-7-LTLFireability-13 23635 m, 57 m/sec, 23634 t fired, .
Time elapsed: 2216 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 180/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 9652 m, 60 m/sec, 9651 t fired, .
52 LTL EXCL 375/438 1/5 RERS17pb113-PT-7-LTLFireability-13 23923 m, 57 m/sec, 23922 t fired, .
Time elapsed: 2221 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 185/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 9902 m, 50 m/sec, 9901 t fired, .
52 LTL EXCL 380/438 1/5 RERS17pb113-PT-7-LTLFireability-13 24220 m, 59 m/sec, 24219 t fired, .
Time elapsed: 2226 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 190/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 10205 m, 60 m/sec, 10204 t fired, .
52 LTL EXCL 385/438 1/5 RERS17pb113-PT-7-LTLFireability-13 24526 m, 61 m/sec, 24525 t fired, .
Time elapsed: 2231 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 195/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 10495 m, 58 m/sec, 10494 t fired, .
52 LTL EXCL 390/438 1/5 RERS17pb113-PT-7-LTLFireability-13 24815 m, 57 m/sec, 24814 t fired, .
Time elapsed: 2236 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 200/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 10782 m, 57 m/sec, 10781 t fired, .
52 LTL EXCL 395/438 1/5 RERS17pb113-PT-7-LTLFireability-13 25088 m, 54 m/sec, 25087 t fired, .
Time elapsed: 2241 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 205/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 11077 m, 59 m/sec, 11076 t fired, .
52 LTL EXCL 400/438 1/5 RERS17pb113-PT-7-LTLFireability-13 25388 m, 60 m/sec, 25387 t fired, .
Time elapsed: 2246 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 210/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 11377 m, 60 m/sec, 11376 t fired, .
52 LTL EXCL 405/438 1/5 RERS17pb113-PT-7-LTLFireability-13 25676 m, 57 m/sec, 25675 t fired, .
Time elapsed: 2251 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 215/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 11639 m, 52 m/sec, 11638 t fired, .
52 LTL EXCL 410/438 1/5 RERS17pb113-PT-7-LTLFireability-13 25991 m, 63 m/sec, 25990 t fired, .
Time elapsed: 2256 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 220/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 11903 m, 52 m/sec, 11902 t fired, .
52 LTL EXCL 415/438 1/5 RERS17pb113-PT-7-LTLFireability-13 26303 m, 62 m/sec, 26302 t fired, .
Time elapsed: 2261 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 225/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 12214 m, 62 m/sec, 12213 t fired, .
52 LTL EXCL 420/438 1/5 RERS17pb113-PT-7-LTLFireability-13 26591 m, 57 m/sec, 26590 t fired, .
Time elapsed: 2266 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 230/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 12488 m, 54 m/sec, 12487 t fired, .
52 LTL EXCL 425/438 1/5 RERS17pb113-PT-7-LTLFireability-13 26897 m, 61 m/sec, 26896 t fired, .
Time elapsed: 2271 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 235/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 12803 m, 63 m/sec, 12802 t fired, .
52 LTL EXCL 430/438 1/5 RERS17pb113-PT-7-LTLFireability-13 27208 m, 62 m/sec, 27207 t fired, .
Time elapsed: 2276 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 240/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 13099 m, 59 m/sec, 13098 t fired, .
52 LTL EXCL 435/438 1/5 RERS17pb113-PT-7-LTLFireability-13 27530 m, 64 m/sec, 27529 t fired, .
Time elapsed: 2281 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 52 (type EXCL) for RERS17pb113-PT-7-LTLFireability-13 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 245/1559 1/5 RERS17pb113-PT-7-LTLFireability-10 13437 m, 67 m/sec, 13436 t fired, .
Time elapsed: 2286 secs. Pages in use: 11
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 51 RERS17pb113-PT-7-LTLFireability-13
lola: time limit : 1314 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 250/519 1/5 RERS17pb113-PT-7-LTLFireability-10 13740 m, 60 m/sec, 13739 t fired, .
52 LTL EXCL 5/1314 1/5 RERS17pb113-PT-7-LTLFireability-13 243 m, -5457 m/sec, 242 t fired, .
Time elapsed: 2291 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 255/519 1/5 RERS17pb113-PT-7-LTLFireability-10 13969 m, 45 m/sec, 13968 t fired, .
52 LTL EXCL 10/328 1/5 RERS17pb113-PT-7-LTLFireability-13 489 m, 49 m/sec, 488 t fired, .
Time elapsed: 2296 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 260/519 1/5 RERS17pb113-PT-7-LTLFireability-10 14218 m, 49 m/sec, 14217 t fired, .
52 LTL EXCL 15/328 1/5 RERS17pb113-PT-7-LTLFireability-13 671 m, 36 m/sec, 670 t fired, .
Time elapsed: 2301 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 265/519 1/5 RERS17pb113-PT-7-LTLFireability-10 14485 m, 53 m/sec, 14484 t fired, .
52 LTL EXCL 20/328 1/5 RERS17pb113-PT-7-LTLFireability-13 924 m, 50 m/sec, 923 t fired, .
Time elapsed: 2306 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 270/519 1/5 RERS17pb113-PT-7-LTLFireability-10 14720 m, 47 m/sec, 14719 t fired, .
52 LTL EXCL 25/328 1/5 RERS17pb113-PT-7-LTLFireability-13 1155 m, 46 m/sec, 1154 t fired, .
Time elapsed: 2311 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 275/519 1/5 RERS17pb113-PT-7-LTLFireability-10 14934 m, 42 m/sec, 14933 t fired, .
52 LTL EXCL 30/328 1/5 RERS17pb113-PT-7-LTLFireability-13 1420 m, 53 m/sec, 1419 t fired, .
Time elapsed: 2316 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 280/519 1/5 RERS17pb113-PT-7-LTLFireability-10 15193 m, 51 m/sec, 15192 t fired, .
52 LTL EXCL 35/328 1/5 RERS17pb113-PT-7-LTLFireability-13 1654 m, 46 m/sec, 1653 t fired, .
Time elapsed: 2321 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 285/519 1/5 RERS17pb113-PT-7-LTLFireability-10 15447 m, 50 m/sec, 15446 t fired, .
52 LTL EXCL 40/328 1/5 RERS17pb113-PT-7-LTLFireability-13 1918 m, 52 m/sec, 1917 t fired, .
Time elapsed: 2326 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 290/519 1/5 RERS17pb113-PT-7-LTLFireability-10 15720 m, 54 m/sec, 15719 t fired, .
52 LTL EXCL 45/328 1/5 RERS17pb113-PT-7-LTLFireability-13 2178 m, 52 m/sec, 2177 t fired, .
Time elapsed: 2331 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 295/519 1/5 RERS17pb113-PT-7-LTLFireability-10 15966 m, 49 m/sec, 15965 t fired, .
52 LTL EXCL 50/328 1/5 RERS17pb113-PT-7-LTLFireability-13 2410 m, 46 m/sec, 2409 t fired, .
Time elapsed: 2336 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 300/519 1/5 RERS17pb113-PT-7-LTLFireability-10 16205 m, 47 m/sec, 16204 t fired, .
52 LTL EXCL 55/328 1/5 RERS17pb113-PT-7-LTLFireability-13 2657 m, 49 m/sec, 2656 t fired, .
Time elapsed: 2341 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 305/519 1/5 RERS17pb113-PT-7-LTLFireability-10 16457 m, 50 m/sec, 16456 t fired, .
52 LTL EXCL 60/328 1/5 RERS17pb113-PT-7-LTLFireability-13 2893 m, 47 m/sec, 2892 t fired, .
Time elapsed: 2346 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 310/519 1/5 RERS17pb113-PT-7-LTLFireability-10 16684 m, 45 m/sec, 16683 t fired, .
52 LTL EXCL 65/328 1/5 RERS17pb113-PT-7-LTLFireability-13 3125 m, 46 m/sec, 3124 t fired, .
Time elapsed: 2351 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 315/519 1/5 RERS17pb113-PT-7-LTLFireability-10 16957 m, 54 m/sec, 16956 t fired, .
52 LTL EXCL 70/328 1/5 RERS17pb113-PT-7-LTLFireability-13 3382 m, 51 m/sec, 3381 t fired, .
Time elapsed: 2356 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 320/519 1/5 RERS17pb113-PT-7-LTLFireability-10 17187 m, 46 m/sec, 17186 t fired, .
52 LTL EXCL 75/328 1/5 RERS17pb113-PT-7-LTLFireability-13 3658 m, 55 m/sec, 3657 t fired, .
Time elapsed: 2361 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 325/519 1/5 RERS17pb113-PT-7-LTLFireability-10 17438 m, 50 m/sec, 17437 t fired, .
52 LTL EXCL 80/328 1/5 RERS17pb113-PT-7-LTLFireability-13 3921 m, 52 m/sec, 3920 t fired, .
Time elapsed: 2366 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 330/519 1/5 RERS17pb113-PT-7-LTLFireability-10 17691 m, 50 m/sec, 17690 t fired, .
52 LTL EXCL 85/328 1/5 RERS17pb113-PT-7-LTLFireability-13 4181 m, 52 m/sec, 4180 t fired, .
Time elapsed: 2371 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 335/519 1/5 RERS17pb113-PT-7-LTLFireability-10 17950 m, 51 m/sec, 17949 t fired, .
52 LTL EXCL 90/328 1/5 RERS17pb113-PT-7-LTLFireability-13 4388 m, 41 m/sec, 4387 t fired, .
Time elapsed: 2376 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 340/519 1/5 RERS17pb113-PT-7-LTLFireability-10 18221 m, 54 m/sec, 18220 t fired, .
52 LTL EXCL 95/328 1/5 RERS17pb113-PT-7-LTLFireability-13 4609 m, 44 m/sec, 4608 t fired, .
Time elapsed: 2381 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 345/519 1/5 RERS17pb113-PT-7-LTLFireability-10 18406 m, 37 m/sec, 18405 t fired, .
52 LTL EXCL 100/328 1/5 RERS17pb113-PT-7-LTLFireability-13 4833 m, 44 m/sec, 4832 t fired, .
Time elapsed: 2386 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 350/519 1/5 RERS17pb113-PT-7-LTLFireability-10 18623 m, 43 m/sec, 18622 t fired, .
52 LTL EXCL 105/328 1/5 RERS17pb113-PT-7-LTLFireability-13 5110 m, 55 m/sec, 5109 t fired, .
Time elapsed: 2391 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 355/519 1/5 RERS17pb113-PT-7-LTLFireability-10 18902 m, 55 m/sec, 18901 t fired, .
52 LTL EXCL 110/328 1/5 RERS17pb113-PT-7-LTLFireability-13 5357 m, 49 m/sec, 5356 t fired, .
Time elapsed: 2396 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 360/519 1/5 RERS17pb113-PT-7-LTLFireability-10 19177 m, 55 m/sec, 19176 t fired, .
52 LTL EXCL 115/328 1/5 RERS17pb113-PT-7-LTLFireability-13 5618 m, 52 m/sec, 5617 t fired, .
Time elapsed: 2401 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 365/519 1/5 RERS17pb113-PT-7-LTLFireability-10 19458 m, 56 m/sec, 19457 t fired, .
52 LTL EXCL 120/328 1/5 RERS17pb113-PT-7-LTLFireability-13 5884 m, 53 m/sec, 5883 t fired, .
Time elapsed: 2406 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 370/519 1/5 RERS17pb113-PT-7-LTLFireability-10 19705 m, 49 m/sec, 19704 t fired, .
52 LTL EXCL 125/328 1/5 RERS17pb113-PT-7-LTLFireability-13 6123 m, 47 m/sec, 6122 t fired, .
Time elapsed: 2411 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 375/519 1/5 RERS17pb113-PT-7-LTLFireability-10 19962 m, 51 m/sec, 19961 t fired, .
52 LTL EXCL 130/328 1/5 RERS17pb113-PT-7-LTLFireability-13 6394 m, 54 m/sec, 6393 t fired, .
Time elapsed: 2416 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 380/519 1/5 RERS17pb113-PT-7-LTLFireability-10 20201 m, 47 m/sec, 20200 t fired, .
52 LTL EXCL 135/328 1/5 RERS17pb113-PT-7-LTLFireability-13 6655 m, 52 m/sec, 6654 t fired, .
Time elapsed: 2421 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 385/519 1/5 RERS17pb113-PT-7-LTLFireability-10 20461 m, 52 m/sec, 20460 t fired, .
52 LTL EXCL 140/328 1/5 RERS17pb113-PT-7-LTLFireability-13 6906 m, 50 m/sec, 6905 t fired, .
Time elapsed: 2426 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 390/519 1/5 RERS17pb113-PT-7-LTLFireability-10 20689 m, 45 m/sec, 20688 t fired, .
52 LTL EXCL 145/328 1/5 RERS17pb113-PT-7-LTLFireability-13 7181 m, 55 m/sec, 7180 t fired, .
Time elapsed: 2431 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 395/519 1/5 RERS17pb113-PT-7-LTLFireability-10 20928 m, 47 m/sec, 20927 t fired, .
52 LTL EXCL 150/328 1/5 RERS17pb113-PT-7-LTLFireability-13 7430 m, 49 m/sec, 7429 t fired, .
Time elapsed: 2436 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 400/519 1/5 RERS17pb113-PT-7-LTLFireability-10 21175 m, 49 m/sec, 21174 t fired, .
52 LTL EXCL 155/328 1/5 RERS17pb113-PT-7-LTLFireability-13 7698 m, 53 m/sec, 7697 t fired, .
Time elapsed: 2441 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 405/519 1/5 RERS17pb113-PT-7-LTLFireability-10 21451 m, 55 m/sec, 21450 t fired, .
52 LTL EXCL 160/328 1/5 RERS17pb113-PT-7-LTLFireability-13 7946 m, 49 m/sec, 7945 t fired, .
Time elapsed: 2446 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 410/519 1/5 RERS17pb113-PT-7-LTLFireability-10 21691 m, 48 m/sec, 21690 t fired, .
52 LTL EXCL 165/328 1/5 RERS17pb113-PT-7-LTLFireability-13 8186 m, 48 m/sec, 8185 t fired, .
Time elapsed: 2451 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 415/519 1/5 RERS17pb113-PT-7-LTLFireability-10 21918 m, 45 m/sec, 21917 t fired, .
52 LTL EXCL 170/328 1/5 RERS17pb113-PT-7-LTLFireability-13 8446 m, 52 m/sec, 8445 t fired, .
Time elapsed: 2456 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 420/519 1/5 RERS17pb113-PT-7-LTLFireability-10 22187 m, 53 m/sec, 22186 t fired, .
52 LTL EXCL 175/328 1/5 RERS17pb113-PT-7-LTLFireability-13 8700 m, 50 m/sec, 8699 t fired, .
Time elapsed: 2461 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 425/519 1/5 RERS17pb113-PT-7-LTLFireability-10 22427 m, 48 m/sec, 22426 t fired, .
52 LTL EXCL 180/328 1/5 RERS17pb113-PT-7-LTLFireability-13 8973 m, 54 m/sec, 8972 t fired, .
Time elapsed: 2466 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 430/519 1/5 RERS17pb113-PT-7-LTLFireability-10 22650 m, 44 m/sec, 22649 t fired, .
52 LTL EXCL 185/328 1/5 RERS17pb113-PT-7-LTLFireability-13 9227 m, 50 m/sec, 9226 t fired, .
Time elapsed: 2471 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 435/519 1/5 RERS17pb113-PT-7-LTLFireability-10 22875 m, 45 m/sec, 22874 t fired, .
52 LTL EXCL 190/328 1/5 RERS17pb113-PT-7-LTLFireability-13 9482 m, 51 m/sec, 9481 t fired, .
Time elapsed: 2476 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 440/519 1/5 RERS17pb113-PT-7-LTLFireability-10 23120 m, 49 m/sec, 23119 t fired, .
52 LTL EXCL 195/328 1/5 RERS17pb113-PT-7-LTLFireability-13 9724 m, 48 m/sec, 9723 t fired, .
Time elapsed: 2481 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 445/519 1/5 RERS17pb113-PT-7-LTLFireability-10 23334 m, 42 m/sec, 23333 t fired, .
52 LTL EXCL 200/328 1/5 RERS17pb113-PT-7-LTLFireability-13 9968 m, 48 m/sec, 9967 t fired, .
Time elapsed: 2486 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 450/519 1/5 RERS17pb113-PT-7-LTLFireability-10 23643 m, 61 m/sec, 23642 t fired, .
52 LTL EXCL 205/328 1/5 RERS17pb113-PT-7-LTLFireability-13 10210 m, 48 m/sec, 10209 t fired, .
Time elapsed: 2491 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 455/519 1/5 RERS17pb113-PT-7-LTLFireability-10 23873 m, 46 m/sec, 23872 t fired, .
52 LTL EXCL 210/328 1/5 RERS17pb113-PT-7-LTLFireability-13 10472 m, 52 m/sec, 10471 t fired, .
Time elapsed: 2496 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 460/519 1/5 RERS17pb113-PT-7-LTLFireability-10 24049 m, 35 m/sec, 24048 t fired, .
52 LTL EXCL 215/328 1/5 RERS17pb113-PT-7-LTLFireability-13 10723 m, 50 m/sec, 10722 t fired, .
Time elapsed: 2501 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 465/519 1/5 RERS17pb113-PT-7-LTLFireability-10 24301 m, 50 m/sec, 24300 t fired, .
52 LTL EXCL 220/328 1/5 RERS17pb113-PT-7-LTLFireability-13 10954 m, 46 m/sec, 10953 t fired, .
Time elapsed: 2506 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 470/519 1/5 RERS17pb113-PT-7-LTLFireability-10 24569 m, 53 m/sec, 24568 t fired, .
52 LTL EXCL 225/328 1/5 RERS17pb113-PT-7-LTLFireability-13 11206 m, 50 m/sec, 11205 t fired, .
Time elapsed: 2511 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 475/519 1/5 RERS17pb113-PT-7-LTLFireability-10 24815 m, 49 m/sec, 24814 t fired, .
52 LTL EXCL 230/328 1/5 RERS17pb113-PT-7-LTLFireability-13 11479 m, 54 m/sec, 11478 t fired, .
Time elapsed: 2516 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 480/519 1/5 RERS17pb113-PT-7-LTLFireability-10 25042 m, 45 m/sec, 25041 t fired, .
52 LTL EXCL 235/328 1/5 RERS17pb113-PT-7-LTLFireability-13 11726 m, 49 m/sec, 11725 t fired, .
Time elapsed: 2521 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 485/519 1/5 RERS17pb113-PT-7-LTLFireability-10 25296 m, 50 m/sec, 25295 t fired, .
52 LTL EXCL 240/328 1/5 RERS17pb113-PT-7-LTLFireability-13 11936 m, 42 m/sec, 11935 t fired, .
Time elapsed: 2526 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 490/519 1/5 RERS17pb113-PT-7-LTLFireability-10 25563 m, 53 m/sec, 25562 t fired, .
52 LTL EXCL 245/328 1/5 RERS17pb113-PT-7-LTLFireability-13 12180 m, 48 m/sec, 12179 t fired, .
Time elapsed: 2531 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 495/519 1/5 RERS17pb113-PT-7-LTLFireability-10 25798 m, 47 m/sec, 25797 t fired, .
52 LTL EXCL 250/328 1/5 RERS17pb113-PT-7-LTLFireability-13 12446 m, 53 m/sec, 12445 t fired, .
Time elapsed: 2536 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 500/519 1/5 RERS17pb113-PT-7-LTLFireability-10 26050 m, 50 m/sec, 26049 t fired, .
52 LTL EXCL 255/328 1/5 RERS17pb113-PT-7-LTLFireability-13 12720 m, 54 m/sec, 12719 t fired, .
Time elapsed: 2541 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 505/519 1/5 RERS17pb113-PT-7-LTLFireability-10 26284 m, 46 m/sec, 26283 t fired, .
52 LTL EXCL 260/328 1/5 RERS17pb113-PT-7-LTLFireability-13 12982 m, 52 m/sec, 12981 t fired, .
Time elapsed: 2546 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 510/519 1/5 RERS17pb113-PT-7-LTLFireability-10 26509 m, 45 m/sec, 26508 t fired, .
52 LTL EXCL 265/328 1/5 RERS17pb113-PT-7-LTLFireability-13 13239 m, 51 m/sec, 13238 t fired, .
Time elapsed: 2551 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 515/519 1/5 RERS17pb113-PT-7-LTLFireability-10 26731 m, 44 m/sec, 26730 t fired, .
52 LTL EXCL 270/328 1/5 RERS17pb113-PT-7-LTLFireability-13 13515 m, 55 m/sec, 13514 t fired, .
Time elapsed: 2556 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL) for RERS17pb113-PT-7-LTLFireability-10 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 0 0 2 1 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 LTL EXCL 275/328 1/5 RERS17pb113-PT-7-LTLFireability-13 13777 m, 52 m/sec, 13776 t fired, .
Time elapsed: 2561 secs. Pages in use: 12
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL) for 38 RERS17pb113-PT-7-LTLFireability-10
lola: time limit : 1039 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 5/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 191 m, -5308 m/sec, 190 t fired, .
52 LTL EXCL 280/438 1/5 RERS17pb113-PT-7-LTLFireability-13 13961 m, 36 m/sec, 13960 t fired, .
Time elapsed: 2566 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 10/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 406 m, 43 m/sec, 405 t fired, .
52 LTL EXCL 285/328 1/5 RERS17pb113-PT-7-LTLFireability-13 14167 m, 41 m/sec, 14166 t fired, .
Time elapsed: 2571 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 15/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 596 m, 38 m/sec, 595 t fired, .
52 LTL EXCL 290/328 1/5 RERS17pb113-PT-7-LTLFireability-13 14363 m, 39 m/sec, 14362 t fired, .
Time elapsed: 2576 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 20/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 801 m, 41 m/sec, 800 t fired, .
52 LTL EXCL 295/328 1/5 RERS17pb113-PT-7-LTLFireability-13 14600 m, 47 m/sec, 14599 t fired, .
Time elapsed: 2581 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 25/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 1007 m, 41 m/sec, 1006 t fired, .
52 LTL EXCL 300/328 1/5 RERS17pb113-PT-7-LTLFireability-13 14800 m, 40 m/sec, 14799 t fired, .
Time elapsed: 2586 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 30/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 1231 m, 44 m/sec, 1230 t fired, .
52 LTL EXCL 305/328 1/5 RERS17pb113-PT-7-LTLFireability-13 15014 m, 42 m/sec, 15013 t fired, .
Time elapsed: 2591 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 35/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 1425 m, 38 m/sec, 1424 t fired, .
52 LTL EXCL 310/328 1/5 RERS17pb113-PT-7-LTLFireability-13 15223 m, 41 m/sec, 15222 t fired, .
Time elapsed: 2596 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 40/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 1673 m, 49 m/sec, 1672 t fired, .
52 LTL EXCL 315/328 1/5 RERS17pb113-PT-7-LTLFireability-13 15414 m, 38 m/sec, 15413 t fired, .
Time elapsed: 2601 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 45/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 1884 m, 42 m/sec, 1883 t fired, .
52 LTL EXCL 320/328 1/5 RERS17pb113-PT-7-LTLFireability-13 15627 m, 42 m/sec, 15626 t fired, .
Time elapsed: 2606 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 50/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 2109 m, 45 m/sec, 2108 t fired, .
52 LTL EXCL 325/328 1/5 RERS17pb113-PT-7-LTLFireability-13 15842 m, 43 m/sec, 15841 t fired, .
Time elapsed: 2611 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
lola: CANCELED task # 52 (type EXCL) for RERS17pb113-PT-7-LTLFireability-13 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 55/1039 1/5 RERS17pb113-PT-7-LTLFireability-10 2345 m, 47 m/sec, 2344 t fired, .
Time elapsed: 2616 secs. Pages in use: 14
# running tasks: 2 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 51 RERS17pb113-PT-7-LTLFireability-13
lola: time limit : 984 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 60/346 1/5 RERS17pb113-PT-7-LTLFireability-10 2538 m, 38 m/sec, 2537 t fired, .
52 LTL EXCL 5/984 1/5 RERS17pb113-PT-7-LTLFireability-13 167 m, -3135 m/sec, 166 t fired, .
Time elapsed: 2621 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 65/346 1/5 RERS17pb113-PT-7-LTLFireability-10 2696 m, 31 m/sec, 2695 t fired, .
52 LTL EXCL 10/246 1/5 RERS17pb113-PT-7-LTLFireability-13 361 m, 38 m/sec, 360 t fired, .
Time elapsed: 2626 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 70/346 1/5 RERS17pb113-PT-7-LTLFireability-10 2857 m, 32 m/sec, 2856 t fired, .
52 LTL EXCL 15/246 1/5 RERS17pb113-PT-7-LTLFireability-13 534 m, 34 m/sec, 533 t fired, .
Time elapsed: 2631 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 75/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3041 m, 36 m/sec, 3040 t fired, .
52 LTL EXCL 20/246 1/5 RERS17pb113-PT-7-LTLFireability-13 641 m, 21 m/sec, 640 t fired, .
Time elapsed: 2636 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 80/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3207 m, 33 m/sec, 3206 t fired, .
52 LTL EXCL 25/246 1/5 RERS17pb113-PT-7-LTLFireability-13 842 m, 40 m/sec, 841 t fired, .
Time elapsed: 2641 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 85/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3371 m, 32 m/sec, 3370 t fired, .
52 LTL EXCL 30/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1035 m, 38 m/sec, 1034 t fired, .
Time elapsed: 2646 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 90/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3486 m, 23 m/sec, 3485 t fired, .
52 LTL EXCL 35/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1203 m, 33 m/sec, 1202 t fired, .
Time elapsed: 2651 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 95/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3652 m, 33 m/sec, 3651 t fired, .
52 LTL EXCL 40/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1394 m, 38 m/sec, 1393 t fired, .
Time elapsed: 2656 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 100/346 1/5 RERS17pb113-PT-7-LTLFireability-10 3829 m, 35 m/sec, 3828 t fired, .
52 LTL EXCL 45/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1573 m, 35 m/sec, 1572 t fired, .
Time elapsed: 2661 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 105/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4009 m, 36 m/sec, 4008 t fired, .
52 LTL EXCL 50/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1776 m, 40 m/sec, 1775 t fired, .
Time elapsed: 2666 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 110/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4181 m, 34 m/sec, 4180 t fired, .
52 LTL EXCL 55/246 1/5 RERS17pb113-PT-7-LTLFireability-13 1968 m, 38 m/sec, 1967 t fired, .
Time elapsed: 2671 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 115/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4338 m, 31 m/sec, 4337 t fired, .
52 LTL EXCL 60/246 1/5 RERS17pb113-PT-7-LTLFireability-13 2150 m, 36 m/sec, 2149 t fired, .
Time elapsed: 2676 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 120/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4516 m, 35 m/sec, 4515 t fired, .
52 LTL EXCL 65/246 1/5 RERS17pb113-PT-7-LTLFireability-13 2348 m, 39 m/sec, 2347 t fired, .
Time elapsed: 2681 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 125/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4731 m, 43 m/sec, 4730 t fired, .
52 LTL EXCL 70/246 1/5 RERS17pb113-PT-7-LTLFireability-13 2489 m, 28 m/sec, 2488 t fired, .
Time elapsed: 2686 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 130/346 1/5 RERS17pb113-PT-7-LTLFireability-10 4926 m, 39 m/sec, 4925 t fired, .
52 LTL EXCL 75/246 1/5 RERS17pb113-PT-7-LTLFireability-13 2680 m, 38 m/sec, 2679 t fired, .
Time elapsed: 2691 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 135/346 1/5 RERS17pb113-PT-7-LTLFireability-10 5135 m, 41 m/sec, 5134 t fired, .
52 LTL EXCL 80/246 1/5 RERS17pb113-PT-7-LTLFireability-13 2857 m, 35 m/sec, 2856 t fired, .
Time elapsed: 2696 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 140/346 1/5 RERS17pb113-PT-7-LTLFireability-10 5348 m, 42 m/sec, 5347 t fired, .
52 LTL EXCL 85/246 1/5 RERS17pb113-PT-7-LTLFireability-13 3048 m, 38 m/sec, 3047 t fired, .
Time elapsed: 2701 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 145/346 1/5 RERS17pb113-PT-7-LTLFireability-10 5551 m, 40 m/sec, 5550 t fired, .
52 LTL EXCL 90/246 1/5 RERS17pb113-PT-7-LTLFireability-13 3242 m, 38 m/sec, 3241 t fired, .
Time elapsed: 2706 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 150/346 1/5 RERS17pb113-PT-7-LTLFireability-10 5753 m, 40 m/sec, 5752 t fired, .
52 LTL EXCL 95/246 1/5 RERS17pb113-PT-7-LTLFireability-13 3449 m, 41 m/sec, 3448 t fired, .
Time elapsed: 2711 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 155/346 1/5 RERS17pb113-PT-7-LTLFireability-10 5961 m, 41 m/sec, 5960 t fired, .
52 LTL EXCL 100/246 1/5 RERS17pb113-PT-7-LTLFireability-13 3615 m, 33 m/sec, 3614 t fired, .
Time elapsed: 2716 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 160/346 1/5 RERS17pb113-PT-7-LTLFireability-10 6173 m, 42 m/sec, 6172 t fired, .
52 LTL EXCL 105/246 1/5 RERS17pb113-PT-7-LTLFireability-13 3804 m, 37 m/sec, 3803 t fired, .
Time elapsed: 2721 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 165/346 1/5 RERS17pb113-PT-7-LTLFireability-10 6389 m, 43 m/sec, 6388 t fired, .
52 LTL EXCL 110/246 1/5 RERS17pb113-PT-7-LTLFireability-13 4030 m, 45 m/sec, 4029 t fired, .
Time elapsed: 2726 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 170/346 1/5 RERS17pb113-PT-7-LTLFireability-10 6613 m, 44 m/sec, 6612 t fired, .
52 LTL EXCL 115/246 1/5 RERS17pb113-PT-7-LTLFireability-13 4247 m, 43 m/sec, 4246 t fired, .
Time elapsed: 2731 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 175/346 1/5 RERS17pb113-PT-7-LTLFireability-10 6842 m, 45 m/sec, 6841 t fired, .
52 LTL EXCL 120/246 1/5 RERS17pb113-PT-7-LTLFireability-13 4425 m, 35 m/sec, 4424 t fired, .
Time elapsed: 2736 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 180/346 1/5 RERS17pb113-PT-7-LTLFireability-10 7053 m, 42 m/sec, 7052 t fired, .
52 LTL EXCL 125/246 1/5 RERS17pb113-PT-7-LTLFireability-13 4635 m, 42 m/sec, 4634 t fired, .
Time elapsed: 2741 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 185/346 1/5 RERS17pb113-PT-7-LTLFireability-10 7243 m, 38 m/sec, 7242 t fired, .
52 LTL EXCL 130/246 1/5 RERS17pb113-PT-7-LTLFireability-13 4836 m, 40 m/sec, 4835 t fired, .
Time elapsed: 2746 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 190/346 1/5 RERS17pb113-PT-7-LTLFireability-10 7463 m, 44 m/sec, 7462 t fired, .
52 LTL EXCL 135/246 1/5 RERS17pb113-PT-7-LTLFireability-13 5045 m, 41 m/sec, 5044 t fired, .
Time elapsed: 2751 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 195/346 1/5 RERS17pb113-PT-7-LTLFireability-10 7685 m, 44 m/sec, 7684 t fired, .
52 LTL EXCL 140/246 1/5 RERS17pb113-PT-7-LTLFireability-13 5252 m, 41 m/sec, 5251 t fired, .
Time elapsed: 2756 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 200/346 1/5 RERS17pb113-PT-7-LTLFireability-10 7882 m, 39 m/sec, 7881 t fired, .
52 LTL EXCL 145/246 1/5 RERS17pb113-PT-7-LTLFireability-13 5461 m, 41 m/sec, 5460 t fired, .
Time elapsed: 2761 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 205/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8062 m, 36 m/sec, 8061 t fired, .
52 LTL EXCL 150/246 1/5 RERS17pb113-PT-7-LTLFireability-13 5670 m, 41 m/sec, 5669 t fired, .
Time elapsed: 2766 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 210/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8278 m, 43 m/sec, 8277 t fired, .
52 LTL EXCL 155/246 1/5 RERS17pb113-PT-7-LTLFireability-13 5892 m, 44 m/sec, 5891 t fired, .
Time elapsed: 2771 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 215/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8425 m, 29 m/sec, 8424 t fired, .
52 LTL EXCL 160/246 1/5 RERS17pb113-PT-7-LTLFireability-13 6114 m, 44 m/sec, 6113 t fired, .
Time elapsed: 2776 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 220/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8547 m, 24 m/sec, 8546 t fired, .
52 LTL EXCL 165/246 1/5 RERS17pb113-PT-7-LTLFireability-13 6336 m, 44 m/sec, 6335 t fired, .
Time elapsed: 2781 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 225/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8775 m, 45 m/sec, 8774 t fired, .
52 LTL EXCL 170/246 1/5 RERS17pb113-PT-7-LTLFireability-13 6558 m, 44 m/sec, 6557 t fired, .
Time elapsed: 2786 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 230/346 1/5 RERS17pb113-PT-7-LTLFireability-10 8996 m, 44 m/sec, 8995 t fired, .
52 LTL EXCL 175/246 1/5 RERS17pb113-PT-7-LTLFireability-13 6774 m, 43 m/sec, 6773 t fired, .
Time elapsed: 2791 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 235/346 1/5 RERS17pb113-PT-7-LTLFireability-10 9218 m, 44 m/sec, 9217 t fired, .
52 LTL EXCL 180/246 1/5 RERS17pb113-PT-7-LTLFireability-13 6994 m, 44 m/sec, 6993 t fired, .
Time elapsed: 2796 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 240/346 1/5 RERS17pb113-PT-7-LTLFireability-10 9433 m, 43 m/sec, 9432 t fired, .
52 LTL EXCL 185/246 1/5 RERS17pb113-PT-7-LTLFireability-13 7232 m, 47 m/sec, 7231 t fired, .
Time elapsed: 2801 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 245/346 1/5 RERS17pb113-PT-7-LTLFireability-10 9649 m, 43 m/sec, 9648 t fired, .
52 LTL EXCL 190/246 1/5 RERS17pb113-PT-7-LTLFireability-13 7459 m, 45 m/sec, 7458 t fired, .
Time elapsed: 2806 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 250/346 1/5 RERS17pb113-PT-7-LTLFireability-10 9839 m, 38 m/sec, 9838 t fired, .
52 LTL EXCL 195/246 1/5 RERS17pb113-PT-7-LTLFireability-13 7696 m, 47 m/sec, 7695 t fired, .
Time elapsed: 2811 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 255/346 1/5 RERS17pb113-PT-7-LTLFireability-10 10060 m, 44 m/sec, 10059 t fired, .
52 LTL EXCL 200/246 1/5 RERS17pb113-PT-7-LTLFireability-13 7931 m, 47 m/sec, 7930 t fired, .
Time elapsed: 2816 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 260/346 1/5 RERS17pb113-PT-7-LTLFireability-10 10281 m, 44 m/sec, 10280 t fired, .
52 LTL EXCL 205/246 1/5 RERS17pb113-PT-7-LTLFireability-13 8153 m, 44 m/sec, 8152 t fired, .
Time elapsed: 2821 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 265/346 1/5 RERS17pb113-PT-7-LTLFireability-10 10489 m, 41 m/sec, 10488 t fired, .
52 LTL EXCL 210/246 1/5 RERS17pb113-PT-7-LTLFireability-13 8371 m, 43 m/sec, 8370 t fired, .
Time elapsed: 2826 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 270/346 1/5 RERS17pb113-PT-7-LTLFireability-10 10705 m, 43 m/sec, 10704 t fired, .
52 LTL EXCL 215/246 1/5 RERS17pb113-PT-7-LTLFireability-13 8591 m, 44 m/sec, 8590 t fired, .
Time elapsed: 2831 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 275/346 1/5 RERS17pb113-PT-7-LTLFireability-10 10923 m, 43 m/sec, 10922 t fired, .
52 LTL EXCL 220/246 1/5 RERS17pb113-PT-7-LTLFireability-13 8823 m, 46 m/sec, 8822 t fired, .
Time elapsed: 2836 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 280/346 1/5 RERS17pb113-PT-7-LTLFireability-10 11150 m, 45 m/sec, 11149 t fired, .
52 LTL EXCL 225/246 1/5 RERS17pb113-PT-7-LTLFireability-13 9055 m, 46 m/sec, 9054 t fired, .
Time elapsed: 2841 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
RERS17pb113-PT-7-LTLFireability-02: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-03: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-04: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-05: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-06: LTL true LTL model checker
RERS17pb113-PT-7-LTLFireability-07: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-08: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-11: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-12: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-14: CONJ true CONJ
RERS17pb113-PT-7-LTLFireability-15: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb113-PT-7-LTLFireability-09: CONJ 0 1 0 0 3 0 0 0
RERS17pb113-PT-7-LTLFireability-10: CONJ 0 1 1 0 2 0 0 0
RERS17pb113-PT-7-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 LTL EXCL 285/346 1/5 RERS17pb113-PT-7-LTLFireability-10 11398 m, 49 m/sec, 11397 t fired, .
52 LTL EXCL 230/246 1/5 RERS17pb113-PT-7-LTLFireability-13 9289 m, 46 m/sec, 9288 t fired, .
Time elapsed: 2846 secs. Pages in use: 16
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb113-PT-7-LTLFireability-00: LTL false LTL model checker
RERS17pb113-PT-7-LTLFireability-01: CONJ false findpath
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-7"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RERS17pb113-PT-7, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r326-tall-167889197900052"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-7.tgz
mv RERS17pb113-PT-7 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;