fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r295-tall-167873948500892
Last Updated
May 14, 2023

About the Execution of LoLa+red for QuasiCertifProtocol-PT-22

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1581.319 410266.00 442901.00 1121.10 FFF??FFFTT?FFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948500892.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is QuasiCertifProtocol-PT-22, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948500892
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 33K Feb 26 01:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 225K Feb 26 01:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 26 01:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 100K Feb 26 01:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 49K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 214K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 102K Feb 26 01:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 667K Feb 26 01:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 26 01:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 117K Feb 26 01:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 8.0K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 503K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-00
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-01
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-02
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-03
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-04
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-05
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-06
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-07
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-08
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-09
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-10
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-11
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-12
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-13
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-14
FORMULA_NAME QuasiCertifProtocol-PT-22-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678918850984

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-PT-22
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 22:20:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 22:20:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 22:20:52] [INFO ] Load time of PNML (sax parser for PT used): 84 ms
[2023-03-15 22:20:52] [INFO ] Transformed 1966 places.
[2023-03-15 22:20:52] [INFO ] Transformed 356 transitions.
[2023-03-15 22:20:52] [INFO ] Parsed PT model containing 1966 places and 356 transitions and 4323 arcs in 151 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 9 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 4 formulas.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 743 out of 1966 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1966/1966 places, 356/356 transitions.
Reduce places removed 50 places and 0 transitions.
Iterating post reduction 0 with 50 rules applied. Total rules applied 50 place count 1916 transition count 356
Applied a total of 50 rules in 166 ms. Remains 1916 /1966 variables (removed 50) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:20:53] [INFO ] Computed 1562 place invariants in 65 ms
[2023-03-15 22:20:55] [INFO ] Implicit Places using invariants in 2019 ms returned []
[2023-03-15 22:20:55] [INFO ] Invariant cache hit.
[2023-03-15 22:20:57] [INFO ] Implicit Places using invariants and state equation in 2344 ms returned []
Implicit Place search using SMT with State Equation took 4496 ms to find 0 implicit places.
[2023-03-15 22:20:57] [INFO ] Invariant cache hit.
[2023-03-15 22:20:58] [INFO ] Dead Transitions using invariants and state equation in 622 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1916/1966 places, 356/356 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5287 ms. Remains : 1916/1966 places, 356/356 transitions.
Support contains 743 out of 1916 places after structural reductions.
[2023-03-15 22:20:58] [INFO ] Flatten gal took : 130 ms
[2023-03-15 22:20:58] [INFO ] Flatten gal took : 74 ms
[2023-03-15 22:20:58] [INFO ] Input system was already deterministic with 356 transitions.
Incomplete random walk after 10000 steps, including 371 resets, run finished after 489 ms. (steps per millisecond=20 ) properties (out of 20) seen :2
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-15 22:20:59] [INFO ] Invariant cache hit.
[2023-03-15 22:21:00] [INFO ] [Real]Absence check using 0 positive and 1562 generalized place invariants in 293 ms returned sat
[2023-03-15 22:21:01] [INFO ] After 598ms SMT Verify possible using state equation in real domain returned unsat :1 sat :1 real:16
[2023-03-15 22:21:01] [INFO ] After 687ms SMT Verify possible using trap constraints in real domain returned unsat :1 sat :1 real:16
Attempting to minimize the solution found.
Minimization took 49 ms.
[2023-03-15 22:21:01] [INFO ] After 2193ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :1 real:16
[2023-03-15 22:21:02] [INFO ] [Nat]Absence check using 0 positive and 1562 generalized place invariants in 278 ms returned sat
[2023-03-15 22:21:05] [INFO ] After 2056ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :16
[2023-03-15 22:21:07] [INFO ] After 4573ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :16
Attempting to minimize the solution found.
Minimization took 1894 ms.
[2023-03-15 22:21:09] [INFO ] After 7973ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :16
Fused 18 Parikh solutions to 16 different solutions.
Finished Parikh walk after 128 steps, including 0 resets, run visited all 3 properties in 4 ms. (steps per millisecond=32 )
Parikh walk visited 16 properties in 36 ms.
Successfully simplified 2 atomic propositions for a total of 12 simplifications.
Computed a total of 1916 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1916 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((p0&&G(F(p1))&&(F(p0) U p2)))))'
Support contains 25 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 139 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:21:10] [INFO ] Invariant cache hit.
[2023-03-15 22:21:12] [INFO ] Implicit Places using invariants in 2040 ms returned []
[2023-03-15 22:21:12] [INFO ] Invariant cache hit.
[2023-03-15 22:21:16] [INFO ] Implicit Places using invariants and state equation in 4229 ms returned [1155, 1156, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1181, 1183, 1184, 1185, 1186]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 6285 ms to find 23 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1893/1916 places, 356/356 transitions.
Applied a total of 0 rules in 58 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 6483 ms. Remains : 1893/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 345 ms :[(OR (NOT p1) (NOT p0) (NOT p2)), (OR (NOT p1) (NOT p0) (NOT p2)), (NOT p1), (NOT p1), (OR (NOT p0) (NOT p2)), (NOT p2), (NOT p0)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={} source=1 dest: 2}, { cond=true, acceptance={} source=1 dest: 3}, { cond=(NOT p0), acceptance={} source=1 dest: 4}, { cond=(AND p0 (NOT p2)), acceptance={} source=1 dest: 5}], [{ cond=(NOT p1), acceptance={0} source=2 dest: 2}], [{ cond=(NOT p1), acceptance={} source=3 dest: 2}, { cond=true, acceptance={} source=3 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=4 dest: 4}, { cond=(AND p0 (NOT p2)), acceptance={0} source=4 dest: 5}], [{ cond=(NOT p2), acceptance={0} source=5 dest: 5}, { cond=(AND (NOT p0) (NOT p2)), acceptance={0} source=5 dest: 6}], [{ cond=(NOT p0), acceptance={0} source=6 dest: 6}]], initial=0, aps=[p1:(AND (LT s97 1) (LT s67 1) (LT s98 1) (LT s69 1) (LT s68 1) (LT s70 1) (LT s75 1) (LT s74 1) (LT s77 1) (LT s76 1) (LT s79 1) (LT s78 1) (LT s81 1) (LT...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null][false, false, false, false, false, false, false]]
Stuttering criterion allowed to conclude after 54 steps with 1 reset in 2 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-00 finished in 6887 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((p0 U (G(p1) U p2)))'
Support contains 71 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1363 are kept as prefixes of interest. Removing 553 places using SCC suffix rule.20 ms
Discarding 553 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1318 transition count 264
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1318 transition count 264
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1317 transition count 263
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 94 place count 1317 transition count 263
Applied a total of 94 rules in 418 ms. Remains 1317 /1916 variables (removed 599) and now considering 263/356 (removed 93) transitions.
// Phase 1: matrix 263 rows 1317 cols
[2023-03-15 22:21:17] [INFO ] Computed 1056 place invariants in 40 ms
[2023-03-15 22:21:18] [INFO ] Implicit Places using invariants in 1213 ms returned []
[2023-03-15 22:21:18] [INFO ] Invariant cache hit.
[2023-03-15 22:21:20] [INFO ] Implicit Places using invariants and state equation in 2180 ms returned [579, 580, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 605, 607, 608, 609, 610]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 3402 ms to find 23 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 1294/1916 places, 263/356 transitions.
Applied a total of 0 rules in 71 ms. Remains 1294 /1294 variables (removed 0) and now considering 263/263 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 3892 ms. Remains : 1294/1916 places, 263/356 transitions.
Stuttering acceptance computed with spot in 121 ms :[(NOT p1), true, (OR (NOT p1) (NOT p2)), (NOT p2)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=p1, acceptance={} source=0 dest: 0}, { cond=(NOT p1), acceptance={} source=0 dest: 1}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=(AND p2 p1), acceptance={0} source=2 dest: 0}, { cond=(NOT p1), acceptance={0} source=2 dest: 1}, { cond=(AND (NOT p2) p1), acceptance={0} source=2 dest: 2}], [{ cond=(AND (NOT p2) (NOT p1) (NOT p0)), acceptance={0} source=3 dest: 1}, { cond=(AND (NOT p2) p1 (NOT p0)), acceptance={0} source=3 dest: 2}, { cond=(AND (NOT p2) p0), acceptance={0} source=3 dest: 3}]], initial=3, aps=[p1:(AND (GEQ s111 1) (GEQ s1180 1) (GEQ s1181 1) (GEQ s1188 1) (GEQ s1189 1) (GEQ s1190 1) (GEQ s1191 1) (GEQ s1192 1) (GEQ s1193 1) (GEQ s1194 1) (GEQ s1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][true, true, true, true]]
Entered a terminal (fully accepting) state of product in 11 steps with 0 reset in 0 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-01 finished in 4035 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Support contains 576 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 51 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:21:20] [INFO ] Computed 1562 place invariants in 17 ms
[2023-03-15 22:21:22] [INFO ] Implicit Places using invariants in 1595 ms returned []
[2023-03-15 22:21:22] [INFO ] Invariant cache hit.
[2023-03-15 22:21:25] [INFO ] Implicit Places using invariants and state equation in 2551 ms returned []
Implicit Place search using SMT with State Equation took 4150 ms to find 0 implicit places.
[2023-03-15 22:21:25] [INFO ] Invariant cache hit.
[2023-03-15 22:21:25] [INFO ] Dead Transitions using invariants and state equation in 604 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4808 ms. Remains : 1916/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 66 ms :[true, (NOT p0), (NOT p0)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(OR (AND (OR (LT s0 1) (LT s84 1)) (OR (LT s0 1) (LT s85 1)) (OR (LT s0 1) (LT s82 1)) (OR (LT s0 1) (LT s83 1)) (OR (LT s0 1) (LT s80 1)) (OR (LT s0 1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 3714 reset in 621 ms.
Product exploration explored 100000 steps with 3717 reset in 572 ms.
Computed a total of 1916 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1916 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 156 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 78 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 373 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 19 resets, run finished after 171 ms. (steps per millisecond=58 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1426159 steps, run timeout after 3001 ms. (steps per millisecond=475 ) properties seen :{}
Probabilistic random walk after 1426159 steps, saw 195853 distinct states, run finished after 3002 ms. (steps per millisecond=475 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:21:30] [INFO ] Invariant cache hit.
[2023-03-15 22:21:31] [INFO ] [Real]Absence check using 0 positive and 1562 generalized place invariants in 294 ms returned sat
[2023-03-15 22:21:32] [INFO ] After 1583ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 22:21:32] [INFO ] [Nat]Absence check using 0 positive and 1562 generalized place invariants in 287 ms returned sat
[2023-03-15 22:21:33] [INFO ] After 1097ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-15 22:21:34] [INFO ] After 2086ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 893 ms.
[2023-03-15 22:21:35] [INFO ] After 3496ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 52 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=52 )
Parikh walk visited 1 properties in 5 ms.
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 207 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 77 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 57 ms :[true, (NOT p0), (NOT p0)]
Support contains 576 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 48 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:21:36] [INFO ] Invariant cache hit.
[2023-03-15 22:21:37] [INFO ] Implicit Places using invariants in 1563 ms returned []
[2023-03-15 22:21:37] [INFO ] Invariant cache hit.
[2023-03-15 22:21:40] [INFO ] Implicit Places using invariants and state equation in 2583 ms returned []
Implicit Place search using SMT with State Equation took 4154 ms to find 0 implicit places.
[2023-03-15 22:21:40] [INFO ] Invariant cache hit.
[2023-03-15 22:21:41] [INFO ] Dead Transitions using invariants and state equation in 650 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4859 ms. Remains : 1916/1916 places, 356/356 transitions.
Computed a total of 1916 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1916 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 184 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 86 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 371 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 174 ms. (steps per millisecond=57 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1369723 steps, run timeout after 3001 ms. (steps per millisecond=456 ) properties seen :{}
Probabilistic random walk after 1369723 steps, saw 188569 distinct states, run finished after 3001 ms. (steps per millisecond=456 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:21:44] [INFO ] Invariant cache hit.
[2023-03-15 22:21:45] [INFO ] [Real]Absence check using 0 positive and 1562 generalized place invariants in 300 ms returned sat
[2023-03-15 22:21:46] [INFO ] After 1590ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 22:21:46] [INFO ] [Nat]Absence check using 0 positive and 1562 generalized place invariants in 298 ms returned sat
[2023-03-15 22:21:48] [INFO ] After 1109ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-15 22:21:49] [INFO ] After 2118ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 935 ms.
[2023-03-15 22:21:50] [INFO ] After 3591ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 52 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=26 )
Parikh walk visited 1 properties in 1 ms.
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 218 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 78 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 70 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 80 ms :[true, (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 3720 reset in 516 ms.
Product exploration explored 100000 steps with 3714 reset in 543 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 74 ms :[true, (NOT p0), (NOT p0)]
Support contains 576 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1892 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.8 ms
Discarding 24 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -2
Deduced a syphon composed of 2 places in 1 ms
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 1892 transition count 356
Deduced a syphon composed of 2 places in 0 ms
Applied a total of 3 rules in 245 ms. Remains 1892 /1916 variables (removed 24) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:21:52] [INFO ] Redundant transitions in 80 ms returned []
// Phase 1: matrix 356 rows 1892 cols
[2023-03-15 22:21:52] [INFO ] Computed 1540 place invariants in 27 ms
[2023-03-15 22:21:52] [INFO ] Dead Transitions using invariants and state equation in 635 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 1892/1916 places, 356/356 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 976 ms. Remains : 1892/1916 places, 356/356 transitions.
Support contains 576 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 37 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:21:52] [INFO ] Computed 1562 place invariants in 14 ms
[2023-03-15 22:21:54] [INFO ] Implicit Places using invariants in 1622 ms returned []
[2023-03-15 22:21:54] [INFO ] Invariant cache hit.
[2023-03-15 22:21:57] [INFO ] Implicit Places using invariants and state equation in 2608 ms returned []
Implicit Place search using SMT with State Equation took 4249 ms to find 0 implicit places.
[2023-03-15 22:21:57] [INFO ] Invariant cache hit.
[2023-03-15 22:21:57] [INFO ] Dead Transitions using invariants and state equation in 646 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4935 ms. Remains : 1916/1916 places, 356/356 transitions.
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-03 finished in 37028 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(!p0)))'
Support contains 1 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 88 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:21:57] [INFO ] Invariant cache hit.
[2023-03-15 22:22:00] [INFO ] Implicit Places using invariants in 2162 ms returned []
[2023-03-15 22:22:00] [INFO ] Invariant cache hit.
[2023-03-15 22:22:04] [INFO ] Implicit Places using invariants and state equation in 4263 ms returned [1155, 1156, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1181, 1183, 1184, 1185, 1186]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 6432 ms to find 23 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1893/1916 places, 356/356 transitions.
Applied a total of 0 rules in 65 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 6587 ms. Remains : 1893/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 99 ms :[true, p0, p0]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=p0, acceptance={} source=2 dest: 0}, { cond=(NOT p0), acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(GEQ s156 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 3711 reset in 295 ms.
Product exploration explored 100000 steps with 3718 reset in 255 ms.
Computed a total of 1893 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1893 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 178 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 69 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 371 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 22 resets, run finished after 8 ms. (steps per millisecond=1250 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1855731 steps, run timeout after 3001 ms. (steps per millisecond=618 ) properties seen :{}
Probabilistic random walk after 1855731 steps, saw 251391 distinct states, run finished after 3001 ms. (steps per millisecond=618 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 356 rows 1893 cols
[2023-03-15 22:22:08] [INFO ] Computed 1540 place invariants in 199 ms
[2023-03-15 22:22:09] [INFO ] [Real]Absence check using 0 positive and 1540 generalized place invariants in 278 ms returned sat
[2023-03-15 22:22:09] [INFO ] After 502ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:22:09] [INFO ] After 581ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 45 ms.
[2023-03-15 22:22:10] [INFO ] After 1138ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 51 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=51 )
Parikh walk visited 1 properties in 0 ms.
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 5 factoid took 202 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 79 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 75 ms :[true, p0, p0]
Support contains 1 out of 1893 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1893/1893 places, 356/356 transitions.
Applied a total of 0 rules in 61 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:22:10] [INFO ] Invariant cache hit.
[2023-03-15 22:22:12] [INFO ] Implicit Places using invariants in 2019 ms returned []
[2023-03-15 22:22:12] [INFO ] Invariant cache hit.
[2023-03-15 22:22:16] [INFO ] Implicit Places using invariants and state equation in 3708 ms returned []
Implicit Place search using SMT with State Equation took 5730 ms to find 0 implicit places.
[2023-03-15 22:22:16] [INFO ] Invariant cache hit.
[2023-03-15 22:22:16] [INFO ] Dead Transitions using invariants and state equation in 598 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6391 ms. Remains : 1893/1893 places, 356/356 transitions.
Computed a total of 1893 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1893 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 146 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 69 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 371 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 8 ms. (steps per millisecond=1250 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1857355 steps, run timeout after 3001 ms. (steps per millisecond=618 ) properties seen :{}
Probabilistic random walk after 1857355 steps, saw 251657 distinct states, run finished after 3001 ms. (steps per millisecond=618 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:22:20] [INFO ] Invariant cache hit.
[2023-03-15 22:22:20] [INFO ] [Real]Absence check using 0 positive and 1540 generalized place invariants in 288 ms returned sat
[2023-03-15 22:22:21] [INFO ] After 513ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:22:21] [INFO ] After 582ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 39 ms.
[2023-03-15 22:22:21] [INFO ] After 1131ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 51 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=51 )
Parikh walk visited 1 properties in 0 ms.
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 5 factoid took 183 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 75 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 68 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 89 ms :[true, p0, p0]
Product exploration explored 100000 steps with 3715 reset in 250 ms.
Product exploration explored 100000 steps with 3711 reset in 256 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 96 ms :[true, p0, p0]
Support contains 1 out of 1893 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1893/1893 places, 356/356 transitions.
Graph (complete) has 14725 edges and 1893 vertex of which 1340 are kept as prefixes of interest. Removing 553 places using SCC suffix rule.12 ms
Discarding 553 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1295 transition count 264
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1295 transition count 264
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: -1
Deduced a syphon composed of 1 places in 0 ms
Iterating global reduction 0 with 1 rules applied. Total rules applied 92 place count 1295 transition count 265
Deduced a syphon composed of 1 places in 0 ms
Applied a total of 92 rules in 131 ms. Remains 1295 /1893 variables (removed 598) and now considering 265/356 (removed 91) transitions.
[2023-03-15 22:22:22] [INFO ] Redundant transitions in 17 ms returned []
// Phase 1: matrix 265 rows 1295 cols
[2023-03-15 22:22:22] [INFO ] Computed 1034 place invariants in 14 ms
[2023-03-15 22:22:23] [INFO ] Dead Transitions using invariants and state equation in 423 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 1295/1893 places, 265/356 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 593 ms. Remains : 1295/1893 places, 265/356 transitions.
Support contains 1 out of 1893 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1893/1893 places, 356/356 transitions.
Applied a total of 0 rules in 60 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1893 cols
[2023-03-15 22:22:23] [INFO ] Computed 1540 place invariants in 206 ms
[2023-03-15 22:22:25] [INFO ] Implicit Places using invariants in 2135 ms returned []
[2023-03-15 22:22:25] [INFO ] Invariant cache hit.
[2023-03-15 22:22:28] [INFO ] Implicit Places using invariants and state equation in 3617 ms returned []
Implicit Place search using SMT with State Equation took 5757 ms to find 0 implicit places.
[2023-03-15 22:22:28] [INFO ] Invariant cache hit.
[2023-03-15 22:22:29] [INFO ] Dead Transitions using invariants and state equation in 620 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6440 ms. Remains : 1893/1893 places, 356/356 transitions.
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-04 finished in 31774 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(G(p0)) U p1))'
Support contains 25 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1363 are kept as prefixes of interest. Removing 553 places using SCC suffix rule.4 ms
Discarding 553 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1317 transition count 263
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1317 transition count 263
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1316 transition count 262
Applied a total of 93 rules in 134 ms. Remains 1316 /1916 variables (removed 600) and now considering 262/356 (removed 94) transitions.
// Phase 1: matrix 262 rows 1316 cols
[2023-03-15 22:22:29] [INFO ] Computed 1056 place invariants in 6 ms
[2023-03-15 22:22:31] [INFO ] Implicit Places using invariants in 1251 ms returned []
[2023-03-15 22:22:31] [INFO ] Invariant cache hit.
[2023-03-15 22:22:33] [INFO ] Implicit Places using invariants and state equation in 2167 ms returned [579, 580, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 605, 607, 608, 609, 610, 1275, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300]
Discarding 46 places :
Implicit Place search using SMT with State Equation took 3422 ms to find 46 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 1270/1916 places, 262/356 transitions.
Applied a total of 0 rules in 58 ms. Remains 1270 /1270 variables (removed 0) and now considering 262/262 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 3614 ms. Remains : 1270/1916 places, 262/356 transitions.
Stuttering acceptance computed with spot in 60 ms :[(NOT p1), (NOT p0)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-06 automaton TGBA Formula[mat=[[{ cond=(NOT p1), acceptance={0} source=0 dest: 0}, { cond=(NOT p1), acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(OR (GEQ s110 1) (AND (GEQ s111 1) (GEQ s1180 1) (GEQ s1181 1) (GEQ s1188 1) (GEQ s1189 1) (GEQ s1190 1) (GEQ s1191 1) (GEQ s1192 1) (GEQ s1193 1) (GEQ...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 28 steps with 0 reset in 0 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-06 finished in 3688 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F(!p0)))'
Support contains 1 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1387 are kept as prefixes of interest. Removing 529 places using SCC suffix rule.4 ms
Discarding 529 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1341 transition count 265
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1341 transition count 265
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1340 transition count 264
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 94 place count 1340 transition count 264
Applied a total of 94 rules in 171 ms. Remains 1340 /1916 variables (removed 576) and now considering 264/356 (removed 92) transitions.
// Phase 1: matrix 264 rows 1340 cols
[2023-03-15 22:22:33] [INFO ] Computed 1078 place invariants in 6 ms
[2023-03-15 22:22:34] [INFO ] Implicit Places using invariants in 1179 ms returned []
[2023-03-15 22:22:34] [INFO ] Invariant cache hit.
[2023-03-15 22:22:37] [INFO ] Implicit Places using invariants and state equation in 2376 ms returned [580, 581, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 606, 608, 609, 610, 611, 1276, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301]
Discarding 46 places :
Implicit Place search using SMT with State Equation took 3567 ms to find 46 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 1294/1916 places, 264/356 transitions.
Applied a total of 0 rules in 51 ms. Remains 1294 /1294 variables (removed 0) and now considering 264/264 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 3790 ms. Remains : 1294/1916 places, 264/356 transitions.
Stuttering acceptance computed with spot in 70 ms :[p0, p0]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-08 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=p0, acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(GEQ s117 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 3472 reset in 265 ms.
Product exploration explored 100000 steps with 3477 reset in 281 ms.
Computed a total of 1294 stabilizing places and 264 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1294 transition count 264
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Property proved to be true thanks to knowledge :(F (G (NOT p0)))
Knowledge based reduction with 4 factoid took 86 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-08 TRUE TECHNIQUES KNOWLEDGE
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-08 finished in 4679 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((!(!p0 U X(X(p0)))||X(X(p1))))'
Support contains 26 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 63 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:22:38] [INFO ] Computed 1562 place invariants in 22 ms
[2023-03-15 22:22:40] [INFO ] Implicit Places using invariants in 2047 ms returned []
[2023-03-15 22:22:40] [INFO ] Invariant cache hit.
[2023-03-15 22:22:43] [INFO ] Implicit Places using invariants and state equation in 3452 ms returned [1155, 1156, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1178, 1181, 1183, 1184, 1185, 1186]
Discarding 22 places :
Implicit Place search using SMT with State Equation took 5504 ms to find 22 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1894/1916 places, 356/356 transitions.
Applied a total of 0 rules in 72 ms. Remains 1894 /1894 variables (removed 0) and now considering 356/356 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 5640 ms. Remains : 1894/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 266 ms :[(AND p0 (NOT p1)), (AND p0 (NOT p1)), p0, (AND p0 (NOT p1)), (AND p0 (NOT p1)), true, (AND p0 (NOT p1)), (AND p0 (NOT p1)), p0]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=0 dest: 2}, { cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 5}], [{ cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 5}], [{ cond=p0, acceptance={} source=2 dest: 5}], [{ cond=p0, acceptance={} source=3 dest: 0}, { cond=(NOT p0), acceptance={} source=3 dest: 4}], [{ cond=(AND p0 (NOT p1)), acceptance={} source=4 dest: 5}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=4 dest: 8}], [{ cond=true, acceptance={0} source=5 dest: 5}], [{ cond=true, acceptance={} source=6 dest: 1}], [{ cond=(NOT p0), acceptance={} source=7 dest: 3}, { cond=p0, acceptance={} source=7 dest: 6}], [{ cond=p0, acceptance={} source=8 dest: 5}, { cond=(NOT p0), acceptance={} source=8 dest: 8}]], initial=7, aps=[p0:(AND (GEQ s867 1) (GEQ s868 1) (GEQ s869 1) (GEQ s870 1) (GEQ s874 1) (GEQ s973 1) (GEQ s974 1) (GEQ s979 1) (GEQ s980 1) (GEQ s981 1) (GEQ s982 1) (GE...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null, null, null][false, false, false, false, false, false, false, false, false]]
Product exploration explored 100000 steps with 3712 reset in 245 ms.
Product exploration explored 100000 steps with 3716 reset in 260 ms.
Computed a total of 1894 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1894 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT p0)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (F (G (NOT p0))), (F (G (NOT p1)))]
False Knowledge obtained : []
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 6 factoid took 218 ms. Reduced automaton from 9 states, 14 edges and 2 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 66 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 371 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 25 resets, run finished after 12 ms. (steps per millisecond=833 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1832777 steps, run timeout after 3001 ms. (steps per millisecond=610 ) properties seen :{}
Probabilistic random walk after 1832777 steps, saw 248028 distinct states, run finished after 3001 ms. (steps per millisecond=610 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 356 rows 1894 cols
[2023-03-15 22:22:48] [INFO ] Computed 1540 place invariants in 21 ms
[2023-03-15 22:22:48] [INFO ] [Real]Absence check using 0 positive and 1540 generalized place invariants in 278 ms returned sat
[2023-03-15 22:22:49] [INFO ] After 678ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:22:49] [INFO ] After 867ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 172 ms.
[2023-03-15 22:22:49] [INFO ] After 1542ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 97 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=48 )
Parikh walk visited 1 properties in 1 ms.
Knowledge obtained : [(AND (NOT p0) (NOT p1)), (X (NOT p0)), (X (X (AND (NOT p0) (NOT p1)))), (X (X (NOT (AND p0 (NOT p1))))), (F (G (NOT p0))), (F (G (NOT p1)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 6 factoid took 225 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 87 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 70 ms :[true, p0, p0]
Support contains 24 out of 1894 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 1894/1894 places, 356/356 transitions.
Applied a total of 0 rules in 62 ms. Remains 1894 /1894 variables (removed 0) and now considering 356/356 (removed 0) transitions.
[2023-03-15 22:22:50] [INFO ] Invariant cache hit.
[2023-03-15 22:22:52] [INFO ] Implicit Places using invariants in 1973 ms returned []
[2023-03-15 22:22:52] [INFO ] Invariant cache hit.
[2023-03-15 22:22:55] [INFO ] Implicit Places using invariants and state equation in 3562 ms returned []
Implicit Place search using SMT with State Equation took 5536 ms to find 0 implicit places.
[2023-03-15 22:22:55] [INFO ] Invariant cache hit.
[2023-03-15 22:22:56] [INFO ] Dead Transitions using invariants and state equation in 610 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6209 ms. Remains : 1894/1894 places, 356/356 transitions.
Computed a total of 1894 stabilizing places and 356 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1894 transition count 356
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 188 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 83 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 372 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 20 resets, run finished after 13 ms. (steps per millisecond=769 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1833978 steps, run timeout after 3001 ms. (steps per millisecond=611 ) properties seen :{}
Probabilistic random walk after 1833978 steps, saw 248137 distinct states, run finished after 3001 ms. (steps per millisecond=611 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:22:59] [INFO ] Invariant cache hit.
[2023-03-15 22:23:00] [INFO ] [Real]Absence check using 0 positive and 1540 generalized place invariants in 281 ms returned sat
[2023-03-15 22:23:00] [INFO ] After 694ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:23:01] [INFO ] After 881ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 172 ms.
[2023-03-15 22:23:01] [INFO ] After 1555ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 98 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=98 )
Parikh walk visited 1 properties in 2 ms.
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 5 factoid took 221 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 87 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 68 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 75 ms :[true, p0, p0]
Product exploration explored 100000 steps with 3714 reset in 245 ms.
Product exploration explored 100000 steps with 3708 reset in 262 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 74 ms :[true, p0, p0]
Support contains 24 out of 1894 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1894/1894 places, 356/356 transitions.
Graph (complete) has 14749 edges and 1894 vertex of which 1341 are kept as prefixes of interest. Removing 553 places using SCC suffix rule.8 ms
Discarding 553 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1296 transition count 264
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1296 transition count 264
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: -2
Deduced a syphon composed of 2 places in 0 ms
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1296 transition count 266
Deduced a syphon composed of 2 places in 0 ms
Applied a total of 93 rules in 119 ms. Remains 1296 /1894 variables (removed 598) and now considering 266/356 (removed 90) transitions.
[2023-03-15 22:23:02] [INFO ] Redundant transitions in 24 ms returned []
// Phase 1: matrix 266 rows 1296 cols
[2023-03-15 22:23:02] [INFO ] Computed 1034 place invariants in 6 ms
[2023-03-15 22:23:03] [INFO ] Dead Transitions using invariants and state equation in 392 ms found 0 transitions.
Starting structural reductions in SI_LTL mode, iteration 1 : 1296/1894 places, 266/356 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 562 ms. Remains : 1296/1894 places, 266/356 transitions.
Support contains 24 out of 1894 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1894/1894 places, 356/356 transitions.
Applied a total of 0 rules in 57 ms. Remains 1894 /1894 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1894 cols
[2023-03-15 22:23:03] [INFO ] Computed 1540 place invariants in 21 ms
[2023-03-15 22:23:05] [INFO ] Implicit Places using invariants in 1943 ms returned []
[2023-03-15 22:23:05] [INFO ] Invariant cache hit.
[2023-03-15 22:23:08] [INFO ] Implicit Places using invariants and state equation in 3549 ms returned []
Implicit Place search using SMT with State Equation took 5495 ms to find 0 implicit places.
[2023-03-15 22:23:08] [INFO ] Invariant cache hit.
[2023-03-15 22:23:09] [INFO ] Dead Transitions using invariants and state equation in 594 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6147 ms. Remains : 1894/1894 places, 356/356 transitions.
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-10 finished in 31206 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 1 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 65 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:23:09] [INFO ] Computed 1562 place invariants in 22 ms
[2023-03-15 22:23:11] [INFO ] Implicit Places using invariants in 2060 ms returned []
[2023-03-15 22:23:11] [INFO ] Invariant cache hit.
[2023-03-15 22:23:15] [INFO ] Implicit Places using invariants and state equation in 3808 ms returned [1155, 1156, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1181, 1183, 1184, 1185, 1186]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 5872 ms to find 23 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1893/1916 places, 356/356 transitions.
Applied a total of 0 rules in 64 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 6003 ms. Remains : 1893/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 56 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-11 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(GEQ s31 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Stuttering criterion allowed to conclude after 26 steps with 0 reset in 1 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-11 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-11 finished in 6079 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((p0 U G((p1&&(p1 U (p2 U p3))))))'
Support contains 5 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1892 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.5 ms
Discarding 24 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 3 place count 1891 transition count 353
Applied a total of 3 rules in 151 ms. Remains 1891 /1916 variables (removed 25) and now considering 353/356 (removed 3) transitions.
// Phase 1: matrix 353 rows 1891 cols
[2023-03-15 22:23:15] [INFO ] Computed 1540 place invariants in 12 ms
[2023-03-15 22:23:17] [INFO ] Implicit Places using invariants in 2050 ms returned []
[2023-03-15 22:23:17] [INFO ] Invariant cache hit.
[2023-03-15 22:23:21] [INFO ] Implicit Places using invariants and state equation in 3622 ms returned [1153, 1154, 1161, 1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1179, 1181, 1182, 1183, 1184]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 5675 ms to find 23 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 1868/1916 places, 353/356 transitions.
Applied a total of 0 rules in 74 ms. Remains 1868 /1868 variables (removed 0) and now considering 353/353 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 5901 ms. Remains : 1868/1916 places, 353/356 transitions.
Stuttering acceptance computed with spot in 302 ms :[(OR (NOT p1) (NOT p3)), true, (NOT p3), (OR (NOT p3) (NOT p1)), (NOT p3), (NOT p3), (NOT p3), (AND p1 (NOT p3) (NOT p2))]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-12 automaton TGBA Formula[mat=[[{ cond=(AND p1 p0), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) p0), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}, { cond=(AND p1 (NOT p3) (NOT p0)), acceptance={} source=0 dest: 2}, { cond=(AND p1 (NOT p0)), acceptance={} source=0 dest: 3}, { cond=(AND p1 (NOT p3) p0), acceptance={0} source=0 dest: 4}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=(AND (NOT p1) (NOT p3) (NOT p2)), acceptance={} source=2 dest: 1}, { cond=(AND p1 (NOT p3)), acceptance={0} source=2 dest: 2}, { cond=(AND (NOT p1) (NOT p3) p2), acceptance={} source=2 dest: 5}], [{ cond=(NOT p1), acceptance={} source=3 dest: 1}, { cond=(AND p1 (NOT p3)), acceptance={} source=3 dest: 2}, { cond=p1, acceptance={} source=3 dest: 3}], [{ cond=(AND (NOT p1) (NOT p3) (NOT p2) p0), acceptance={0} source=4 dest: 0}, { cond=(AND (NOT p1) (NOT p3) (NOT p2) (NOT p0)), acceptance={} source=4 dest: 1}, { cond=(AND p1 (NOT p3) (NOT p0)), acceptance={} source=4 dest: 2}, { cond=(AND p1 (NOT p3) p0), acceptance={0} source=4 dest: 4}, { cond=(AND (NOT p1) (NOT p3) p2 (NOT p0)), acceptance={} source=4 dest: 5}, { cond=(AND (NOT p1) (NOT p3) p2 p0), acceptance={0} source=4 dest: 6}], [{ cond=(AND (NOT p3) (NOT p2)), acceptance={} source=5 dest: 1}, { cond=(AND (NOT p3) p2), acceptance={0} source=5 dest: 5}], [{ cond=(AND p1 (NOT p3) (NOT p2) p0), acceptance={} source=6 dest: 0}, { cond=(AND (NOT p1) (NOT p3) (NOT p2) p0), acceptance={0} source=6 dest: 0}, { cond=(AND (NOT p1) (NOT p3) (NOT p2) (NOT p0)), acceptance={} source=6 dest: 1}, { cond=(AND p1 (NOT p3) (NOT p0)), acceptance={} source=6 dest: 2}, { cond=(AND p1 (NOT p3) (NOT p2) (NOT p0)), acceptance={} source=6 dest: 3}, { cond=(AND p1 (NOT p3) p0), acceptance={0} source=6 dest: 4}, { cond=(AND (NOT p1) (NOT p3) p2 (NOT p0)), acceptance={} source=6 dest: 5}, { cond=(AND p1 (NOT p3) p2 p0), acceptance={} source=6 dest: 6}, { cond=(AND (NOT p1) (NOT p3) p2 p0), acceptance={0} source=6 dest: 6}, { cond=(AND p1 (NOT p3) p2 (NOT p0)), acceptance={} source=6 dest: 7}], [{ cond=(AND p1 (NOT p3) (NOT p2)), acceptance={} source=7 dest: 3}, { cond=(AND p1 (NOT p3) p2), acceptance={} source=7 dest: 7}]], initial=0, aps=[p1:(GEQ s155 1), p0:(GEQ s1866 1), p3:(AND (GEQ s0 1) (GEQ s19 1)), p2:(AND (GEQ s0 1) (GEQ s118 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null, null, null, null, null, null][true, true, true, true, true, true, true, true]]
Entered a terminal (fully accepting) state of product in 14 steps with 0 reset in 0 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-12 finished in 6226 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(F(p0))))'
Support contains 24 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Applied a total of 0 rules in 66 ms. Remains 1916 /1916 variables (removed 0) and now considering 356/356 (removed 0) transitions.
// Phase 1: matrix 356 rows 1916 cols
[2023-03-15 22:23:21] [INFO ] Computed 1562 place invariants in 19 ms
[2023-03-15 22:23:23] [INFO ] Implicit Places using invariants in 2052 ms returned []
[2023-03-15 22:23:23] [INFO ] Invariant cache hit.
[2023-03-15 22:23:27] [INFO ] Implicit Places using invariants and state equation in 3522 ms returned [1155, 1156, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1181, 1183, 1184, 1185, 1186]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 5577 ms to find 23 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 1893/1916 places, 356/356 transitions.
Applied a total of 0 rules in 63 ms. Remains 1893 /1893 variables (removed 0) and now considering 356/356 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 5707 ms. Remains : 1893/1916 places, 356/356 transitions.
Stuttering acceptance computed with spot in 93 ms :[(NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-13 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 0}], [{ cond=true, acceptance={} source=2 dest: 1}]], initial=2, aps=[p0:(AND (GEQ s65 1) (GEQ s1243 1) (GEQ s1263 1) (GEQ s1287 1) (GEQ s1309 1) (GEQ s1324 1) (GEQ s1350 1) (GEQ s1368 1) (GEQ s1376 1) (GEQ s1393 1) (GEQ s14...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Stuttering criterion allowed to conclude after 25 steps with 0 reset in 1 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-13 finished in 5813 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((G(p0)||G(p1))))'
Support contains 48 out of 1916 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1387 are kept as prefixes of interest. Removing 529 places using SCC suffix rule.5 ms
Discarding 529 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1341 transition count 265
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1341 transition count 265
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1341 transition count 265
Applied a total of 93 rules in 124 ms. Remains 1341 /1916 variables (removed 575) and now considering 265/356 (removed 91) transitions.
// Phase 1: matrix 265 rows 1341 cols
[2023-03-15 22:23:27] [INFO ] Computed 1078 place invariants in 13 ms
[2023-03-15 22:23:28] [INFO ] Implicit Places using invariants in 1147 ms returned []
[2023-03-15 22:23:28] [INFO ] Invariant cache hit.
[2023-03-15 22:23:30] [INFO ] Implicit Places using invariants and state equation in 2080 ms returned [581, 582, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 603, 604, 607, 609, 610, 611, 612, 1277, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302]
Discarding 46 places :
Implicit Place search using SMT with State Equation took 3230 ms to find 46 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 1295/1916 places, 265/356 transitions.
Applied a total of 0 rules in 43 ms. Remains 1295 /1295 variables (removed 0) and now considering 265/265 (removed 0) transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 3397 ms. Remains : 1295/1916 places, 265/356 transitions.
Stuttering acceptance computed with spot in 49 ms :[(AND (NOT p0) (NOT p1))]
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-15 automaton TGBA Formula[mat=[[{ cond=(AND p0 p1), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={0} source=0 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={1} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0, 1} source=0 dest: 0}]], initial=0, aps=[p0:(AND (GEQ s112 1) (GEQ s1182 1) (GEQ s1183 1) (GEQ s1190 1) (GEQ s1191 1) (GEQ s1192 1) (GEQ s1193 1) (GEQ s1194 1) (GEQ s1195 1) (GEQ s1196 1) (GEQ s1...], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 24 steps with 0 reset in 1 ms.
FORMULA QuasiCertifProtocol-PT-22-LTLFireability-15 FALSE TECHNIQUES STUTTER_TEST
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-15 finished in 3463 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(p0)))'
Found a Lengthening insensitive property : QuasiCertifProtocol-PT-22-LTLFireability-03
Stuttering acceptance computed with spot in 72 ms :[true, (NOT p0), (NOT p0)]
Support contains 576 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1892 are kept as prefixes of interest. Removing 24 places using SCC suffix rule.9 ms
Discarding 24 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 5 place count 1889 transition count 351
Applied a total of 5 rules in 87 ms. Remains 1889 /1916 variables (removed 27) and now considering 351/356 (removed 5) transitions.
// Phase 1: matrix 351 rows 1889 cols
[2023-03-15 22:23:31] [INFO ] Computed 1540 place invariants in 20 ms
[2023-03-15 22:23:32] [INFO ] Implicit Places using invariants in 1615 ms returned []
[2023-03-15 22:23:32] [INFO ] Invariant cache hit.
[2023-03-15 22:23:35] [INFO ] Implicit Places using invariants and state equation in 2466 ms returned [1848, 1852, 1853, 1854, 1855, 1856, 1857, 1858, 1859, 1860, 1861, 1862, 1863, 1864, 1865, 1866, 1867, 1868, 1869, 1870, 1871, 1872, 1873]
Discarding 23 places :
Implicit Place search using SMT with State Equation took 4084 ms to find 23 implicit places.
Starting structural reductions in LI_LTL mode, iteration 1 : 1866/1916 places, 351/356 transitions.
Applied a total of 0 rules in 43 ms. Remains 1866 /1866 variables (removed 0) and now considering 351/351 (removed 0) transitions.
Finished structural reductions in LI_LTL mode , in 2 iterations and 4217 ms. Remains : 1866/1916 places, 351/356 transitions.
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p0), acceptance={} source=2 dest: 0}, { cond=p0, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(OR (AND (OR (LT s0 1) (LT s84 1)) (OR (LT s0 1) (LT s85 1)) (OR (LT s0 1) (LT s82 1)) (OR (LT s0 1) (LT s83 1)) (OR (LT s0 1) (LT s80 1)) (OR (LT s0 1...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 3470 reset in 592 ms.
Product exploration explored 100000 steps with 3470 reset in 618 ms.
Computed a total of 1866 stabilizing places and 351 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1866 transition count 351
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 171 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 72 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 346 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 173 ms. (steps per millisecond=57 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1533530 steps, run timeout after 3001 ms. (steps per millisecond=511 ) properties seen :{}
Probabilistic random walk after 1533530 steps, saw 212261 distinct states, run finished after 3001 ms. (steps per millisecond=511 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 351 rows 1866 cols
[2023-03-15 22:23:40] [INFO ] Computed 1518 place invariants in 21 ms
[2023-03-15 22:23:40] [INFO ] [Real]Absence check using 0 positive and 1518 generalized place invariants in 284 ms returned sat
[2023-03-15 22:23:41] [INFO ] After 1638ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 22:23:42] [INFO ] [Nat]Absence check using 0 positive and 1518 generalized place invariants in 265 ms returned sat
[2023-03-15 22:23:43] [INFO ] After 1045ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-15 22:23:44] [INFO ] After 1746ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 1306 ms.
[2023-03-15 22:23:45] [INFO ] After 3559ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 49 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=24 )
Parikh walk visited 1 properties in 1 ms.
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 198 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 58 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 75 ms :[true, (NOT p0), (NOT p0)]
Support contains 576 out of 1866 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1866/1866 places, 351/351 transitions.
Applied a total of 0 rules in 32 ms. Remains 1866 /1866 variables (removed 0) and now considering 351/351 (removed 0) transitions.
[2023-03-15 22:23:45] [INFO ] Invariant cache hit.
[2023-03-15 22:23:47] [INFO ] Implicit Places using invariants in 1563 ms returned []
[2023-03-15 22:23:47] [INFO ] Invariant cache hit.
[2023-03-15 22:23:49] [INFO ] Implicit Places using invariants and state equation in 2427 ms returned []
Implicit Place search using SMT with State Equation took 3994 ms to find 0 implicit places.
[2023-03-15 22:23:49] [INFO ] Invariant cache hit.
[2023-03-15 22:23:50] [INFO ] Dead Transitions using invariants and state equation in 575 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4603 ms. Remains : 1866/1866 places, 351/351 transitions.
Computed a total of 1866 stabilizing places and 351 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1866 transition count 351
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 172 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 72 ms :[true, (NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 346 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 172 ms. (steps per millisecond=58 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 1531404 steps, run timeout after 3001 ms. (steps per millisecond=510 ) properties seen :{}
Probabilistic random walk after 1531404 steps, saw 211855 distinct states, run finished after 3001 ms. (steps per millisecond=510 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:23:54] [INFO ] Invariant cache hit.
[2023-03-15 22:23:54] [INFO ] [Real]Absence check using 0 positive and 1518 generalized place invariants in 276 ms returned sat
[2023-03-15 22:23:55] [INFO ] After 1653ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 22:23:56] [INFO ] [Nat]Absence check using 0 positive and 1518 generalized place invariants in 282 ms returned sat
[2023-03-15 22:23:57] [INFO ] After 1020ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-15 22:23:57] [INFO ] After 1682ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 866 ms.
[2023-03-15 22:23:58] [INFO ] After 3054ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 49 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=24 )
Parikh walk visited 1 properties in 1 ms.
Knowledge obtained : [p0, (X p0), true, (X (X p0)), (F (G p0))]
False Knowledge obtained : [(F (NOT p0))]
Knowledge based reduction with 5 factoid took 225 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 79 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 78 ms :[true, (NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 78 ms :[true, (NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 3475 reset in 602 ms.
Product exploration explored 100000 steps with 3469 reset in 618 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 74 ms :[true, (NOT p0), (NOT p0)]
Support contains 576 out of 1866 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1866/1866 places, 351/351 transitions.
Applied a total of 0 rules in 47 ms. Remains 1866 /1866 variables (removed 0) and now considering 351/351 (removed 0) transitions.
[2023-03-15 22:24:00] [INFO ] Redundant transitions in 32 ms returned []
[2023-03-15 22:24:00] [INFO ] Invariant cache hit.
[2023-03-15 22:24:01] [INFO ] Dead Transitions using invariants and state equation in 649 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 746 ms. Remains : 1866/1866 places, 351/351 transitions.
Support contains 576 out of 1866 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1866/1866 places, 351/351 transitions.
Applied a total of 0 rules in 26 ms. Remains 1866 /1866 variables (removed 0) and now considering 351/351 (removed 0) transitions.
[2023-03-15 22:24:01] [INFO ] Invariant cache hit.
[2023-03-15 22:24:02] [INFO ] Implicit Places using invariants in 1551 ms returned []
[2023-03-15 22:24:02] [INFO ] Invariant cache hit.
[2023-03-15 22:24:05] [INFO ] Implicit Places using invariants and state equation in 2417 ms returned []
Implicit Place search using SMT with State Equation took 3970 ms to find 0 implicit places.
[2023-03-15 22:24:05] [INFO ] Invariant cache hit.
[2023-03-15 22:24:06] [INFO ] Dead Transitions using invariants and state equation in 598 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4594 ms. Remains : 1866/1866 places, 351/351 transitions.
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-03 finished in 35271 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(G(!p0)))'
Found a Lengthening insensitive property : QuasiCertifProtocol-PT-22-LTLFireability-04
Stuttering acceptance computed with spot in 78 ms :[true, p0, p0]
Support contains 1 out of 1916 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 1916/1916 places, 356/356 transitions.
Graph (complete) has 15277 edges and 1916 vertex of which 1363 are kept as prefixes of interest. Removing 553 places using SCC suffix rule.7 ms
Discarding 553 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Discarding 45 places :
Symmetric choice reduction at 0 with 45 rule applications. Total rules 46 place count 1317 transition count 263
Iterating global reduction 0 with 45 rules applied. Total rules applied 91 place count 1317 transition count 263
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 1316 transition count 262
Applied a total of 93 rules in 127 ms. Remains 1316 /1916 variables (removed 600) and now considering 262/356 (removed 94) transitions.
// Phase 1: matrix 262 rows 1316 cols
[2023-03-15 22:24:06] [INFO ] Computed 1056 place invariants in 16 ms
[2023-03-15 22:24:07] [INFO ] Implicit Places using invariants in 1217 ms returned []
[2023-03-15 22:24:07] [INFO ] Invariant cache hit.
[2023-03-15 22:24:09] [INFO ] Implicit Places using invariants and state equation in 2237 ms returned [579, 580, 587, 588, 589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600, 601, 602, 605, 607, 608, 609, 610, 1275, 1279, 1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296, 1297, 1298, 1299, 1300]
Discarding 46 places :
Implicit Place search using SMT with State Equation took 3457 ms to find 46 implicit places.
Starting structural reductions in LI_LTL mode, iteration 1 : 1270/1916 places, 262/356 transitions.
Applied a total of 0 rules in 43 ms. Remains 1270 /1270 variables (removed 0) and now considering 262/262 (removed 0) transitions.
Finished structural reductions in LI_LTL mode , in 2 iterations and 3627 ms. Remains : 1270/1916 places, 262/356 transitions.
Running random walk in product with property : QuasiCertifProtocol-PT-22-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=p0, acceptance={} source=2 dest: 0}, { cond=(NOT p0), acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(GEQ s110 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 3479 reset in 268 ms.
Product exploration explored 100000 steps with 3481 reset in 287 ms.
Computed a total of 1270 stabilizing places and 262 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1270 transition count 262
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 163 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 73 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 345 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 13 resets, run finished after 6 ms. (steps per millisecond=1666 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 2479031 steps, run timeout after 3001 ms. (steps per millisecond=826 ) properties seen :{}
Probabilistic random walk after 2479031 steps, saw 340778 distinct states, run finished after 3001 ms. (steps per millisecond=826 ) properties seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 262 rows 1270 cols
[2023-03-15 22:24:13] [INFO ] Computed 1012 place invariants in 11 ms
[2023-03-15 22:24:14] [INFO ] [Real]Absence check using 0 positive and 1012 generalized place invariants in 167 ms returned sat
[2023-03-15 22:24:14] [INFO ] After 301ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:24:14] [INFO ] After 353ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 33 ms.
[2023-03-15 22:24:14] [INFO ] After 707ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 48 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=48 )
Parikh walk visited 1 properties in 0 ms.
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 5 factoid took 224 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 101 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 71 ms :[true, p0, p0]
Support contains 1 out of 1270 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1270/1270 places, 262/262 transitions.
Applied a total of 0 rules in 34 ms. Remains 1270 /1270 variables (removed 0) and now considering 262/262 (removed 0) transitions.
[2023-03-15 22:24:15] [INFO ] Invariant cache hit.
[2023-03-15 22:24:16] [INFO ] Implicit Places using invariants in 1067 ms returned []
[2023-03-15 22:24:16] [INFO ] Invariant cache hit.
[2023-03-15 22:24:18] [INFO ] Implicit Places using invariants and state equation in 2168 ms returned []
Implicit Place search using SMT with State Equation took 3236 ms to find 0 implicit places.
[2023-03-15 22:24:18] [INFO ] Invariant cache hit.
[2023-03-15 22:24:18] [INFO ] Dead Transitions using invariants and state equation in 392 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3663 ms. Remains : 1270/1270 places, 262/262 transitions.
Computed a total of 1270 stabilizing places and 262 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1270 transition count 262
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 171 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 151 ms :[true, p0, p0]
Incomplete random walk after 10000 steps, including 345 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 12 resets, run finished after 7 ms. (steps per millisecond=1428 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 2451389 steps, run timeout after 3001 ms. (steps per millisecond=816 ) properties seen :{}
Probabilistic random walk after 2451389 steps, saw 337960 distinct states, run finished after 3001 ms. (steps per millisecond=816 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 22:24:22] [INFO ] Invariant cache hit.
[2023-03-15 22:24:22] [INFO ] [Real]Absence check using 0 positive and 1012 generalized place invariants in 174 ms returned sat
[2023-03-15 22:24:22] [INFO ] After 306ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-15 22:24:22] [INFO ] After 352ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 30 ms.
[2023-03-15 22:24:22] [INFO ] After 711ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1
Finished Parikh walk after 48 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=48 )
Parikh walk visited 1 properties in 1 ms.
Knowledge obtained : [(NOT p0), (X (NOT p0)), true, (X (X (NOT p0))), (F (G (NOT p0)))]
False Knowledge obtained : [(F p0)]
Knowledge based reduction with 5 factoid took 168 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 75 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 80 ms :[true, p0, p0]
Stuttering acceptance computed with spot in 85 ms :[true, p0, p0]
Product exploration explored 100000 steps with 3473 reset in 272 ms.
Product exploration explored 100000 steps with 3468 reset in 286 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 146 ms :[true, p0, p0]
Support contains 1 out of 1270 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1270/1270 places, 262/262 transitions.
Applied a total of 0 rules in 52 ms. Remains 1270 /1270 variables (removed 0) and now considering 262/262 (removed 0) transitions.
[2023-03-15 22:24:24] [INFO ] Redundant transitions in 16 ms returned []
[2023-03-15 22:24:24] [INFO ] Invariant cache hit.
[2023-03-15 22:24:24] [INFO ] Dead Transitions using invariants and state equation in 383 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 461 ms. Remains : 1270/1270 places, 262/262 transitions.
Support contains 1 out of 1270 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1270/1270 places, 262/262 transitions.
Applied a total of 0 rules in 29 ms. Remains 1270 /1270 variables (removed 0) and now considering 262/262 (removed 0) transitions.
[2023-03-15 22:24:24] [INFO ] Invariant cache hit.
[2023-03-15 22:24:25] [INFO ] Implicit Places using invariants in 1062 ms returned []
[2023-03-15 22:24:25] [INFO ] Invariant cache hit.
[2023-03-15 22:24:27] [INFO ] Implicit Places using invariants and state equation in 2172 ms returned []
Implicit Place search using SMT with State Equation took 3235 ms to find 0 implicit places.
[2023-03-15 22:24:27] [INFO ] Invariant cache hit.
[2023-03-15 22:24:28] [INFO ] Dead Transitions using invariants and state equation in 381 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3645 ms. Remains : 1270/1270 places, 262/262 transitions.
Treatment of property QuasiCertifProtocol-PT-22-LTLFireability-04 finished in 22182 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((!(!p0 U X(X(p0)))||X(X(p1))))'
[2023-03-15 22:24:28] [INFO ] Flatten gal took : 56 ms
[2023-03-15 22:24:28] [INFO ] Export to MCC of 3 properties in file /home/mcc/execution/LTLFireability.sr.xml took 3 ms.
[2023-03-15 22:24:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1916 places, 356 transitions and 4110 arcs took 14 ms.
Total runtime 215978 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT QuasiCertifProtocol-PT-22
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
LTLFireability

BK_STOP 1678919261250

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 9 (type SKEL/SRCH) for 3 QuasiCertifProtocol-PT-22-LTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 9 (type SKEL/SRCH) for QuasiCertifProtocol-PT-22-LTLFireability-04
lola: result : false
lola: markings : 6323
lola: fired transitions : 19497
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 QuasiCertifProtocol-PT-22-LTLFireability-03
lola: time limit : 1197 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 5/1197 4/32 QuasiCertifProtocol-PT-22-LTLFireability-03 247776 m, 49555 m/sec, 1613577 t fired, .

Time elapsed: 12 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 10/1197 6/32 QuasiCertifProtocol-PT-22-LTLFireability-03 468689 m, 44182 m/sec, 3240508 t fired, .

Time elapsed: 17 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 15/1197 9/32 QuasiCertifProtocol-PT-22-LTLFireability-03 666693 m, 39600 m/sec, 4901406 t fired, .

Time elapsed: 22 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 20/1197 12/32 QuasiCertifProtocol-PT-22-LTLFireability-03 911385 m, 48938 m/sec, 6535218 t fired, .

Time elapsed: 27 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 25/1197 14/32 QuasiCertifProtocol-PT-22-LTLFireability-03 1122222 m, 42167 m/sec, 8154915 t fired, .

Time elapsed: 32 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 30/1197 16/32 QuasiCertifProtocol-PT-22-LTLFireability-03 1326696 m, 40894 m/sec, 9798452 t fired, .

Time elapsed: 37 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 35/1197 19/32 QuasiCertifProtocol-PT-22-LTLFireability-03 1564305 m, 47521 m/sec, 11414113 t fired, .

Time elapsed: 42 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 40/1197 22/32 QuasiCertifProtocol-PT-22-LTLFireability-03 1757684 m, 38675 m/sec, 13046354 t fired, .

Time elapsed: 47 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 45/1197 24/32 QuasiCertifProtocol-PT-22-LTLFireability-03 1979723 m, 44407 m/sec, 14659384 t fired, .

Time elapsed: 52 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 50/1197 27/32 QuasiCertifProtocol-PT-22-LTLFireability-03 2186818 m, 41419 m/sec, 16262085 t fired, .

Time elapsed: 57 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 55/1197 29/32 QuasiCertifProtocol-PT-22-LTLFireability-03 2384792 m, 39594 m/sec, 17875152 t fired, .

Time elapsed: 62 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 LTL EXCL 60/1197 32/32 QuasiCertifProtocol-PT-22-LTLFireability-03 2596727 m, 42387 m/sec, 19459077 t fired, .

Time elapsed: 67 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: CANCELED task # 1 (type EXCL) for QuasiCertifProtocol-PT-22-LTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 72 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: LAUNCH task # 7 (type EXCL) for 6 QuasiCertifProtocol-PT-22-LTLFireability-10
lola: time limit : 1764 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 5/1764 3/32 QuasiCertifProtocol-PT-22-LTLFireability-10 349378 m, 69875 m/sec, 2204744 t fired, .

Time elapsed: 77 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 10/1764 6/32 QuasiCertifProtocol-PT-22-LTLFireability-10 671236 m, 64371 m/sec, 4374053 t fired, .

Time elapsed: 82 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 15/1764 9/32 QuasiCertifProtocol-PT-22-LTLFireability-10 991984 m, 64149 m/sec, 6501141 t fired, .

Time elapsed: 87 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 20/1764 11/32 QuasiCertifProtocol-PT-22-LTLFireability-10 1283752 m, 58353 m/sec, 8600978 t fired, .

Time elapsed: 92 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 25/1764 13/32 QuasiCertifProtocol-PT-22-LTLFireability-10 1530133 m, 49276 m/sec, 10699576 t fired, .

Time elapsed: 97 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 30/1764 15/32 QuasiCertifProtocol-PT-22-LTLFireability-10 1789749 m, 51923 m/sec, 12801841 t fired, .

Time elapsed: 102 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 35/1764 17/32 QuasiCertifProtocol-PT-22-LTLFireability-10 2027335 m, 47517 m/sec, 14899499 t fired, .

Time elapsed: 107 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 40/1764 20/32 QuasiCertifProtocol-PT-22-LTLFireability-10 2350653 m, 64663 m/sec, 17060483 t fired, .

Time elapsed: 112 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 45/1764 23/32 QuasiCertifProtocol-PT-22-LTLFireability-10 2673593 m, 64588 m/sec, 19190356 t fired, .

Time elapsed: 117 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 50/1764 25/32 QuasiCertifProtocol-PT-22-LTLFireability-10 2985986 m, 62478 m/sec, 21284288 t fired, .

Time elapsed: 122 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 55/1764 27/32 QuasiCertifProtocol-PT-22-LTLFireability-10 3215999 m, 46002 m/sec, 23338921 t fired, .

Time elapsed: 127 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 60/1764 29/32 QuasiCertifProtocol-PT-22-LTLFireability-10 3492229 m, 55246 m/sec, 25427235 t fired, .

Time elapsed: 132 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 65/1764 31/32 QuasiCertifProtocol-PT-22-LTLFireability-10 3706729 m, 42900 m/sec, 27472467 t fired, .

Time elapsed: 137 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: CANCELED task # 7 (type EXCL) for QuasiCertifProtocol-PT-22-LTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 142 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: LAUNCH task # 4 (type EXCL) for 3 QuasiCertifProtocol-PT-22-LTLFireability-04
lola: time limit : 3458 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 5/3458 5/32 QuasiCertifProtocol-PT-22-LTLFireability-04 332674 m, 66534 m/sec, 2182765 t fired, .

Time elapsed: 147 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 10/3458 8/32 QuasiCertifProtocol-PT-22-LTLFireability-04 593803 m, 52225 m/sec, 4240224 t fired, .

Time elapsed: 152 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 15/3458 11/32 QuasiCertifProtocol-PT-22-LTLFireability-04 882949 m, 57829 m/sec, 6344258 t fired, .

Time elapsed: 157 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 20/3458 14/32 QuasiCertifProtocol-PT-22-LTLFireability-04 1152050 m, 53820 m/sec, 8381657 t fired, .

Time elapsed: 162 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 25/3458 18/32 QuasiCertifProtocol-PT-22-LTLFireability-04 1423036 m, 54197 m/sec, 10440313 t fired, .

Time elapsed: 167 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 30/3458 21/32 QuasiCertifProtocol-PT-22-LTLFireability-04 1692873 m, 53967 m/sec, 12475867 t fired, .

Time elapsed: 172 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 35/3458 24/32 QuasiCertifProtocol-PT-22-LTLFireability-04 1955710 m, 52567 m/sec, 14514227 t fired, .

Time elapsed: 177 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 40/3458 27/32 QuasiCertifProtocol-PT-22-LTLFireability-04 2220920 m, 53042 m/sec, 16528471 t fired, .

Time elapsed: 182 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 LTL EXCL 45/3458 30/32 QuasiCertifProtocol-PT-22-LTLFireability-04 2486494 m, 53114 m/sec, 18546242 t fired, .

Time elapsed: 187 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: CANCELED task # 4 (type EXCL) for QuasiCertifProtocol-PT-22-LTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 192 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 3
lola: Portfolio finished: no open tasks 3

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-PT-22-LTLFireability-03: LTL unknown AGGR
QuasiCertifProtocol-PT-22-LTLFireability-04: LTL unknown AGGR
QuasiCertifProtocol-PT-22-LTLFireability-10: LTL unknown AGGR


Time elapsed: 192 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-22"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is QuasiCertifProtocol-PT-22, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948500892"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-22.tgz
mv QuasiCertifProtocol-PT-22 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;