About the Execution of LoLa+red for QuasiCertifProtocol-COL-18
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3127.159 | 371451.00 | 379890.00 | 1052.90 | TF?TTTFFTTFFTT?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948400826.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is QuasiCertifProtocol-COL-18, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948400826
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 6.8K Feb 26 01:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 26 01:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 01:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 26 01:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 01:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 109K Feb 26 01:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 26 01:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 26 01:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 93K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-00
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-01
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-02
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-03
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-04
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-05
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-06
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-07
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-08
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-09
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-10
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-11
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-12
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-13
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-14
FORMULA_NAME QuasiCertifProtocol-COL-18-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678912851635
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-COL-18
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 20:40:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 20:40:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 20:40:53] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 20:40:53] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 20:40:53] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 471 ms
[2023-03-15 20:40:53] [INFO ] Imported 30 HL places and 26 HL transitions for a total of 1398 PT places and 296.0 transition bindings in 17 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
[2023-03-15 20:40:53] [INFO ] Built PT skeleton of HLPN with 30 places and 26 transitions 77 arcs in 4 ms.
[2023-03-15 20:40:53] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 30 stabilizing places and 26 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 30 transition count 26
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 10 formulas.
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 8 properties that can be checked using skeleton over-approximation.
Computed a total of 30 stabilizing places and 26 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 30 transition count 26
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 10000 steps, including 352 resets, run finished after 130 ms. (steps per millisecond=76 ) properties (out of 19) seen :14
Incomplete Best-First random walk after 10000 steps, including 104 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 104 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 104 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10007 steps, including 132 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 107 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
// Phase 1: matrix 26 rows 30 cols
[2023-03-15 20:40:54] [INFO ] Computed 5 place invariants in 3 ms
[2023-03-15 20:40:54] [INFO ] [Real]Absence check using 5 positive place invariants in 4 ms returned sat
[2023-03-15 20:40:54] [INFO ] After 178ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-15 20:40:54] [INFO ] [Nat]Absence check using 5 positive place invariants in 2 ms returned sat
[2023-03-15 20:40:54] [INFO ] After 148ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :4
[2023-03-15 20:40:54] [INFO ] After 164ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :4
Attempting to minimize the solution found.
Minimization took 13 ms.
[2023-03-15 20:40:54] [INFO ] After 227ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :4
Fused 5 Parikh solutions to 4 different solutions.
Finished Parikh walk after 62 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=62 )
Parikh walk visited 4 properties in 3 ms.
Successfully simplified 1 atomic propositions for a total of 8 simplifications.
[2023-03-15 20:40:54] [INFO ] Flatten gal took : 21 ms
[2023-03-15 20:40:54] [INFO ] Flatten gal took : 8 ms
Domain [tsid(19), tsid(19)] of place n9 breaks symmetries in sort tsid
[2023-03-15 20:40:54] [INFO ] Unfolded HLPN to a Petri net with 1398 places and 296 transitions 3119 arcs in 19 ms.
[2023-03-15 20:40:54] [INFO ] Unfolded 14 HLPN properties in 0 ms.
Support contains 1356 out of 1398 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1398/1398 places, 296/296 transitions.
Reduce places removed 42 places and 0 transitions.
Iterating post reduction 0 with 42 rules applied. Total rules applied 42 place count 1356 transition count 296
Applied a total of 42 rules in 14 ms. Remains 1356 /1398 variables (removed 42) and now considering 296/296 (removed 0) transitions.
// Phase 1: matrix 296 rows 1356 cols
[2023-03-15 20:40:54] [INFO ] Computed 1062 place invariants in 76 ms
[2023-03-15 20:40:55] [INFO ] Implicit Places using invariants in 435 ms returned []
[2023-03-15 20:40:55] [INFO ] Invariant cache hit.
[2023-03-15 20:40:55] [INFO ] Implicit Places using invariants and state equation in 608 ms returned []
Implicit Place search using SMT with State Equation took 1045 ms to find 0 implicit places.
[2023-03-15 20:40:55] [INFO ] Invariant cache hit.
[2023-03-15 20:40:56] [INFO ] Dead Transitions using invariants and state equation in 432 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1356/1398 places, 296/296 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1493 ms. Remains : 1356/1398 places, 296/296 transitions.
Support contains 1356 out of 1356 places after structural reductions.
[2023-03-15 20:40:56] [INFO ] Flatten gal took : 155 ms
[2023-03-15 20:40:56] [INFO ] Flatten gal took : 80 ms
[2023-03-15 20:40:57] [INFO ] Input system was already deterministic with 296 transitions.
Incomplete random walk after 10000 steps, including 441 resets, run finished after 378 ms. (steps per millisecond=26 ) properties (out of 46) seen :10
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=22 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Running SMT prover for 36 properties.
[2023-03-15 20:40:57] [INFO ] Invariant cache hit.
[2023-03-15 20:40:59] [INFO ] [Real]Absence check using 0 positive and 1062 generalized place invariants in 178 ms returned sat
[2023-03-15 20:40:59] [INFO ] After 1300ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:36
[2023-03-15 20:41:00] [INFO ] [Nat]Absence check using 0 positive and 1062 generalized place invariants in 168 ms returned sat
[2023-03-15 20:41:06] [INFO ] After 4526ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :29
[2023-03-15 20:41:11] [INFO ] After 9814ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :29
Attempting to minimize the solution found.
Minimization took 5193 ms.
[2023-03-15 20:41:16] [INFO ] After 16969ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :29
Fused 36 Parikh solutions to 26 different solutions.
Finished Parikh walk after 139 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=69 )
Parikh walk visited 29 properties in 31 ms.
Successfully simplified 7 atomic propositions for a total of 14 simplifications.
[2023-03-15 20:41:16] [INFO ] Flatten gal took : 59 ms
[2023-03-15 20:41:16] [INFO ] Flatten gal took : 50 ms
[2023-03-15 20:41:16] [INFO ] Input system was already deterministic with 296 transitions.
Computed a total of 1356 stabilizing places and 296 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 1356 transition count 296
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 137 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 138 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 39 ms
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 33 ms
[2023-03-15 20:41:17] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 32 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 29 ms
[2023-03-15 20:41:17] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 114 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 116 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 29 ms
[2023-03-15 20:41:17] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 121 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 122 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 27 ms
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 27 ms
[2023-03-15 20:41:17] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 34 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:17] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 29 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 32 ms
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 27 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 30 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 26 ms
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 35 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 16 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 20 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 27 ms
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 35 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 25 ms
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 24 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Graph (complete) has 9049 edges and 1356 vertex of which 1336 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.13 ms
Discarding 20 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Applied a total of 1 rules in 64 ms. Remains 1336 /1356 variables (removed 20) and now considering 294/296 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 64 ms. Remains : 1336/1356 places, 294/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 24 ms
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 26 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 294 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 8 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:18] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 26 ms
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 25 ms
[2023-03-15 20:41:18] [INFO ] Input system was already deterministic with 296 transitions.
Support contains 0 out of 1356 places (down from 859) after GAL structural reductions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Graph (complete) has 9049 edges and 1356 vertex of which 1336 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.7 ms
Discarding 20 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 1335 transition count 293
Applied a total of 2 rules in 105 ms. Remains 1335 /1356 variables (removed 21) and now considering 293/296 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 106 ms. Remains : 1335/1356 places, 293/296 transitions.
[2023-03-15 20:41:18] [INFO ] Flatten gal took : 28 ms
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 25 ms
[2023-03-15 20:41:19] [INFO ] Input system was already deterministic with 293 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 31 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 24 ms
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 24 ms
[2023-03-15 20:41:19] [INFO ] Input system was already deterministic with 296 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1356/1356 places, 296/296 transitions.
Applied a total of 0 rules in 42 ms. Remains 1356 /1356 variables (removed 0) and now considering 296/296 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 1356/1356 places, 296/296 transitions.
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 25 ms
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 26 ms
[2023-03-15 20:41:19] [INFO ] Input system was already deterministic with 296 transitions.
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 33 ms
[2023-03-15 20:41:19] [INFO ] Flatten gal took : 33 ms
[2023-03-15 20:41:19] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 14 ms.
[2023-03-15 20:41:19] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1356 places, 296 transitions and 2942 arcs took 4 ms.
Total runtime 26308 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT QuasiCertifProtocol-COL-18
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-18-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678913223086
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 9 (type EXCL) for 0 QuasiCertifProtocol-COL-18-CTLFireability-00
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: FINISHED task # 9 (type EXCL) for QuasiCertifProtocol-COL-18-CTLFireability-00
lola: result : true
lola: markings : 341
lola: fired transitions : 620
lola: time used : 1.000000
lola: memory pages used : 1
lola: Created skeleton in 1.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/FNDP) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 56 (type SKEL/SRCH) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 56 (type SKEL/SRCH) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : unknown
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 55 (type SKEL/SRCH) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : true
lola: markings : 22
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for QuasiCertifProtocol-COL-18-CTLFireability-01 (obsolete)
lola: CANCELED task # 54 (type EQUN) for QuasiCertifProtocol-COL-18-CTLFireability-01 (obsolete)
lola: FINISHED task # 53 (type SKEL/FNDP) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : true
lola: fired transitions : 20
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 54 (type SKEL/EQUN) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 37 (type EXCL) for 36 QuasiCertifProtocol-COL-18-CTLFireability-09
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type FNDP) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SRCH) for 11 QuasiCertifProtocol-COL-18-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 61 (type SRCH) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 58 (type FNDP) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 59 (type EQUN) for QuasiCertifProtocol-COL-18-CTLFireability-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/373/CTLFireability-59.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 59 (type EQUN) for QuasiCertifProtocol-COL-18-CTLFireability-01
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-18-CTLFireability-00: DISJ true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-18-CTLFireability-01: DISJ 0 1 0 0 8 0 0 1
QuasiCertifProtocol-COL-18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-13: EG 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 4/298 4/32 QuasiCertifProtocol-COL-18-CTLFireability-09 488736 m, 97747 m/sec, 2144054 t fired, .
Time elapsed: 22 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 37 (type EXCL) for QuasiCertifProtocol-COL-18-CTLFireability-09
lola: result : true
lola: markings : 709629
lola: fired transitions : 3308036
lola: time used : 7.000000
lola: memory pages used : 5
lola: LAUNCH task # 49 (type EXCL) for 48 QuasiCertifProtocol-COL-18-CTLFireability-15
lola: time limit : 325 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-18-CTLFireability-00: DISJ true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-18-CTLFireability-01: DISJ 0 1 0 0 8 0 0 1
QuasiCertifProtocol-COL-18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-13: EG 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 CTL EXCL 2/325 2/32 QuasiCertifProtocol-COL-18-CTLFireability-15 156834 m, 31366 m/sec, 1265809 t fired, .
Time elapsed: 27 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-18-CTLFireability-00: DISJ true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-18-CTLFireability-01: DISJ 0 1 0 0 8 0 0 1
QuasiCertifProtocol-COL-18-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-13: EG 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-18-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 CTL EXCL 7/325 3/32 QuasiCertifProtocol-COL-18-CTLFireability-15 425867 m, 53806 m/sec, 3684444 t fired, .
Time elapsed: 32 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 13
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-18-CTLFireability-00: DISJ true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-09: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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QuasiCertifProtocol-COL-18-CTLFireability-04: CTL true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-05: CTL true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-07: CTL false CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-08: CTL true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-09: CTL true CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-10: CTL false CTL model checker
QuasiCertifProtocol-COL-18-CTLFireability-13: EG true state space / EG
QuasiCertifProtocol-COL-18-CTLFireability-14: CTL unknown AGGR
QuasiCertifProtocol-COL-18-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-18"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is QuasiCertifProtocol-COL-18, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948400826"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-18.tgz
mv QuasiCertifProtocol-COL-18 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;