fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r295-tall-167873948000546
Last Updated
May 14, 2023

About the Execution of LoLa+red for PolyORBLF-PT-S04J04T08

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4940.144 3600000.00 666511.00 8576.80 ?F??F?FFTTT?TFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948000546.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PolyORBLF-PT-S04J04T08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948000546

=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.2M
-rw-r--r-- 1 mcc users 15K Feb 26 14:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 14:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 76K Feb 26 14:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 344K Feb 26 14:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 31K Feb 26 14:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 14:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 178K Feb 26 14:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 793K Feb 26 14:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.3M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-00
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-01
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-02
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-03
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-04
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-05
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-06
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-07
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-08
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-09
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-10
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-11
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-12
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-13
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-14
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678861626905

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-PT-S04J04T08
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 06:27:08] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 06:27:08] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 06:27:08] [INFO ] Load time of PNML (sax parser for PT used): 224 ms
[2023-03-15 06:27:08] [INFO ] Transformed 712 places.
[2023-03-15 06:27:08] [INFO ] Transformed 4012 transitions.
[2023-03-15 06:27:08] [INFO ] Parsed PT model containing 712 places and 4012 transitions and 27744 arcs in 316 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 30 ms.
[2023-03-15 06:27:08] [INFO ] Reduced 1768 identical enabling conditions.
[2023-03-15 06:27:08] [INFO ] Reduced 352 identical enabling conditions.
Ensure Unique test removed 2168 transitions
Reduce redundant transitions removed 2168 transitions.
Support contains 465 out of 712 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 712/712 places, 1844/1844 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 708 transition count 1844
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 700 transition count 1836
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 700 transition count 1836
Applied a total of 20 rules in 243 ms. Remains 700 /712 variables (removed 12) and now considering 1836/1844 (removed 8) transitions.
[2023-03-15 06:27:09] [INFO ] Flow matrix only has 1804 transitions (discarded 32 similar events)
// Phase 1: matrix 1804 rows 700 cols
[2023-03-15 06:27:09] [INFO ] Computed 50 place invariants in 91 ms
[2023-03-15 06:27:11] [INFO ] Dead Transitions using invariants and state equation in 2357 ms found 432 transitions.
Found 432 dead transitions using SMT.
Drop transitions removed 432 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 432 transitions.
[2023-03-15 06:27:11] [INFO ] Flow matrix only has 1372 transitions (discarded 32 similar events)
// Phase 1: matrix 1372 rows 700 cols
[2023-03-15 06:27:11] [INFO ] Computed 50 place invariants in 40 ms
[2023-03-15 06:27:11] [INFO ] Implicit Places using invariants in 287 ms returned []
[2023-03-15 06:27:11] [INFO ] Flow matrix only has 1372 transitions (discarded 32 similar events)
[2023-03-15 06:27:11] [INFO ] Invariant cache hit.
[2023-03-15 06:27:12] [INFO ] State equation strengthened by 160 read => feed constraints.
[2023-03-15 06:27:16] [INFO ] Implicit Places using invariants and state equation in 5139 ms returned []
Implicit Place search using SMT with State Equation took 5429 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 700/712 places, 1404/1844 transitions.
Applied a total of 0 rules in 21 ms. Remains 700 /700 variables (removed 0) and now considering 1404/1404 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8077 ms. Remains : 700/712 places, 1404/1844 transitions.
Support contains 465 out of 700 places after structural reductions.
[2023-03-15 06:27:17] [INFO ] Flatten gal took : 148 ms
[2023-03-15 06:27:17] [INFO ] Flatten gal took : 119 ms
[2023-03-15 06:27:17] [INFO ] Input system was already deterministic with 1404 transitions.
Support contains 433 out of 700 places (down from 465) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 620 ms. (steps per millisecond=16 ) properties (out of 76) seen :48
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=27 ) properties (out of 28) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 27) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 27) seen :0
Running SMT prover for 27 properties.
[2023-03-15 06:27:19] [INFO ] Flow matrix only has 1372 transitions (discarded 32 similar events)
[2023-03-15 06:27:19] [INFO ] Invariant cache hit.
[2023-03-15 06:27:19] [INFO ] [Real]Absence check using 13 positive place invariants in 7 ms returned sat
[2023-03-15 06:27:19] [INFO ] [Real]Absence check using 13 positive and 37 generalized place invariants in 40 ms returned sat
[2023-03-15 06:27:20] [INFO ] After 647ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:21
[2023-03-15 06:27:20] [INFO ] [Nat]Absence check using 13 positive place invariants in 4 ms returned sat
[2023-03-15 06:27:20] [INFO ] [Nat]Absence check using 13 positive and 37 generalized place invariants in 60 ms returned sat
[2023-03-15 06:27:31] [INFO ] After 10614ms SMT Verify possible using state equation in natural domain returned unsat :24 sat :3
[2023-03-15 06:27:31] [INFO ] State equation strengthened by 160 read => feed constraints.
[2023-03-15 06:27:40] [INFO ] After 8999ms SMT Verify possible using 160 Read/Feed constraints in natural domain returned unsat :24 sat :3
[2023-03-15 06:27:41] [INFO ] Deduced a trap composed of 398 places in 312 ms of which 5 ms to minimize.
[2023-03-15 06:27:42] [INFO ] Deduced a trap composed of 230 places in 327 ms of which 1 ms to minimize.
[2023-03-15 06:27:42] [INFO ] Deduced a trap composed of 113 places in 314 ms of which 2 ms to minimize.
[2023-03-15 06:27:43] [INFO ] Deduced a trap composed of 183 places in 325 ms of which 0 ms to minimize.
[2023-03-15 06:27:43] [INFO ] Deduced a trap composed of 125 places in 316 ms of which 2 ms to minimize.
[2023-03-15 06:27:44] [INFO ] Deduced a trap composed of 214 places in 293 ms of which 1 ms to minimize.
[2023-03-15 06:27:44] [INFO ] Deduced a trap composed of 213 places in 299 ms of which 1 ms to minimize.
[2023-03-15 06:27:44] [INFO ] Deduced a trap composed of 227 places in 303 ms of which 2 ms to minimize.
[2023-03-15 06:27:45] [INFO ] Trap strengthening (SAT) tested/added 8/8 trap constraints in 3563 ms
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:769)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-15 06:27:45] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-15 06:27:45] [INFO ] After 25018ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0 real:21
Fused 27 Parikh solutions to 3 different solutions.
Parikh walk visited 0 properties in 22 ms.
Support contains 8 out of 700 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Drop transitions removed 48 transitions
Trivial Post-agglo rules discarded 48 transitions
Performed 48 trivial Post agglomeration. Transition count delta: 48
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 700 transition count 1356
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 1 with 48 rules applied. Total rules applied 96 place count 652 transition count 1356
Performed 80 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 80 Pre rules applied. Total rules applied 96 place count 652 transition count 1276
Deduced a syphon composed of 80 places in 2 ms
Reduce places removed 80 places and 0 transitions.
Iterating global reduction 2 with 160 rules applied. Total rules applied 256 place count 572 transition count 1276
Performed 88 Post agglomeration using F-continuation condition.Transition count delta: 88
Deduced a syphon composed of 88 places in 2 ms
Reduce places removed 88 places and 0 transitions.
Iterating global reduction 2 with 176 rules applied. Total rules applied 432 place count 484 transition count 1188
Free-agglomeration rule (complex) applied 22 times.
Iterating global reduction 2 with 22 rules applied. Total rules applied 454 place count 484 transition count 1166
Reduce places removed 22 places and 0 transitions.
Iterating post reduction 2 with 22 rules applied. Total rules applied 476 place count 462 transition count 1166
Applied a total of 476 rules in 186 ms. Remains 462 /700 variables (removed 238) and now considering 1166/1404 (removed 238) transitions.
[2023-03-15 06:27:45] [INFO ] Flow matrix only has 1134 transitions (discarded 32 similar events)
// Phase 1: matrix 1134 rows 462 cols
[2023-03-15 06:27:45] [INFO ] Computed 50 place invariants in 19 ms
[2023-03-15 06:27:46] [INFO ] Dead Transitions using invariants and state equation in 815 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1004 ms. Remains : 462/700 places, 1166/1404 transitions.
Finished random walk after 5928 steps, including 1 resets, run visited all 3 properties in 50 ms. (steps per millisecond=118 )
Successfully simplified 24 atomic propositions for a total of 16 simplifications.
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 06:27:46] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 06:27:46] [INFO ] Flatten gal took : 77 ms
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 06:27:46] [INFO ] Flatten gal took : 71 ms
[2023-03-15 06:27:46] [INFO ] Input system was already deterministic with 1404 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 34 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:27:46] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
// Phase 1: matrix 1364 rows 692 cols
[2023-03-15 06:27:46] [INFO ] Computed 50 place invariants in 33 ms
[2023-03-15 06:27:48] [INFO ] Dead Transitions using invariants and state equation in 1578 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1617 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:27:48] [INFO ] Flatten gal took : 49 ms
[2023-03-15 06:27:48] [INFO ] Flatten gal took : 51 ms
[2023-03-15 06:27:48] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Applied a total of 0 rules in 7 ms. Remains 700 /700 variables (removed 0) and now considering 1404/1404 (removed 0) transitions.
[2023-03-15 06:27:48] [INFO ] Flow matrix only has 1372 transitions (discarded 32 similar events)
// Phase 1: matrix 1372 rows 700 cols
[2023-03-15 06:27:48] [INFO ] Computed 50 place invariants in 34 ms
[2023-03-15 06:27:50] [INFO ] Dead Transitions using invariants and state equation in 1563 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1572 ms. Remains : 700/700 places, 1404/1404 transitions.
[2023-03-15 06:27:50] [INFO ] Flatten gal took : 46 ms
[2023-03-15 06:27:50] [INFO ] Flatten gal took : 50 ms
[2023-03-15 06:27:50] [INFO ] Input system was already deterministic with 1404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Applied a total of 0 rules in 10 ms. Remains 700 /700 variables (removed 0) and now considering 1404/1404 (removed 0) transitions.
[2023-03-15 06:27:50] [INFO ] Flow matrix only has 1372 transitions (discarded 32 similar events)
[2023-03-15 06:27:50] [INFO ] Invariant cache hit.
[2023-03-15 06:27:51] [INFO ] Dead Transitions using invariants and state equation in 1520 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1533 ms. Remains : 700/700 places, 1404/1404 transitions.
[2023-03-15 06:27:51] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:27:52] [INFO ] Flatten gal took : 48 ms
[2023-03-15 06:27:52] [INFO ] Input system was already deterministic with 1404 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 28 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:27:52] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
// Phase 1: matrix 1364 rows 692 cols
[2023-03-15 06:27:52] [INFO ] Computed 50 place invariants in 39 ms
[2023-03-15 06:27:53] [INFO ] Dead Transitions using invariants and state equation in 1551 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1583 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:27:53] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:27:53] [INFO ] Flatten gal took : 49 ms
[2023-03-15 06:27:53] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 33 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:27:53] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
[2023-03-15 06:27:53] [INFO ] Invariant cache hit.
[2023-03-15 06:27:55] [INFO ] Dead Transitions using invariants and state equation in 1531 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1567 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:27:55] [INFO ] Flatten gal took : 42 ms
[2023-03-15 06:27:55] [INFO ] Flatten gal took : 46 ms
[2023-03-15 06:27:55] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Drop transitions removed 40 transitions
Trivial Post-agglo rules discarded 40 transitions
Performed 40 trivial Post agglomeration. Transition count delta: 40
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 700 transition count 1364
Reduce places removed 40 places and 0 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 1 with 48 rules applied. Total rules applied 88 place count 660 transition count 1356
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 96 place count 652 transition count 1356
Performed 80 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 80 Pre rules applied. Total rules applied 96 place count 652 transition count 1276
Deduced a syphon composed of 80 places in 0 ms
Reduce places removed 80 places and 0 transitions.
Iterating global reduction 3 with 160 rules applied. Total rules applied 256 place count 572 transition count 1276
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Deduced a syphon composed of 64 places in 0 ms
Reduce places removed 64 places and 0 transitions.
Iterating global reduction 3 with 128 rules applied. Total rules applied 384 place count 508 transition count 1212
Applied a total of 384 rules in 116 ms. Remains 508 /700 variables (removed 192) and now considering 1212/1404 (removed 192) transitions.
[2023-03-15 06:27:55] [INFO ] Flow matrix only has 1180 transitions (discarded 32 similar events)
// Phase 1: matrix 1180 rows 508 cols
[2023-03-15 06:27:55] [INFO ] Computed 50 place invariants in 24 ms
[2023-03-15 06:27:56] [INFO ] Dead Transitions using invariants and state equation in 906 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1026 ms. Remains : 508/700 places, 1212/1404 transitions.
[2023-03-15 06:27:56] [INFO ] Flatten gal took : 40 ms
[2023-03-15 06:27:56] [INFO ] Flatten gal took : 43 ms
[2023-03-15 06:27:56] [INFO ] Input system was already deterministic with 1212 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 17 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:27:56] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
// Phase 1: matrix 1364 rows 692 cols
[2023-03-15 06:27:56] [INFO ] Computed 50 place invariants in 27 ms
[2023-03-15 06:27:58] [INFO ] Dead Transitions using invariants and state equation in 1621 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1652 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:27:58] [INFO ] Flatten gal took : 41 ms
[2023-03-15 06:27:58] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:27:58] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Drop transitions removed 56 transitions
Trivial Post-agglo rules discarded 56 transitions
Performed 56 trivial Post agglomeration. Transition count delta: 56
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 700 transition count 1348
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 1 with 56 rules applied. Total rules applied 112 place count 644 transition count 1348
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 112 place count 644 transition count 1300
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 208 place count 596 transition count 1300
Performed 88 Post agglomeration using F-continuation condition.Transition count delta: 88
Deduced a syphon composed of 88 places in 1 ms
Reduce places removed 88 places and 0 transitions.
Iterating global reduction 2 with 176 rules applied. Total rules applied 384 place count 508 transition count 1212
Applied a total of 384 rules in 74 ms. Remains 508 /700 variables (removed 192) and now considering 1212/1404 (removed 192) transitions.
[2023-03-15 06:27:58] [INFO ] Flow matrix only has 1180 transitions (discarded 32 similar events)
// Phase 1: matrix 1180 rows 508 cols
[2023-03-15 06:27:58] [INFO ] Computed 50 place invariants in 21 ms
[2023-03-15 06:27:59] [INFO ] Dead Transitions using invariants and state equation in 939 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1013 ms. Remains : 508/700 places, 1212/1404 transitions.
[2023-03-15 06:27:59] [INFO ] Flatten gal took : 41 ms
[2023-03-15 06:27:59] [INFO ] Flatten gal took : 43 ms
[2023-03-15 06:27:59] [INFO ] Input system was already deterministic with 1212 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 17 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:27:59] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
// Phase 1: matrix 1364 rows 692 cols
[2023-03-15 06:27:59] [INFO ] Computed 50 place invariants in 33 ms
[2023-03-15 06:28:01] [INFO ] Dead Transitions using invariants and state equation in 1619 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1637 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:28:01] [INFO ] Flatten gal took : 42 ms
[2023-03-15 06:28:01] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:28:01] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 29 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:28:01] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
[2023-03-15 06:28:01] [INFO ] Invariant cache hit.
[2023-03-15 06:28:03] [INFO ] Dead Transitions using invariants and state equation in 1585 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1615 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:28:03] [INFO ] Flatten gal took : 42 ms
[2023-03-15 06:28:03] [INFO ] Flatten gal took : 45 ms
[2023-03-15 06:28:03] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 16 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:28:03] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
[2023-03-15 06:28:03] [INFO ] Invariant cache hit.
[2023-03-15 06:28:05] [INFO ] Dead Transitions using invariants and state equation in 1641 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1658 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:28:05] [INFO ] Flatten gal took : 41 ms
[2023-03-15 06:28:05] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:28:05] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in LTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 692 transition count 1396
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 692 transition count 1396
Applied a total of 16 rules in 17 ms. Remains 692 /700 variables (removed 8) and now considering 1396/1404 (removed 8) transitions.
[2023-03-15 06:28:05] [INFO ] Flow matrix only has 1364 transitions (discarded 32 similar events)
[2023-03-15 06:28:05] [INFO ] Invariant cache hit.
[2023-03-15 06:28:06] [INFO ] Dead Transitions using invariants and state equation in 1504 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1522 ms. Remains : 692/700 places, 1396/1404 transitions.
[2023-03-15 06:28:06] [INFO ] Flatten gal took : 50 ms
[2023-03-15 06:28:07] [INFO ] Flatten gal took : 44 ms
[2023-03-15 06:28:07] [INFO ] Input system was already deterministic with 1396 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 700/700 places, 1404/1404 transitions.
Drop transitions removed 56 transitions
Trivial Post-agglo rules discarded 56 transitions
Performed 56 trivial Post agglomeration. Transition count delta: 56
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 700 transition count 1348
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 1 with 56 rules applied. Total rules applied 112 place count 644 transition count 1348
Performed 80 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 80 Pre rules applied. Total rules applied 112 place count 644 transition count 1268
Deduced a syphon composed of 80 places in 0 ms
Reduce places removed 80 places and 0 transitions.
Iterating global reduction 2 with 160 rules applied. Total rules applied 272 place count 564 transition count 1268
Performed 88 Post agglomeration using F-continuation condition.Transition count delta: 88
Deduced a syphon composed of 88 places in 0 ms
Reduce places removed 88 places and 0 transitions.
Iterating global reduction 2 with 176 rules applied. Total rules applied 448 place count 476 transition count 1180
Applied a total of 448 rules in 85 ms. Remains 476 /700 variables (removed 224) and now considering 1180/1404 (removed 224) transitions.
[2023-03-15 06:28:07] [INFO ] Flow matrix only has 1148 transitions (discarded 32 similar events)
// Phase 1: matrix 1148 rows 476 cols
[2023-03-15 06:28:07] [INFO ] Computed 50 place invariants in 17 ms
[2023-03-15 06:28:08] [INFO ] Dead Transitions using invariants and state equation in 851 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 948 ms. Remains : 476/700 places, 1180/1404 transitions.
[2023-03-15 06:28:08] [INFO ] Flatten gal took : 38 ms
[2023-03-15 06:28:08] [INFO ] Flatten gal took : 40 ms
[2023-03-15 06:28:08] [INFO ] Input system was already deterministic with 1180 transitions.
Finished random walk after 1819 steps, including 0 resets, run visited all 1 properties in 13 ms. (steps per millisecond=139 )
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2023-03-15 06:28:08] [INFO ] Flatten gal took : 56 ms
[2023-03-15 06:28:08] [INFO ] Flatten gal took : 71 ms
[2023-03-15 06:28:08] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 14 ms.
[2023-03-15 06:28:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 700 places, 1404 transitions and 6324 arcs took 8 ms.
Total runtime 60211 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PolyORBLF-PT-S04J04T08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 11201592 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16092112 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 38 (type CNST) for 35 PolyORBLF-PT-S04J04T08-CTLFireability-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 38 (type CNST) for PolyORBLF-PT-S04J04T08-CTLFireability-10
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 44 (type CNST) for 35 PolyORBLF-PT-S04J04T08-CTLFireability-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 44 (type CNST) for PolyORBLF-PT-S04J04T08-CTLFireability-10 (obsolete)
lola: FINISHED task # 44 (type CNST) for PolyORBLF-PT-S04J04T08-CTLFireability-10
lola: result : false
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 54 (type EXCL) for 28 PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 28 PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 28 PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SRCH) for 28 PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 55 (type SRCH) for PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: result : unknown
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 54 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: result : true
lola: markings : 58
lola: fired transitions : 57
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for PolyORBLF-PT-S04J04T08-CTLFireability-09 (obsolete)
lola: CANCELED task # 53 (type EQUN) for PolyORBLF-PT-S04J04T08-CTLFireability-09 (obsolete)
lola: FINISHED task # 52 (type FNDP) for PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: result : true
lola: fired transitions : 56
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 5 (type EXCL) for 0 PolyORBLF-PT-S04J04T08-CTLFireability-00
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
sara: try reading problem file /home/mcc/execution/375/CTLFireability-53.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 5 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-00
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 PolyORBLF-PT-S04J04T08-CTLFireability-11
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 4/357 4/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 248992 m, 49798 m/sec, 277648 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 9/357 8/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 599187 m, 70039 m/sec, 696067 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 14/357 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 941264 m, 68415 m/sec, 1110552 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 19/357 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1278558 m, 67458 m/sec, 1532102 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 24/357 20/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1612259 m, 66740 m/sec, 1963642 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 29/357 24/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1946180 m, 66784 m/sec, 2390597 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 34/357 28/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 2273152 m, 65394 m/sec, 2813946 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 1 0 0 3 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

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11 CTL EXCL 25/697 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 1705148 m, 65443 m/sec, 4962037 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

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11 CTL EXCL 30/697 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 2022819 m, 63534 m/sec, 5931074 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0

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11 CTL EXCL 35/697 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 2342002 m, 63836 m/sec, 6905892 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
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PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 5/1149 5/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 417186 m, 83437 m/sec, 1039180 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 10/1149 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 826570 m, 81876 m/sec, 2077099 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 15/1149 13/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 1236224 m, 81930 m/sec, 3111954 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 20/1149 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 1632752 m, 79305 m/sec, 4133410 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 25/1149 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 2035867 m, 80623 m/sec, 5154034 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 30/1149 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 2437816 m, 80389 m/sec, 6172345 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-06: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
PolyORBLF-PT-S04J04T08-CTLFireability-10: DISJ true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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3 CTL EXCL 35/1149 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-00 2828984 m, 78233 m/sec, 7172261 t fired, .

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PolyORBLF-PT-S04J04T08-CTLFireability-09: DISJ true state space
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker

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20 EG EXCL 5/1704 1/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 107083 m, 21416 m/sec, 368434 t fired, .

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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-PT-S04J04T08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PolyORBLF-PT-S04J04T08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948000546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-PT-S04J04T08.tgz
mv PolyORBLF-PT-S04J04T08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;