Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873947300010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PhaseVariation-PT-D02CS100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873947300010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 564K
-rw-r--r-- 1 mcc users 8.7K Feb 26 15:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K Feb 26 15:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 15:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 15:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 15:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 26 15:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 26 15:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 93K Feb 26 15:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 61K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-00
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-01
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-02
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-03
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-04
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-05
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-06
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-07
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-08
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-09
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-10
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-11
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-12
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-13
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-14
FORMULA_NAME PhaseVariation-PT-D02CS100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678776025460

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PhaseVariation-PT-D02CS100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 06:40:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 06:40:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 06:40:27] [INFO ] Load time of PNML (sax parser for PT used): 38 ms
[2023-03-14 06:40:27] [INFO ] Transformed 14 places.
[2023-03-14 06:40:27] [INFO ] Transformed 65 transitions.
[2023-03-14 06:40:27] [INFO ] Parsed PT model containing 14 places and 65 transitions and 443 arcs in 99 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 14 out of 14 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 9 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:27] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
// Phase 1: matrix 9 rows 14 cols
[2023-03-14 06:40:27] [INFO ] Computed 5 place invariants in 7 ms
[2023-03-14 06:40:27] [INFO ] Dead Transitions using invariants and state equation in 188 ms found 0 transitions.
[2023-03-14 06:40:27] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:27] [INFO ] Invariant cache hit.
[2023-03-14 06:40:27] [INFO ] Implicit Places using invariants in 30 ms returned []
[2023-03-14 06:40:27] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:27] [INFO ] Invariant cache hit.
[2023-03-14 06:40:27] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-14 06:40:27] [INFO ] Implicit Places using invariants and state equation in 50 ms returned []
Implicit Place search using SMT with State Equation took 84 ms to find 0 implicit places.
[2023-03-14 06:40:27] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:27] [INFO ] Invariant cache hit.
[2023-03-14 06:40:27] [INFO ] Dead Transitions using invariants and state equation in 57 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 364 ms. Remains : 14/14 places, 65/65 transitions.
Support contains 14 out of 14 places after structural reductions.
[2023-03-14 06:40:27] [INFO ] Flatten gal took : 23 ms
[2023-03-14 06:40:27] [INFO ] Flatten gal took : 10 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Incomplete random walk after 10000 steps, including 91 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 45) seen :44
Finished Best-First random walk after 18 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=18 )
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 6 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 7 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Computed a total of 14 stabilizing places and 65 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 14 transition count 65
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 7 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 57 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 5 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 5 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 58 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 62 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 50 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 50 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 67 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 71 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 40 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:28] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 51 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:28] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:28] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:28] [INFO ] Invariant cache hit.
[2023-03-14 06:40:29] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:29] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:29] [INFO ] Invariant cache hit.
[2023-03-14 06:40:29] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:29] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:29] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:29] [INFO ] Invariant cache hit.
[2023-03-14 06:40:29] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:29] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:29] [INFO ] Invariant cache hit.
[2023-03-14 06:40:29] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Input system was already deterministic with 65 transitions.
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:29] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:29] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-14 06:40:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 14 places, 65 transitions and 443 arcs took 1 ms.
Total runtime 2184 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PhaseVariation-PT-D02CS100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA PhaseVariation-PT-D02CS100-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS100-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS100-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678777517095

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:317
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lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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PhaseVariation-PT-D02CS100-CTLFireability-05: CONJ 0 2 0 0 2 0 0 0
PhaseVariation-PT-D02CS100-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D02CS100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
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PhaseVariation-PT-D02CS100-CTLFireability-11: AGEF 0 1 0 0 1 0 0 0
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PhaseVariation-PT-D02CS100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D02CS100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/200 2/32 PhaseVariation-PT-D02CS100-CTLFireability-06 384839 m, 76967 m/sec, 12789574 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/200 3/32 PhaseVariation-PT-D02CS100-CTLFireability-06 654368 m, 53905 m/sec, 24658976 t fired, .

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23 CTL EXCL 15/200 4/32 PhaseVariation-PT-D02CS100-CTLFireability-06 805038 m, 30134 m/sec, 35581617 t fired, .

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23 CTL EXCL 20/200 5/32 PhaseVariation-PT-D02CS100-CTLFireability-06 1072253 m, 53443 m/sec, 47424150 t fired, .

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23 CTL EXCL 25/200 6/32 PhaseVariation-PT-D02CS100-CTLFireability-06 1220844 m, 29718 m/sec, 58125624 t fired, .

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23 CTL EXCL 30/200 6/32 PhaseVariation-PT-D02CS100-CTLFireability-06 1366578 m, 29146 m/sec, 68793003 t fired, .

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23 CTL EXCL 5/3395 2/5 PhaseVariation-PT-D02CS100-CTLFireability-06 384444 m, -1304213 m/sec, 12758268 t fired, .
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23 CTL EXCL 10/3395 3/5 PhaseVariation-PT-D02CS100-CTLFireability-06 654113 m, 53933 m/sec, 24640929 t fired, .
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23 CTL EXCL 15/3395 4/5 PhaseVariation-PT-D02CS100-CTLFireability-06 805407 m, 30258 m/sec, 35602561 t fired, .
54 CTL EXCL 15/188 6/32 PhaseVariation-PT-D02CS100-CTLFireability-15 1361209 m, 80825 m/sec, 43304769 t fired, .

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23 CTL EXCL 20/3395 5/5 PhaseVariation-PT-D02CS100-CTLFireability-06 1072602 m, 53439 m/sec, 47451249 t fired, .
54 CTL EXCL 20/188 8/32 PhaseVariation-PT-D02CS100-CTLFireability-15 1790002 m, 85758 m/sec, 57655661 t fired, .

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54 CTL EXCL 25/188 10/32 PhaseVariation-PT-D02CS100-CTLFireability-15 2156355 m, 73270 m/sec, 71775127 t fired, .

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54 CTL EXCL 30/199 11/32 PhaseVariation-PT-D02CS100-CTLFireability-15 2580337 m, 84796 m/sec, 85807845 t fired, .

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54 CTL EXCL 35/199 13/32 PhaseVariation-PT-D02CS100-CTLFireability-15 2921919 m, 68316 m/sec, 99120476 t fired, .

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54 CTL EXCL 40/199 14/32 PhaseVariation-PT-D02CS100-CTLFireability-15 3337801 m, 83176 m/sec, 112998789 t fired, .

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54 CTL EXCL 45/199 16/32 PhaseVariation-PT-D02CS100-CTLFireability-15 3690400 m, 70519 m/sec, 126626525 t fired, .

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54 CTL EXCL 50/199 17/32 PhaseVariation-PT-D02CS100-CTLFireability-15 4029742 m, 67868 m/sec, 139843590 t fired, .

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54 CTL EXCL 55/199 19/32 PhaseVariation-PT-D02CS100-CTLFireability-15 4441978 m, 82447 m/sec, 153549362 t fired, .

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54 CTL EXCL 60/199 21/32 PhaseVariation-PT-D02CS100-CTLFireability-15 4784513 m, 68507 m/sec, 166766510 t fired, .

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54 CTL EXCL 65/199 22/32 PhaseVariation-PT-D02CS100-CTLFireability-15 5112256 m, 65548 m/sec, 179695681 t fired, .

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54 CTL EXCL 70/199 24/32 PhaseVariation-PT-D02CS100-CTLFireability-15 5522626 m, 82074 m/sec, 193368363 t fired, .

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54 CTL EXCL 75/199 25/32 PhaseVariation-PT-D02CS100-CTLFireability-15 5875880 m, 70650 m/sec, 207005906 t fired, .

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54 CTL EXCL 81/199 27/32 PhaseVariation-PT-D02CS100-CTLFireability-15 6224923 m, 69808 m/sec, 220618756 t fired, .

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54 CTL EXCL 86/199 28/32 PhaseVariation-PT-D02CS100-CTLFireability-15 6561814 m, 67378 m/sec, 233931777 t fired, .

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PhaseVariation-PT-D02CS100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PhaseVariation-PT-D02CS100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-09: CONJ 0 0 1 0 3 0 0 0
PhaseVariation-PT-D02CS100-CTLFireability-11: AGEF 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 105/2229 31/32 PhaseVariation-PT-D02CS100-CTLFireability-09 7271687 m, 63261 m/sec, 270766030 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D02CS100-CTLFireability-00: EG true state space / EG
PhaseVariation-PT-D02CS100-CTLFireability-05: CONJ false state space /EFEG
PhaseVariation-PT-D02CS100-CTLFireability-10: CTL true CTL model checker
PhaseVariation-PT-D02CS100-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D02CS100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-09: CONJ 0 0 1 0 3 0 0 0
PhaseVariation-PT-D02CS100-CTLFireability-11: AGEF 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 110/2229 32/32 PhaseVariation-PT-D02CS100-CTLFireability-09 7585088 m, 62680 m/sec, 283706289 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D02CS100-CTLFireability-00: EG true state space / EG
PhaseVariation-PT-D02CS100-CTLFireability-05: CONJ false state space /EFEG
PhaseVariation-PT-D02CS100-CTLFireability-10: CTL true CTL model checker
PhaseVariation-PT-D02CS100-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D02CS100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-09: CONJ 0 0 0 0 3 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-11: AGEF 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D02CS100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D02CS100-CTLFireability-00: EG true state space / EG
PhaseVariation-PT-D02CS100-CTLFireability-01: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-02: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-03: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-04: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-05: CONJ false state space /EFEG
PhaseVariation-PT-D02CS100-CTLFireability-06: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-07: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-08: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-09: CONJ unknown CONJ
PhaseVariation-PT-D02CS100-CTLFireability-10: CTL true CTL model checker
PhaseVariation-PT-D02CS100-CTLFireability-11: AGEF unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-12: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-13: CTL unknown AGGR
PhaseVariation-PT-D02CS100-CTLFireability-14: CTL true CTL model checker
PhaseVariation-PT-D02CS100-CTLFireability-15: CTL unknown AGGR


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