About the Execution of LoLA for PolyORBLF-PT-S04J04T08
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 8128.604 | 3600000.00 | 7702335.00 | 10341.90 | F??T??FF?TT?TF?T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r294-tall-167873946800546.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is PolyORBLF-PT-S04J04T08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r294-tall-167873946800546
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.2M
-rw-r--r-- 1 mcc users 15K Feb 26 14:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Feb 26 14:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 76K Feb 26 14:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 344K Feb 26 14:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 31K Feb 26 14:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 164K Feb 26 14:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 178K Feb 26 14:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 793K Feb 26 14:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.3M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-00
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-01
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-02
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-03
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-04
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-05
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-06
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-07
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-08
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-09
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-10
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-11
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-12
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-13
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-14
FORMULA_NAME PolyORBLF-PT-S04J04T08-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678899481001
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-PT-S04J04T08
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT PolyORBLF-PT-S04J04T08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T08-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 8078428 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16159560 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 41 (type CNST) for 40 PolyORBLF-PT-S04J04T08-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 41 (type CNST) for PolyORBLF-PT-S04J04T08-CTLFireability-12
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 8 (type EXCL) for 7 PolyORBLF-PT-S04J04T08-CTLFireability-01
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 52 (type FNDP) for 46 PolyORBLF-PT-S04J04T08-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 46 PolyORBLF-PT-S04J04T08-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 46 PolyORBLF-PT-S04J04T08-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 57 (type SRCH) for PolyORBLF-PT-S04J04T08-CTLFireability-14
lola: result : unknown
lola: markings : 5
lola: fired transitions : 4
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type FNDP) for 49 PolyORBLF-PT-S04J04T08-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type FNDP) for PolyORBLF-PT-S04J04T08-CTLFireability-15
lola: result : true
lola: fired transitions : 72
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-53.sara.
sara: place or transition ordering is non-deterministic
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53 EF STEQ 2/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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53 EF STEQ 7/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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53 EF STEQ 12/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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52 EF FNDP 17/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 511687 t fired, 1 attempts, .
53 EF STEQ 17/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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52 EF FNDP 22/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 667533 t fired, 1 attempts, .
53 EF STEQ 22/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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53 EF STEQ 27/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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53 EF STEQ 32/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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53 EF STEQ 37/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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53 EF STEQ 42/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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38 CTL EXCL 5/277 4/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 341451 m, 68290 m/sec, 448824 t fired, .
52 EF FNDP 52/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 1590936 t fired, 6 attempts, .
53 EF STEQ 52/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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52 EF FNDP 57/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 1742597 t fired, 8 attempts, .
53 EF STEQ 57/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 15/277 11/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 979717 m, 63557 m/sec, 1321992 t fired, .
52 EF FNDP 62/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 1893590 t fired, 11 attempts, .
53 EF STEQ 62/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 20/277 14/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1289384 m, 61933 m/sec, 1754869 t fired, .
52 EF FNDP 67/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2045453 t fired, 17 attempts, .
53 EF STEQ 67/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 25/277 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1594621 m, 61047 m/sec, 2181805 t fired, .
52 EF FNDP 72/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2197254 t fired, 21 attempts, .
53 EF STEQ 72/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 30/277 21/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 1903694 m, 61814 m/sec, 2619828 t fired, .
52 EF FNDP 77/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2348937 t fired, 23 attempts, .
53 EF STEQ 77/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 35/277 24/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 2210285 m, 61318 m/sec, 3060879 t fired, .
52 EF FNDP 82/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2500567 t fired, 28 attempts, .
53 EF STEQ 82/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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38 CTL EXCL 40/277 27/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 2512493 m, 60441 m/sec, 3499047 t fired, .
52 EF FNDP 87/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2652031 t fired, 35 attempts, .
53 EF STEQ 87/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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38 CTL EXCL 45/277 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-11 2812939 m, 60089 m/sec, 3945360 t fired, .
52 EF FNDP 92/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2803367 t fired, 39 attempts, .
53 EF STEQ 92/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 97/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 2954813 t fired, 47 attempts, .
53 EF STEQ 97/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/327 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-09 767601 m, 153520 m/sec, 800580 t fired, .
52 EF FNDP 102/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3105798 t fired, 56 attempts, .
53 EF STEQ 102/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: FINISHED task # 32 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-09
lola: result : true
lola: markings : 1295880
lola: fired transitions : 1357684
lola: time used : 9.000000
lola: memory pages used : 15
lola: LAUNCH task # 17 (type EXCL) for 16 PolyORBLF-PT-S04J04T08-CTLFireability-04
lola: time limit : 363 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 1/363 1/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 54451 m, 10890 m/sec, 118824 t fired, .
52 EF FNDP 107/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3257124 t fired, 61 attempts, .
53 EF STEQ 107/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 6/363 5/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 398640 m, 68837 m/sec, 923545 t fired, .
52 EF FNDP 112/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3408331 t fired, 68 attempts, .
53 EF STEQ 112/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 11/363 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 733246 m, 66921 m/sec, 1719118 t fired, .
52 EF FNDP 117/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3559781 t fired, 78 attempts, .
53 EF STEQ 117/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 16/363 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 1061719 m, 65694 m/sec, 2500004 t fired, .
52 EF FNDP 122/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3711245 t fired, 87 attempts, .
53 EF STEQ 122/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 21/363 15/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 1384669 m, 64590 m/sec, 3274959 t fired, .
52 EF FNDP 127/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 3862701 t fired, 97 attempts, .
53 EF STEQ 127/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 26/363 19/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 1705422 m, 64150 m/sec, 4047602 t fired, .
52 EF FNDP 132/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4014228 t fired, 106 attempts, .
53 EF STEQ 132/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 31/363 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 2020342 m, 62984 m/sec, 4815725 t fired, .
52 EF FNDP 137/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4165516 t fired, 116 attempts, .
53 EF STEQ 137/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 36/363 25/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 2337690 m, 63469 m/sec, 5583397 t fired, .
52 EF FNDP 142/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4316877 t fired, 125 attempts, .
53 EF STEQ 142/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 41/363 29/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 2645032 m, 61468 m/sec, 6341199 t fired, .
52 EF FNDP 147/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4468101 t fired, 135 attempts, .
53 EF STEQ 147/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 46/363 32/32 PolyORBLF-PT-S04J04T08-CTLFireability-04 2952302 m, 61454 m/sec, 7105630 t fired, .
52 EF FNDP 152/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4619391 t fired, 140 attempts, .
53 EF STEQ 152/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: CANCELED task # 17 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 157/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4770798 t fired, 147 attempts, .
53 EF STEQ 157/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: LAUNCH task # 14 (type EXCL) for 13 PolyORBLF-PT-S04J04T08-CTLFireability-03
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 5/402 5/32 PolyORBLF-PT-S04J04T08-CTLFireability-03 388610 m, 77722 m/sec, 564965 t fired, .
52 EF FNDP 162/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 4922053 t fired, 159 attempts, .
53 EF STEQ 162/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 10/402 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-03 755160 m, 73310 m/sec, 1124686 t fired, .
52 EF FNDP 167/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5073383 t fired, 167 attempts, .
53 EF STEQ 167/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 15/402 13/32 PolyORBLF-PT-S04J04T08-CTLFireability-03 1098822 m, 68732 m/sec, 1691973 t fired, .
52 EF FNDP 172/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5224924 t fired, 171 attempts, .
53 EF STEQ 172/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 20/402 17/32 PolyORBLF-PT-S04J04T08-CTLFireability-03 1441751 m, 68585 m/sec, 2261615 t fired, .
52 EF FNDP 177/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5376382 t fired, 176 attempts, .
53 EF STEQ 177/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: FINISHED task # 14 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-03
lola: result : true
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lola: LAUNCH task # 11 (type EXCL) for 10 PolyORBLF-PT-S04J04T08-CTLFireability-02
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 1/456 1/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 55381 m, 11076 m/sec, 113192 t fired, .
52 EF FNDP 182/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5527791 t fired, 188 attempts, .
53 EF STEQ 182/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 6/456 7/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 526812 m, 94286 m/sec, 1085221 t fired, .
52 EF FNDP 187/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5679121 t fired, 194 attempts, .
53 EF STEQ 187/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 11/456 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 988047 m, 92247 m/sec, 2040347 t fired, .
52 EF FNDP 192/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5830508 t fired, 202 attempts, .
53 EF STEQ 192/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 16/456 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 1445131 m, 91416 m/sec, 2991386 t fired, .
52 EF FNDP 197/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 5981921 t fired, 206 attempts, .
53 EF STEQ 197/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 21/456 21/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 1895360 m, 90045 m/sec, 3930394 t fired, .
52 EF FNDP 202/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6133505 t fired, 218 attempts, .
53 EF STEQ 202/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 26/456 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 2345442 m, 90016 m/sec, 4870748 t fired, .
52 EF FNDP 207/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6284708 t fired, 226 attempts, .
53 EF STEQ 207/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
11 CTL EXCL 31/456 31/32 PolyORBLF-PT-S04J04T08-CTLFireability-02 2790096 m, 88930 m/sec, 5800773 t fired, .
52 EF FNDP 212/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6435968 t fired, 237 attempts, .
53 EF STEQ 212/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: CANCELED task # 11 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 217/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6586867 t fired, 250 attempts, .
53 EF STEQ 217/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: LAUNCH task # 5 (type EXCL) for 0 PolyORBLF-PT-S04J04T08-CTLFireability-00
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lola: result : false
lola: markings : 1286
lola: fired transitions : 1289
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lola: result : false
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lola: fired transitions : 2228
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lola: LAUNCH task # 54 (type EXCL) for 46 PolyORBLF-PT-S04J04T08-CTLFireability-14
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 222/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6738297 t fired, 255 attempts, .
53 EF STEQ 222/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 5/789 2/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 141343 m, 28268 m/sec, 155317 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 227/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 6889544 t fired, 264 attempts, .
53 EF STEQ 227/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 10/789 3/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 282483 m, 28228 m/sec, 313918 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 232/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7041100 t fired, 271 attempts, .
53 EF STEQ 232/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 15/789 4/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 422383 m, 27980 m/sec, 475090 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 237/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7191317 t fired, 282 attempts, .
53 EF STEQ 237/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 20/789 6/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 561312 m, 27785 m/sec, 637763 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 242/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7342781 t fired, 298 attempts, .
53 EF STEQ 242/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 25/789 7/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 699409 m, 27619 m/sec, 801260 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 247/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7494461 t fired, 302 attempts, .
53 EF STEQ 247/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 30/789 8/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 837259 m, 27570 m/sec, 965753 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 252/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7646346 t fired, 317 attempts, .
53 EF STEQ 252/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 35/789 10/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 974660 m, 27480 m/sec, 1132717 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 257/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7797976 t fired, 326 attempts, .
53 EF STEQ 257/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 40/789 11/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1111168 m, 27301 m/sec, 1299515 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 262/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 7949522 t fired, 335 attempts, .
53 EF STEQ 262/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 45/789 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1247830 m, 27332 m/sec, 1466653 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 267/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8100731 t fired, 343 attempts, .
53 EF STEQ 267/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 50/789 13/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1384170 m, 27268 m/sec, 1634605 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 272/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8252156 t fired, 351 attempts, .
53 EF STEQ 272/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 55/789 14/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1520267 m, 27219 m/sec, 1802412 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 277/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8403548 t fired, 360 attempts, .
53 EF STEQ 277/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 60/789 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1656256 m, 27197 m/sec, 1969862 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 282/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8554346 t fired, 369 attempts, .
53 EF STEQ 282/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 65/789 17/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1791833 m, 27115 m/sec, 2137918 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 287/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8704988 t fired, 382 attempts, .
53 EF STEQ 287/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 70/789 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 1925201 m, 26673 m/sec, 2303610 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 292/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 8853468 t fired, 388 attempts, .
53 EF STEQ 292/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 75/789 19/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2061565 m, 27272 m/sec, 2473999 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 297/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9005249 t fired, 393 attempts, .
53 EF STEQ 297/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 80/789 20/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2196798 m, 27046 m/sec, 2642524 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 302/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9157044 t fired, 402 attempts, .
53 EF STEQ 302/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 85/789 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2331932 m, 27026 m/sec, 2812064 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 307/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9308561 t fired, 415 attempts, .
53 EF STEQ 307/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 90/789 23/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2467030 m, 27019 m/sec, 2981440 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 312/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9460329 t fired, 424 attempts, .
53 EF STEQ 312/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 95/789 24/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2602169 m, 27027 m/sec, 3151337 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 317/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9611905 t fired, 433 attempts, .
53 EF STEQ 317/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 100/789 25/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2737411 m, 27048 m/sec, 3323142 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 322/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9763565 t fired, 439 attempts, .
53 EF STEQ 322/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 105/789 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 2871779 m, 26873 m/sec, 3492969 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 327/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 9915211 t fired, 448 attempts, .
53 EF STEQ 327/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 110/789 28/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 3005538 m, 26751 m/sec, 3664427 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 332/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10066747 t fired, 458 attempts, .
53 EF STEQ 332/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 115/789 29/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 3139845 m, 26861 m/sec, 3834423 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 337/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10218451 t fired, 470 attempts, .
53 EF STEQ 337/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 120/789 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 3273877 m, 26806 m/sec, 4005807 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 342/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10370265 t fired, 482 attempts, .
53 EF STEQ 342/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 125/789 31/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 3407787 m, 26782 m/sec, 4178809 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 3 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 347/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10522155 t fired, 496 attempts, .
53 EF STEQ 347/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
54 EF EXCL 130/789 32/32 PolyORBLF-PT-S04J04T08-CTLFireability-14 3541706 m, 26783 m/sec, 4349675 t fired, .
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lola: CANCELED task # 54 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 352/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10674183 t fired, 504 attempts, .
53 EF STEQ 352/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: LAUNCH task # 55 (type EXCL) for 28 PolyORBLF-PT-S04J04T08-CTLFireability-08
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 357/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10825637 t fired, 515 attempts, .
53 EF STEQ 357/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 5/1007 2/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 137371 m, 27474 m/sec, 148064 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 362/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 10977394 t fired, 528 attempts, .
53 EF STEQ 362/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 10/1007 3/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 274319 m, 27389 m/sec, 299944 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 367/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11129059 t fired, 538 attempts, .
53 EF STEQ 367/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 15/1007 4/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 411101 m, 27356 m/sec, 453977 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 372/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11280890 t fired, 547 attempts, .
53 EF STEQ 372/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 20/1007 6/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 547450 m, 27269 m/sec, 608423 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 377/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11432656 t fired, 560 attempts, .
53 EF STEQ 377/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 25/1007 7/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 684038 m, 27317 m/sec, 765047 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 382/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11584367 t fired, 578 attempts, .
53 EF STEQ 382/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 30/1007 8/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 820597 m, 27311 m/sec, 921965 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 387/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11736355 t fired, 589 attempts, .
53 EF STEQ 387/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 35/1007 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 956585 m, 27197 m/sec, 1078740 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 392/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 11888005 t fired, 596 attempts, .
53 EF STEQ 392/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 40/1007 11/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1092116 m, 27106 m/sec, 1235328 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 397/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12039792 t fired, 609 attempts, .
53 EF STEQ 397/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 45/1007 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1227868 m, 27150 m/sec, 1393675 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 402/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12191678 t fired, 621 attempts, .
53 EF STEQ 402/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 50/1007 13/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1363911 m, 27208 m/sec, 1552370 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 407/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12343492 t fired, 631 attempts, .
53 EF STEQ 407/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 55/1007 14/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1499629 m, 27143 m/sec, 1712053 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 412/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12495285 t fired, 643 attempts, .
53 EF STEQ 412/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 60/1007 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1635298 m, 27133 m/sec, 1872413 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 417/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12646900 t fired, 653 attempts, .
53 EF STEQ 417/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 65/1007 17/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1768913 m, 26723 m/sec, 2030964 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 422/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12798688 t fired, 664 attempts, .
53 EF STEQ 422/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 70/1007 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 1901154 m, 26448 m/sec, 2188950 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 427/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 12950336 t fired, 674 attempts, .
53 EF STEQ 427/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 75/1007 19/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2035579 m, 26885 m/sec, 2348521 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 432/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13101984 t fired, 682 attempts, .
53 EF STEQ 432/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 80/1007 21/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2169114 m, 26707 m/sec, 2507974 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 437/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13253780 t fired, 703 attempts, .
53 EF STEQ 437/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 85/1007 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2302387 m, 26654 m/sec, 2667855 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 442/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13405508 t fired, 715 attempts, .
53 EF STEQ 442/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 90/1007 23/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2435985 m, 26719 m/sec, 2828856 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 447/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13557306 t fired, 726 attempts, .
53 EF STEQ 447/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 95/1007 24/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2569677 m, 26738 m/sec, 2989607 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 452/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13709073 t fired, 737 attempts, .
53 EF STEQ 452/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 100/1007 25/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2703093 m, 26683 m/sec, 3150922 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 457/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 13861032 t fired, 755 attempts, .
53 EF STEQ 457/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 105/1007 27/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2835373 m, 26456 m/sec, 3311076 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 462/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14012576 t fired, 764 attempts, .
53 EF STEQ 462/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 110/1007 28/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 2968479 m, 26621 m/sec, 3471941 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 467/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14164500 t fired, 781 attempts, .
53 EF STEQ 467/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 115/1007 29/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 3101494 m, 26603 m/sec, 3633762 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 472/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14316305 t fired, 792 attempts, .
53 EF STEQ 472/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 120/1007 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 3234187 m, 26538 m/sec, 3795818 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 477/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14468326 t fired, 807 attempts, .
53 EF STEQ 477/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
55 AGEF EXCL 125/1007 31/32 PolyORBLF-PT-S04J04T08-CTLFireability-08 3366947 m, 26552 m/sec, 3957405 t fired, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 482/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14620510 t fired, 820 attempts, .
53 EF STEQ 482/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 5/1445 1/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 116636 m, 23327 m/sec, 397992 t fired, .
52 EF FNDP 487/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14772343 t fired, 833 attempts, .
53 EF STEQ 487/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 10/1445 3/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 251868 m, 27046 m/sec, 860139 t fired, .
52 EF FNDP 492/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 14924303 t fired, 846 attempts, .
53 EF STEQ 492/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 15/1445 4/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 377613 m, 25149 m/sec, 1281064 t fired, .
52 EF FNDP 497/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15076125 t fired, 862 attempts, .
53 EF STEQ 497/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 20/1445 5/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 486350 m, 21747 m/sec, 1630739 t fired, .
52 EF FNDP 502/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15228000 t fired, 866 attempts, .
53 EF STEQ 502/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 25/1445 6/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 594972 m, 21724 m/sec, 1965558 t fired, .
52 EF FNDP 507/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15379959 t fired, 881 attempts, .
53 EF STEQ 507/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 30/1445 6/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 680871 m, 17179 m/sec, 2215627 t fired, .
52 EF FNDP 512/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15531577 t fired, 890 attempts, .
53 EF STEQ 512/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 35/1445 7/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 753548 m, 14535 m/sec, 2433910 t fired, .
52 EF FNDP 517/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15683567 t fired, 901 attempts, .
53 EF STEQ 517/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 40/1445 8/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 829117 m, 15113 m/sec, 2657485 t fired, .
52 EF FNDP 522/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15835465 t fired, 906 attempts, .
53 EF STEQ 522/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 45/1445 8/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 903457 m, 14868 m/sec, 2878225 t fired, .
52 EF FNDP 527/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 15987235 t fired, 913 attempts, .
53 EF STEQ 527/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 50/1445 9/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 973547 m, 14018 m/sec, 3097550 t fired, .
52 EF FNDP 532/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16139010 t fired, 925 attempts, .
53 EF STEQ 532/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 55/1445 10/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1086970 m, 22684 m/sec, 3484939 t fired, .
52 EF FNDP 537/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16290677 t fired, 933 attempts, .
53 EF STEQ 537/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 60/1445 11/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1190013 m, 20608 m/sec, 3811079 t fired, .
52 EF FNDP 542/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16442322 t fired, 942 attempts, .
53 EF STEQ 542/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 65/1445 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1305074 m, 23012 m/sec, 4191119 t fired, .
52 EF FNDP 547/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16594015 t fired, 955 attempts, .
53 EF STEQ 547/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 70/1445 12/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1399218 m, 18828 m/sec, 4481943 t fired, .
52 EF FNDP 552/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16746010 t fired, 964 attempts, .
53 EF STEQ 552/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 75/1445 13/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1499295 m, 20015 m/sec, 4797934 t fired, .
52 EF FNDP 557/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 16897832 t fired, 970 attempts, .
53 EF STEQ 557/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 80/1445 14/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1596733 m, 19487 m/sec, 5096397 t fired, .
52 EF FNDP 562/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17049965 t fired, 984 attempts, .
53 EF STEQ 562/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 85/1445 15/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1686709 m, 17995 m/sec, 5358460 t fired, .
52 EF FNDP 567/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17201838 t fired, 990 attempts, .
53 EF STEQ 567/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 90/1445 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1768218 m, 16301 m/sec, 5600640 t fired, .
52 EF FNDP 572/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17353585 t fired, 1000 attempts, .
53 EF STEQ 572/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 95/1445 16/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1832267 m, 12809 m/sec, 5809757 t fired, .
52 EF FNDP 577/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17505354 t fired, 1016 attempts, .
53 EF STEQ 577/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 100/1445 17/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 1918165 m, 17179 m/sec, 6083286 t fired, .
52 EF FNDP 582/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17656978 t fired, 1032 attempts, .
53 EF STEQ 582/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 105/1445 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2011714 m, 18709 m/sec, 6330697 t fired, .
52 EF FNDP 587/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17808771 t fired, 1047 attempts, .
53 EF STEQ 587/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 110/1445 18/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2098202 m, 17297 m/sec, 6566111 t fired, .
52 EF FNDP 592/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 17960640 t fired, 1058 attempts, .
53 EF STEQ 592/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 115/1445 19/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2198978 m, 20155 m/sec, 6892520 t fired, .
52 EF FNDP 597/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18112709 t fired, 1069 attempts, .
53 EF STEQ 597/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 120/1445 20/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2295650 m, 19334 m/sec, 7169598 t fired, .
52 EF FNDP 602/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18264729 t fired, 1087 attempts, .
53 EF STEQ 602/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 125/1445 21/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2388059 m, 18481 m/sec, 7424304 t fired, .
52 EF FNDP 607/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18415523 t fired, 1100 attempts, .
53 EF STEQ 607/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 130/1445 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2482114 m, 18811 m/sec, 7690807 t fired, .
52 EF FNDP 612/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18563814 t fired, 1113 attempts, .
53 EF STEQ 612/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 135/1445 22/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2585106 m, 20598 m/sec, 7988060 t fired, .
52 EF FNDP 617/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18712298 t fired, 1130 attempts, .
53 EF STEQ 617/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 140/1445 23/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2682765 m, 19531 m/sec, 8243419 t fired, .
52 EF FNDP 622/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 18860883 t fired, 1141 attempts, .
53 EF STEQ 622/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 145/1445 24/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2771035 m, 17654 m/sec, 8456875 t fired, .
52 EF FNDP 627/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19010754 t fired, 1152 attempts, .
53 EF STEQ 627/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 150/1445 25/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2856025 m, 16998 m/sec, 8687110 t fired, .
52 EF FNDP 632/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19159790 t fired, 1162 attempts, .
53 EF STEQ 632/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 155/1445 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 2957640 m, 20323 m/sec, 8990627 t fired, .
52 EF FNDP 637/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19307847 t fired, 1166 attempts, .
53 EF STEQ 637/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 160/1445 26/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3050945 m, 18661 m/sec, 9232006 t fired, .
52 EF FNDP 642/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19457760 t fired, 1178 attempts, .
53 EF STEQ 642/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 165/1445 27/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3138384 m, 17487 m/sec, 9456746 t fired, .
52 EF FNDP 647/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19609833 t fired, 1189 attempts, .
53 EF STEQ 647/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 170/1445 28/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3215231 m, 15369 m/sec, 9635128 t fired, .
52 EF FNDP 652/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19761423 t fired, 1201 attempts, .
53 EF STEQ 652/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 175/1445 28/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3289073 m, 14768 m/sec, 9778365 t fired, .
52 EF FNDP 657/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 19913462 t fired, 1211 attempts, .
53 EF STEQ 657/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 180/1445 29/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3355133 m, 13212 m/sec, 9884154 t fired, .
52 EF FNDP 662/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20065481 t fired, 1216 attempts, .
53 EF STEQ 662/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 185/1445 29/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3421103 m, 13194 m/sec, 9993810 t fired, .
52 EF FNDP 667/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20217273 t fired, 1237 attempts, .
53 EF STEQ 667/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 190/1445 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3496317 m, 15042 m/sec, 10159879 t fired, .
52 EF FNDP 672/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20369100 t fired, 1253 attempts, .
53 EF STEQ 672/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 195/1445 30/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3569881 m, 14712 m/sec, 10319528 t fired, .
52 EF FNDP 677/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20520983 t fired, 1266 attempts, .
53 EF STEQ 677/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 200/1445 31/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3637802 m, 13584 m/sec, 10426410 t fired, .
52 EF FNDP 682/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20672853 t fired, 1280 attempts, .
53 EF STEQ 682/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 205/1445 31/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3705800 m, 13599 m/sec, 10550165 t fired, .
52 EF FNDP 687/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20824973 t fired, 1295 attempts, .
53 EF STEQ 687/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 EG EXCL 210/1445 32/32 PolyORBLF-PT-S04J04T08-CTLFireability-05 3783195 m, 15479 m/sec, 10709414 t fired, .
52 EF FNDP 692/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 20976763 t fired, 1307 attempts, .
53 EF STEQ 692/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: CANCELED task # 20 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-07: F 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 697/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21128824 t fired, 1319 attempts, .
53 EF STEQ 697/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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lola: LAUNCH task # 56 (type EXCL) for 25 PolyORBLF-PT-S04J04T08-CTLFireability-07
lola: time limit : 2676 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for PolyORBLF-PT-S04J04T08-CTLFireability-07
lola: result : true
lola: markings : 816
lola: fired transitions : 820
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 702/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21280653 t fired, 1335 attempts, .
53 EF STEQ 702/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 707/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21432242 t fired, 1341 attempts, .
53 EF STEQ 707/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 712/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21583805 t fired, 1358 attempts, .
53 EF STEQ 712/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 717/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21735602 t fired, 1370 attempts, .
53 EF STEQ 717/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 722/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 21887327 t fired, 1376 attempts, .
53 EF STEQ 722/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 727/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22039329 t fired, 1387 attempts, .
53 EF STEQ 727/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 732/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22191239 t fired, 1395 attempts, .
53 EF STEQ 732/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 737/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22342896 t fired, 1409 attempts, .
53 EF STEQ 737/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 742/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22494556 t fired, 1415 attempts, .
53 EF STEQ 742/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 747/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22645026 t fired, 1428 attempts, .
53 EF STEQ 747/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 752/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22795258 t fired, 1448 attempts, .
53 EF STEQ 752/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 757/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 22945166 t fired, 1459 attempts, .
53 EF STEQ 757/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 762/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23094991 t fired, 1471 attempts, .
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52 EF FNDP 767/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23244332 t fired, 1474 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 772/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23394679 t fired, 1492 attempts, .
53 EF STEQ 772/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 777/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23546066 t fired, 1501 attempts, .
53 EF STEQ 777/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 782/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23697542 t fired, 1511 attempts, .
53 EF STEQ 782/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 787/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 23848986 t fired, 1520 attempts, .
53 EF STEQ 787/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 792/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24000618 t fired, 1532 attempts, .
53 EF STEQ 792/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 797/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24152033 t fired, 1546 attempts, .
53 EF STEQ 797/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 802/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24303488 t fired, 1561 attempts, .
53 EF STEQ 802/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 807/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24455391 t fired, 1570 attempts, .
53 EF STEQ 807/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 812/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24606940 t fired, 1582 attempts, .
53 EF STEQ 812/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 817/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24758518 t fired, 1590 attempts, .
53 EF STEQ 817/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 822/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 24910508 t fired, 1601 attempts, .
53 EF STEQ 822/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 827/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25062325 t fired, 1610 attempts, .
53 EF STEQ 827/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 832/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25213981 t fired, 1620 attempts, .
53 EF STEQ 832/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 837/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25365174 t fired, 1634 attempts, .
53 EF STEQ 837/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 842/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25516798 t fired, 1649 attempts, .
53 EF STEQ 842/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 847/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25668106 t fired, 1657 attempts, .
53 EF STEQ 847/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 852/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25819580 t fired, 1664 attempts, .
53 EF STEQ 852/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 857/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 25970888 t fired, 1675 attempts, .
53 EF STEQ 857/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 862/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26122299 t fired, 1693 attempts, .
53 EF STEQ 862/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 867/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26273419 t fired, 1699 attempts, .
53 EF STEQ 867/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 872/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26424710 t fired, 1714 attempts, .
53 EF STEQ 872/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 877/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26576266 t fired, 1722 attempts, .
53 EF STEQ 877/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 882/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26728050 t fired, 1731 attempts, .
53 EF STEQ 882/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 887/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 26879675 t fired, 1743 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 892/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27031205 t fired, 1750 attempts, .
53 EF STEQ 892/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 897/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27182543 t fired, 1763 attempts, .
53 EF STEQ 897/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 902/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27333745 t fired, 1771 attempts, .
53 EF STEQ 902/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 907/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27482578 t fired, 1785 attempts, .
53 EF STEQ 907/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 912/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27630295 t fired, 1792 attempts, .
53 EF STEQ 912/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 917/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27779986 t fired, 1801 attempts, .
53 EF STEQ 917/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 922/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 27931068 t fired, 1808 attempts, .
53 EF STEQ 922/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 927/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28082005 t fired, 1822 attempts, .
53 EF STEQ 927/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 932/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28233075 t fired, 1830 attempts, .
53 EF STEQ 932/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 937/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28383936 t fired, 1837 attempts, .
53 EF STEQ 937/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 942/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28533222 t fired, 1843 attempts, .
53 EF STEQ 942/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 947/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28683214 t fired, 1856 attempts, .
53 EF STEQ 947/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 952/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28832681 t fired, 1864 attempts, .
53 EF STEQ 952/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 957/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 28982856 t fired, 1875 attempts, .
53 EF STEQ 957/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 962/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29132061 t fired, 1893 attempts, .
53 EF STEQ 962/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 967/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29281313 t fired, 1905 attempts, .
53 EF STEQ 967/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 972/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29431745 t fired, 1919 attempts, .
53 EF STEQ 972/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 977/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29581650 t fired, 1939 attempts, .
53 EF STEQ 977/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 982/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29731740 t fired, 1955 attempts, .
53 EF STEQ 982/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 987/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 29881878 t fired, 1967 attempts, .
53 EF STEQ 987/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 992/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30031764 t fired, 1977 attempts, .
53 EF STEQ 992/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 997/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30181795 t fired, 1991 attempts, .
53 EF STEQ 997/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1002/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30332268 t fired, 1999 attempts, .
53 EF STEQ 1002/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1007/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30482330 t fired, 2007 attempts, .
53 EF STEQ 1007/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1012/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30632087 t fired, 2020 attempts, .
53 EF STEQ 1012/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1017/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30781212 t fired, 2030 attempts, .
53 EF STEQ 1017/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1022/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 30930247 t fired, 2041 attempts, .
53 EF STEQ 1022/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1027/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31080271 t fired, 2050 attempts, .
53 EF STEQ 1027/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1032/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31230258 t fired, 2063 attempts, .
53 EF STEQ 1032/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1037/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31379012 t fired, 2070 attempts, .
53 EF STEQ 1037/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1042/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31528240 t fired, 2080 attempts, .
53 EF STEQ 1042/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1047/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31677101 t fired, 2092 attempts, .
53 EF STEQ 1047/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1052/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31826016 t fired, 2098 attempts, .
53 EF STEQ 1052/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1057/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 31975521 t fired, 2117 attempts, .
53 EF STEQ 1057/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1062/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32124895 t fired, 2135 attempts, .
53 EF STEQ 1062/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1067/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32274515 t fired, 2141 attempts, .
53 EF STEQ 1067/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1072/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32424465 t fired, 2151 attempts, .
53 EF STEQ 1072/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1077/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32574313 t fired, 2155 attempts, .
53 EF STEQ 1077/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1082/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32724673 t fired, 2164 attempts, .
53 EF STEQ 1082/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1087/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 32874055 t fired, 2178 attempts, .
53 EF STEQ 1087/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1092/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33023238 t fired, 2184 attempts, .
53 EF STEQ 1092/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1097/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33171848 t fired, 2193 attempts, .
53 EF STEQ 1097/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1102/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33321270 t fired, 2205 attempts, .
53 EF STEQ 1102/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1107/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33470087 t fired, 2214 attempts, .
53 EF STEQ 1107/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1112/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33619861 t fired, 2225 attempts, .
53 EF STEQ 1112/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1117/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33771268 t fired, 2235 attempts, .
53 EF STEQ 1117/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1122/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 33923624 t fired, 2248 attempts, .
53 EF STEQ 1122/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1127/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34075043 t fired, 2256 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1132/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34226517 t fired, 2268 attempts, .
53 EF STEQ 1132/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1137/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34378110 t fired, 2279 attempts, .
53 EF STEQ 1137/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1142/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34529878 t fired, 2292 attempts, .
53 EF STEQ 1142/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1147/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34681709 t fired, 2308 attempts, .
53 EF STEQ 1147/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1153/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34833772 t fired, 2314 attempts, .
53 EF STEQ 1153/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1158/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 34985198 t fired, 2321 attempts, .
53 EF STEQ 1158/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1163/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35136842 t fired, 2331 attempts, .
53 EF STEQ 1163/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1168/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35288610 t fired, 2340 attempts, .
53 EF STEQ 1168/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1173/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35440487 t fired, 2354 attempts, .
53 EF STEQ 1173/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1178/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35592426 t fired, 2366 attempts, .
53 EF STEQ 1178/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1183/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35744555 t fired, 2377 attempts, .
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52 EF FNDP 1188/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 35896429 t fired, 2387 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1193/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36048239 t fired, 2399 attempts, .
53 EF STEQ 1193/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1198/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36199890 t fired, 2407 attempts, .
53 EF STEQ 1198/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1203/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36351869 t fired, 2415 attempts, .
53 EF STEQ 1203/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1208/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36503988 t fired, 2422 attempts, .
53 EF STEQ 1208/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1213/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36655965 t fired, 2435 attempts, .
53 EF STEQ 1213/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1218/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36807135 t fired, 2442 attempts, .
53 EF STEQ 1218/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1223/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 36955200 t fired, 2453 attempts, .
53 EF STEQ 1223/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1228/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37102840 t fired, 2463 attempts, .
53 EF STEQ 1228/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1233/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37251027 t fired, 2474 attempts, .
53 EF STEQ 1233/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1238/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37399431 t fired, 2489 attempts, .
53 EF STEQ 1238/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1243/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37547682 t fired, 2495 attempts, .
53 EF STEQ 1243/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1248/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37695798 t fired, 2506 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1253/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37844116 t fired, 2513 attempts, .
53 EF STEQ 1253/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1258/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 37992606 t fired, 2521 attempts, .
53 EF STEQ 1258/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1263/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38143676 t fired, 2533 attempts, .
53 EF STEQ 1263/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1268/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38295601 t fired, 2547 attempts, .
53 EF STEQ 1268/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1273/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38447559 t fired, 2557 attempts, .
53 EF STEQ 1273/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1278/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38599392 t fired, 2566 attempts, .
53 EF STEQ 1278/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1283/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38751116 t fired, 2586 attempts, .
53 EF STEQ 1283/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1288/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 38902906 t fired, 2597 attempts, .
53 EF STEQ 1288/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1293/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39055035 t fired, 2610 attempts, .
53 EF STEQ 1293/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1298/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39206893 t fired, 2621 attempts, .
53 EF STEQ 1298/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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52 EF FNDP 1303/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39358483 t fired, 2636 attempts, .
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52 EF FNDP 1308/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39509970 t fired, 2650 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1313/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39661594 t fired, 2652 attempts, .
53 EF STEQ 1313/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1318/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39813279 t fired, 2660 attempts, .
53 EF STEQ 1318/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1323/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 39964747 t fired, 2665 attempts, .
53 EF STEQ 1323/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1328/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40115902 t fired, 2677 attempts, .
53 EF STEQ 1328/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1333/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40267261 t fired, 2691 attempts, .
53 EF STEQ 1333/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1338/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40418448 t fired, 2704 attempts, .
53 EF STEQ 1338/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1343/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40569723 t fired, 2717 attempts, .
53 EF STEQ 1343/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1348/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40721120 t fired, 2724 attempts, .
53 EF STEQ 1348/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1353/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 40872429 t fired, 2737 attempts, .
53 EF STEQ 1353/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1358/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41023691 t fired, 2743 attempts, .
53 EF STEQ 1358/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1363/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41173632 t fired, 2754 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1368/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41323152 t fired, 2762 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1373/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41472510 t fired, 2774 attempts, .
53 EF STEQ 1373/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1378/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41622605 t fired, 2794 attempts, .
53 EF STEQ 1378/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1383/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41773580 t fired, 2809 attempts, .
53 EF STEQ 1383/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1388/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 41924089 t fired, 2817 attempts, .
53 EF STEQ 1388/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1393/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42074292 t fired, 2827 attempts, .
53 EF STEQ 1393/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1398/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42224317 t fired, 2838 attempts, .
53 EF STEQ 1398/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1403/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42374667 t fired, 2847 attempts, .
53 EF STEQ 1403/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1408/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42524909 t fired, 2856 attempts, .
53 EF STEQ 1408/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1413/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42674670 t fired, 2868 attempts, .
53 EF STEQ 1413/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1418/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42825369 t fired, 2879 attempts, .
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52 EF FNDP 1423/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 42976488 t fired, 2892 attempts, .
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52 EF FNDP 1428/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43127367 t fired, 2904 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1433/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43278274 t fired, 2917 attempts, .
53 EF STEQ 1433/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1438/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43429197 t fired, 2923 attempts, .
53 EF STEQ 1438/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1443/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43579537 t fired, 2934 attempts, .
53 EF STEQ 1443/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1448/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43730542 t fired, 2945 attempts, .
53 EF STEQ 1448/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1453/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 43881259 t fired, 2953 attempts, .
53 EF STEQ 1453/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1458/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44032464 t fired, 2966 attempts, .
53 EF STEQ 1458/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1463/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44183470 t fired, 2982 attempts, .
53 EF STEQ 1463/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1468/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44334366 t fired, 2989 attempts, .
53 EF STEQ 1468/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1473/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44485020 t fired, 2999 attempts, .
53 EF STEQ 1473/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1478/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44635054 t fired, 3012 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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52 EF FNDP 1483/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44785133 t fired, 3024 attempts, .
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52 EF FNDP 1488/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 44936175 t fired, 3029 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1493/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45087178 t fired, 3038 attempts, .
53 EF STEQ 1493/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1498/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45238459 t fired, 3047 attempts, .
53 EF STEQ 1498/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1503/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45389758 t fired, 3056 attempts, .
53 EF STEQ 1503/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1508/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45540960 t fired, 3066 attempts, .
53 EF STEQ 1508/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1513/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45692494 t fired, 3077 attempts, .
53 EF STEQ 1513/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1518/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45843967 t fired, 3090 attempts, .
53 EF STEQ 1518/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1523/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 45995182 t fired, 3105 attempts, .
53 EF STEQ 1523/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1528/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46146421 t fired, 3117 attempts, .
53 EF STEQ 1528/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1533/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46297512 t fired, 3130 attempts, .
53 EF STEQ 1533/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1538/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46448550 t fired, 3138 attempts, .
53 EF STEQ 1538/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1543/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46599818 t fired, 3147 attempts, .
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52 EF FNDP 1548/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46751055 t fired, 3151 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1553/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 46902272 t fired, 3161 attempts, .
53 EF STEQ 1553/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1558/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47054064 t fired, 3171 attempts, .
53 EF STEQ 1558/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1563/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47205470 t fired, 3184 attempts, .
53 EF STEQ 1563/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1568/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47356469 t fired, 3196 attempts, .
53 EF STEQ 1568/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1573/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47508138 t fired, 3209 attempts, .
53 EF STEQ 1573/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1578/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47659719 t fired, 3219 attempts, .
53 EF STEQ 1578/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1583/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47811574 t fired, 3225 attempts, .
53 EF STEQ 1583/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1588/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 47963566 t fired, 3235 attempts, .
53 EF STEQ 1588/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1593/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48115469 t fired, 3243 attempts, .
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52 EF FNDP 1598/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48267126 t fired, 3260 attempts, .
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52 EF FNDP 1603/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48418518 t fired, 3267 attempts, .
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52 EF FNDP 1608/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48569638 t fired, 3277 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1613/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48720488 t fired, 3290 attempts, .
53 EF STEQ 1613/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1618/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 48871839 t fired, 3306 attempts, .
53 EF STEQ 1618/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1623/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49023185 t fired, 3312 attempts, .
53 EF STEQ 1623/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1628/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49174411 t fired, 3320 attempts, .
53 EF STEQ 1628/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1633/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49325766 t fired, 3337 attempts, .
53 EF STEQ 1633/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1638/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49476455 t fired, 3348 attempts, .
53 EF STEQ 1638/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1643/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49627294 t fired, 3364 attempts, .
53 EF STEQ 1643/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1648/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49778113 t fired, 3375 attempts, .
53 EF STEQ 1648/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1653/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 49928925 t fired, 3390 attempts, .
53 EF STEQ 1653/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1658/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50079811 t fired, 3399 attempts, .
53 EF STEQ 1658/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1663/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50230339 t fired, 3412 attempts, .
53 EF STEQ 1663/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1668/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50381213 t fired, 3429 attempts, .
53 EF STEQ 1668/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1673/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50532221 t fired, 3438 attempts, .
53 EF STEQ 1673/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1678/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50683188 t fired, 3450 attempts, .
53 EF STEQ 1678/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1683/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50834074 t fired, 3459 attempts, .
53 EF STEQ 1683/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1688/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 50985521 t fired, 3471 attempts, .
53 EF STEQ 1688/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1693/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51136883 t fired, 3482 attempts, .
53 EF STEQ 1693/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1698/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51288225 t fired, 3488 attempts, .
53 EF STEQ 1698/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1703/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51439858 t fired, 3504 attempts, .
53 EF STEQ 1703/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1708/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51591165 t fired, 3512 attempts, .
53 EF STEQ 1708/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1713/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51742939 t fired, 3522 attempts, .
53 EF STEQ 1713/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1718/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 51894257 t fired, 3534 attempts, .
53 EF STEQ 1718/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1723/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52045917 t fired, 3546 attempts, .
53 EF STEQ 1723/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1728/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52197401 t fired, 3550 attempts, .
53 EF STEQ 1728/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1733/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52348987 t fired, 3562 attempts, .
53 EF STEQ 1733/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1738/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52500525 t fired, 3572 attempts, .
53 EF STEQ 1738/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1743/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52652304 t fired, 3589 attempts, .
53 EF STEQ 1743/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1748/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52804181 t fired, 3600 attempts, .
53 EF STEQ 1748/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1753/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 52955785 t fired, 3614 attempts, .
53 EF STEQ 1753/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1758/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53107080 t fired, 3619 attempts, .
53 EF STEQ 1758/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1763/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53258649 t fired, 3628 attempts, .
53 EF STEQ 1763/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J04T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1768/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53410373 t fired, 3639 attempts, .
53 EF STEQ 1768/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1773/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53561920 t fired, 3654 attempts, .
53 EF STEQ 1773/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1778/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53713460 t fired, 3661 attempts, .
53 EF STEQ 1778/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1783/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 53864863 t fired, 3674 attempts, .
53 EF STEQ 1783/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1788/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54016579 t fired, 3686 attempts, .
53 EF STEQ 1788/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1793/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54168549 t fired, 3694 attempts, .
53 EF STEQ 1793/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1798/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54320725 t fired, 3710 attempts, .
53 EF STEQ 1798/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1803/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54472700 t fired, 3723 attempts, .
53 EF STEQ 1803/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1808/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54624533 t fired, 3731 attempts, .
53 EF STEQ 1808/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1813/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54776636 t fired, 3742 attempts, .
53 EF STEQ 1813/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1818/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 54928514 t fired, 3752 attempts, .
53 EF STEQ 1818/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1823/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55080317 t fired, 3773 attempts, .
53 EF STEQ 1823/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1828/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55232114 t fired, 3781 attempts, .
53 EF STEQ 1828/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1833/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55383544 t fired, 3787 attempts, .
53 EF STEQ 1833/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1838/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55535116 t fired, 3803 attempts, .
53 EF STEQ 1838/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1843/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55686840 t fired, 3812 attempts, .
53 EF STEQ 1843/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1848/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55838260 t fired, 3826 attempts, .
53 EF STEQ 1848/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1853/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 55989900 t fired, 3835 attempts, .
53 EF STEQ 1853/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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52 EF FNDP 1858/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56141596 t fired, 3847 attempts, .
53 EF STEQ 1858/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1863/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56293427 t fired, 3854 attempts, .
53 EF STEQ 1863/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1868/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56445256 t fired, 3867 attempts, .
53 EF STEQ 1868/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1873/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56596990 t fired, 3883 attempts, .
53 EF STEQ 1873/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1878/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56748566 t fired, 3898 attempts, .
53 EF STEQ 1878/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1883/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 56900485 t fired, 3911 attempts, .
53 EF STEQ 1883/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1888/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57052203 t fired, 3924 attempts, .
53 EF STEQ 1888/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1893/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57204083 t fired, 3933 attempts, .
53 EF STEQ 1893/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1898/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57355857 t fired, 3943 attempts, .
53 EF STEQ 1898/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1903/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57508051 t fired, 3951 attempts, .
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52 EF FNDP 1908/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57659696 t fired, 3965 attempts, .
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52 EF FNDP 1913/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57811596 t fired, 3977 attempts, .
53 EF STEQ 1913/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1918/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 57963371 t fired, 3990 attempts, .
53 EF STEQ 1918/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1923/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58115180 t fired, 4005 attempts, .
53 EF STEQ 1923/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1928/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58267098 t fired, 4013 attempts, .
53 EF STEQ 1928/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1933/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58419002 t fired, 4023 attempts, .
53 EF STEQ 1933/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1938/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58570633 t fired, 4034 attempts, .
53 EF STEQ 1938/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1943/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58722417 t fired, 4049 attempts, .
53 EF STEQ 1943/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1948/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 58874536 t fired, 4055 attempts, .
53 EF STEQ 1948/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1953/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59026344 t fired, 4065 attempts, .
53 EF STEQ 1953/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1958/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59178054 t fired, 4073 attempts, .
53 EF STEQ 1958/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1963/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59329774 t fired, 4088 attempts, .
53 EF STEQ 1963/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1968/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59481807 t fired, 4104 attempts, .
53 EF STEQ 1968/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 1973/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59633607 t fired, 4113 attempts, .
53 EF STEQ 1973/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1978/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59785295 t fired, 4129 attempts, .
53 EF STEQ 1978/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1983/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 59936785 t fired, 4138 attempts, .
53 EF STEQ 1983/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1988/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60088647 t fired, 4148 attempts, .
53 EF STEQ 1988/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1993/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60240290 t fired, 4162 attempts, .
53 EF STEQ 1993/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 1998/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60391968 t fired, 4172 attempts, .
53 EF STEQ 1998/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2003/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60543825 t fired, 4178 attempts, .
53 EF STEQ 2003/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2008/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60695765 t fired, 4187 attempts, .
53 EF STEQ 2008/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 2013/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60847251 t fired, 4201 attempts, .
53 EF STEQ 2013/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 2018/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 60998834 t fired, 4216 attempts, .
53 EF STEQ 2018/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 2023/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61150002 t fired, 4222 attempts, .
53 EF STEQ 2023/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 2028/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61301481 t fired, 4231 attempts, .
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52 EF FNDP 2033/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61453005 t fired, 4239 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2038/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61604522 t fired, 4255 attempts, .
53 EF STEQ 2038/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2043/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61756104 t fired, 4267 attempts, .
53 EF STEQ 2043/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2048/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 61905201 t fired, 4284 attempts, .
53 EF STEQ 2048/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2053/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62057139 t fired, 4306 attempts, .
53 EF STEQ 2053/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2058/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62209065 t fired, 4317 attempts, .
53 EF STEQ 2058/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2063/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62360835 t fired, 4330 attempts, .
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52 EF FNDP 2068/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62512226 t fired, 4339 attempts, .
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52 EF FNDP 2073/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62659540 t fired, 4351 attempts, .
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52 EF FNDP 2078/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62806853 t fired, 4357 attempts, .
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52 EF FNDP 2083/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 62954833 t fired, 4369 attempts, .
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52 EF FNDP 2088/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63103931 t fired, 4376 attempts, .
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52 EF FNDP 2093/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63251720 t fired, 4387 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2098/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63399189 t fired, 4398 attempts, .
53 EF STEQ 2098/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2103/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63546684 t fired, 4411 attempts, .
53 EF STEQ 2103/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2108/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63694331 t fired, 4416 attempts, .
53 EF STEQ 2108/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2113/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63841969 t fired, 4431 attempts, .
53 EF STEQ 2113/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2118/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 63989231 t fired, 4443 attempts, .
53 EF STEQ 2118/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2123/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64136322 t fired, 4454 attempts, .
53 EF STEQ 2123/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2128/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64284417 t fired, 4462 attempts, .
53 EF STEQ 2128/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2133/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64435466 t fired, 4479 attempts, .
53 EF STEQ 2133/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2138/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64582798 t fired, 4489 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2143/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64732497 t fired, 4501 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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52 EF FNDP 2148/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 64883927 t fired, 4511 attempts, .
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52 EF FNDP 2153/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65034790 t fired, 4523 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2158/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65186288 t fired, 4532 attempts, .
53 EF STEQ 2158/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2163/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65338265 t fired, 4539 attempts, .
53 EF STEQ 2163/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2168/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65490186 t fired, 4547 attempts, .
53 EF STEQ 2168/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2173/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65636326 t fired, 4562 attempts, .
53 EF STEQ 2173/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2178/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65781252 t fired, 4571 attempts, .
53 EF STEQ 2178/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2183/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 65927380 t fired, 4586 attempts, .
53 EF STEQ 2183/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2188/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66073697 t fired, 4591 attempts, .
53 EF STEQ 2188/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2193/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66218590 t fired, 4596 attempts, .
53 EF STEQ 2193/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2198/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66365774 t fired, 4608 attempts, .
53 EF STEQ 2198/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2203/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66513918 t fired, 4618 attempts, .
53 EF STEQ 2203/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2208/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66664879 t fired, 4627 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2213/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66815417 t fired, 4641 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2218/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 66966242 t fired, 4652 attempts, .
53 EF STEQ 2218/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2223/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67117357 t fired, 4666 attempts, .
53 EF STEQ 2223/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2228/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67267970 t fired, 4679 attempts, .
53 EF STEQ 2228/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2233/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67418445 t fired, 4691 attempts, .
53 EF STEQ 2233/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2238/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67569287 t fired, 4699 attempts, .
53 EF STEQ 2238/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2243/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67719894 t fired, 4710 attempts, .
53 EF STEQ 2243/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2248/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 67871396 t fired, 4724 attempts, .
53 EF STEQ 2248/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2253/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68022933 t fired, 4730 attempts, .
53 EF STEQ 2253/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2258/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68174778 t fired, 4743 attempts, .
53 EF STEQ 2258/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2263/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68326191 t fired, 4755 attempts, .
53 EF STEQ 2263/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2268/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68477900 t fired, 4768 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2273/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68629288 t fired, 4786 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2278/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68780170 t fired, 4797 attempts, .
53 EF STEQ 2278/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2283/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 68931335 t fired, 4802 attempts, .
53 EF STEQ 2283/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2288/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69082231 t fired, 4807 attempts, .
53 EF STEQ 2288/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2293/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69232998 t fired, 4820 attempts, .
53 EF STEQ 2293/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2298/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69383717 t fired, 4832 attempts, .
53 EF STEQ 2298/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2303/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69534490 t fired, 4840 attempts, .
53 EF STEQ 2303/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2308/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69685102 t fired, 4852 attempts, .
53 EF STEQ 2308/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2313/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69835997 t fired, 4858 attempts, .
53 EF STEQ 2313/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2318/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 69986664 t fired, 4867 attempts, .
53 EF STEQ 2318/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2323/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70136918 t fired, 4880 attempts, .
53 EF STEQ 2323/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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52 EF FNDP 2328/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70287506 t fired, 4888 attempts, .
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52 EF FNDP 2333/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70438175 t fired, 4895 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2338/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70589413 t fired, 4905 attempts, .
53 EF STEQ 2338/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2343/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70740826 t fired, 4913 attempts, .
53 EF STEQ 2343/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2348/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 70892109 t fired, 4924 attempts, .
53 EF STEQ 2348/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2353/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71043657 t fired, 4939 attempts, .
53 EF STEQ 2353/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2358/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71195245 t fired, 4945 attempts, .
53 EF STEQ 2358/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2363/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71346631 t fired, 4954 attempts, .
53 EF STEQ 2363/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2368/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71498114 t fired, 4968 attempts, .
53 EF STEQ 2368/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2373/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71649636 t fired, 4977 attempts, .
53 EF STEQ 2373/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2378/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71801266 t fired, 4990 attempts, .
53 EF STEQ 2378/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2383/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 71952910 t fired, 4999 attempts, .
53 EF STEQ 2383/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2388/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72104737 t fired, 5016 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2393/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72256423 t fired, 5026 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2398/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72408112 t fired, 5038 attempts, .
53 EF STEQ 2398/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2403/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72559691 t fired, 5048 attempts, .
53 EF STEQ 2403/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2408/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72710698 t fired, 5058 attempts, .
53 EF STEQ 2408/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2413/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 72861889 t fired, 5068 attempts, .
53 EF STEQ 2413/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2418/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73012835 t fired, 5076 attempts, .
53 EF STEQ 2418/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2423/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73163990 t fired, 5087 attempts, .
53 EF STEQ 2423/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2428/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73315384 t fired, 5092 attempts, .
53 EF STEQ 2428/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2433/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73466495 t fired, 5103 attempts, .
53 EF STEQ 2433/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2438/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73617681 t fired, 5118 attempts, .
53 EF STEQ 2438/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2443/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73768782 t fired, 5124 attempts, .
53 EF STEQ 2443/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2448/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 73919772 t fired, 5127 attempts, .
53 EF STEQ 2448/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2453/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74070951 t fired, 5137 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2458/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74222137 t fired, 5151 attempts, .
53 EF STEQ 2458/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2463/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74373229 t fired, 5158 attempts, .
53 EF STEQ 2463/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2468/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74524487 t fired, 5172 attempts, .
53 EF STEQ 2468/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2473/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74675654 t fired, 5183 attempts, .
53 EF STEQ 2473/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2478/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74826781 t fired, 5194 attempts, .
53 EF STEQ 2478/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2483/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 74977502 t fired, 5207 attempts, .
53 EF STEQ 2483/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2488/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75127890 t fired, 5224 attempts, .
53 EF STEQ 2488/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2493/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75278598 t fired, 5233 attempts, .
53 EF STEQ 2493/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2498/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75429657 t fired, 5248 attempts, .
53 EF STEQ 2498/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2503/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75580719 t fired, 5262 attempts, .
53 EF STEQ 2503/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2508/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75731982 t fired, 5274 attempts, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2513/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 75882987 t fired, 5291 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2518/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76033440 t fired, 5302 attempts, .
53 EF STEQ 2518/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2523/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76184648 t fired, 5316 attempts, .
53 EF STEQ 2523/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2528/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76335734 t fired, 5325 attempts, .
53 EF STEQ 2528/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2533/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76486683 t fired, 5338 attempts, .
53 EF STEQ 2533/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2538/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76637121 t fired, 5358 attempts, .
53 EF STEQ 2538/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2543/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76787724 t fired, 5374 attempts, .
53 EF STEQ 2543/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2548/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 76938275 t fired, 5381 attempts, .
53 EF STEQ 2548/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2553/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77089402 t fired, 5396 attempts, .
53 EF STEQ 2553/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
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PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2558/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77240413 t fired, 5402 attempts, .
53 EF STEQ 2558/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2563/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77391341 t fired, 5414 attempts, .
53 EF STEQ 2563/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2568/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77542382 t fired, 5420 attempts, .
53 EF STEQ 2568/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2573/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77693391 t fired, 5429 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2578/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77844488 t fired, 5449 attempts, .
53 EF STEQ 2578/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2583/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 77995224 t fired, 5465 attempts, .
53 EF STEQ 2583/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2588/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78146370 t fired, 5474 attempts, .
53 EF STEQ 2588/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2593/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78297203 t fired, 5482 attempts, .
53 EF STEQ 2593/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2598/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78447963 t fired, 5489 attempts, .
53 EF STEQ 2598/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2603/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78598926 t fired, 5500 attempts, .
53 EF STEQ 2603/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2608/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78748094 t fired, 5512 attempts, .
53 EF STEQ 2608/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2613/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 78898873 t fired, 5521 attempts, .
53 EF STEQ 2613/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2618/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79049394 t fired, 5534 attempts, .
53 EF STEQ 2618/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2623/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79200254 t fired, 5546 attempts, .
53 EF STEQ 2623/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2628/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79351173 t fired, 5565 attempts, .
53 EF STEQ 2628/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2633/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79502203 t fired, 5574 attempts, .
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2638/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79652990 t fired, 5584 attempts, .
53 EF STEQ 2638/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-00: DISJ false DISJ
PolyORBLF-PT-S04J04T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
PolyORBLF-PT-S04J04T08-CTLFireability-13: CTL false CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-05: EG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2643/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79803659 t fired, 5600 attempts, .
53 EF STEQ 2643/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-06: AXAG false state space /EXEF
PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-15: EF true findpath
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2648/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 79954634 t fired, 5608 attempts, .
53 EF STEQ 2648/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 sara is running.
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PolyORBLF-PT-S04J04T08-CTLFireability-07: F false state space / EG
PolyORBLF-PT-S04J04T08-CTLFireability-09: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-PT-S04J04T08-CTLFireability-12: INITIAL true preprocessing
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PolyORBLF-PT-S04J04T08-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J04T08-CTLFireability-14: EF 0 0 2 0 2 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 EF FNDP 2653/3373 0/5 PolyORBLF-PT-S04J04T08-CTLFireability-14 80105750 t fired, 5621 attempts, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-PT-S04J04T08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is PolyORBLF-PT-S04J04T08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r294-tall-167873946800546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-PT-S04J04T08.tgz
mv PolyORBLF-PT-S04J04T08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;