About the Execution of LoLA for PhaseVariation-PT-D05CS100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6814.600 | 1501334.00 | 1537254.00 | 4421.80 | F???FT??F?F?FTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r294-tall-167873946100026.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is PhaseVariation-PT-D05CS100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r294-tall-167873946100026
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 8.4K Feb 26 15:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 15:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 15:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 26 15:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 15:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Feb 26 15:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 26 15:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 26 15:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 633K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-00
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-01
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-02
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-03
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-04
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-05
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-06
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-07
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-08
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-09
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-10
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-11
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-12
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-13
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-14
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678779221565
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PhaseVariation-PT-D05CS100
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT PhaseVariation-PT-D05CS100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PhaseVariation-PT-D05CS100-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678780722899
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 PhaseVariation-PT-D05CS100-CTLFireability-01
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type FNDP) for 28 PhaseVariation-PT-D05CS100-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 28 PhaseVariation-PT-D05CS100-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 28 PhaseVariation-PT-D05CS100-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type FNDP) for PhaseVariation-PT-D05CS100-CTLFireability-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for PhaseVariation-PT-D05CS100-CTLFireability-08 (obsolete)
lola: CANCELED task # 66 (type SRCH) for PhaseVariation-PT-D05CS100-CTLFireability-08 (obsolete)
lola: LAUNCH task # 67 (type FNDP) for 50 PhaseVariation-PT-D05CS100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type EQUN) for 50 PhaseVariation-PT-D05CS100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SRCH) for 50 PhaseVariation-PT-D05CS100-CTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SRCH) for PhaseVariation-PT-D05CS100-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type FNDP) for PhaseVariation-PT-D05CS100-CTLFireability-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 68 (type EQUN) for PhaseVariation-PT-D05CS100-CTLFireability-14 (obsolete)
lola: CANCELED task # 70 (type SRCH) for PhaseVariation-PT-D05CS100-CTLFireability-14 (obsolete)
lola: FINISHED task # 70 (type SRCH) for PhaseVariation-PT-D05CS100-CTLFireability-14
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/CTLFireability-63.sara.
sara: try reading problem file /home/mcc/execution/CTLFireability-68.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 68 (type EQUN) for PhaseVariation-PT-D05CS100-CTLFireability-14
lola: result : true
lola: FINISHED task # 63 (type EQUN) for PhaseVariation-PT-D05CS100-CTLFireability-08
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ 0 1 0 0 5 0 0 1
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36 CTL EXCL 15/268 4/32 PhaseVariation-PT-D05CS100-CTLFireability-09 844603 m, 45915 m/sec, 18033358 t fired, .
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36 CTL EXCL 20/268 5/32 PhaseVariation-PT-D05CS100-CTLFireability-09 1143794 m, 59838 m/sec, 23883496 t fired, .
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36 CTL EXCL 25/268 6/32 PhaseVariation-PT-D05CS100-CTLFireability-09 1366493 m, 44539 m/sec, 29900676 t fired, .
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36 CTL EXCL 30/268 7/32 PhaseVariation-PT-D05CS100-CTLFireability-09 1594681 m, 45637 m/sec, 35944519 t fired, .
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36 CTL EXCL 35/268 9/32 PhaseVariation-PT-D05CS100-CTLFireability-09 1879334 m, 56930 m/sec, 41869705 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 105/1119 24/32 PhaseVariation-PT-D05CS100-CTLFireability-03 5460533 m, 50692 m/sec, 128246478 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 110/1119 25/32 PhaseVariation-PT-D05CS100-CTLFireability-03 5716143 m, 51122 m/sec, 134321357 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
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PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 115/1119 27/32 PhaseVariation-PT-D05CS100-CTLFireability-03 6012655 m, 59302 m/sec, 140521753 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
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PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
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PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 120/1119 28/32 PhaseVariation-PT-D05CS100-CTLFireability-03 6338285 m, 65126 m/sec, 146671068 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
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PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
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PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 130/1119 31/32 PhaseVariation-PT-D05CS100-CTLFireability-03 6881813 m, 58368 m/sec, 159072159 t fired, .
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PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PhaseVariation-PT-D05CS100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 135/1119 32/32 PhaseVariation-PT-D05CS100-CTLFireability-03 7132788 m, 50195 m/sec, 165258940 t fired, .
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lola: CANCELED task # 10 (type EXCL) for PhaseVariation-PT-D05CS100-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ 0 0 0 0 2 0 2 0
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 48 (type EXCL) for 47 PhaseVariation-PT-D05CS100-CTLFireability-13
lola: time limit : 2099 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for PhaseVariation-PT-D05CS100-CTLFireability-13
lola: result : true
lola: markings : 126
lola: fired transitions : 251
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-01: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-02: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-03: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-06: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-07: DISJ unknown DISJ
PhaseVariation-PT-D05CS100-CTLFireability-08: DISJ false DISJ
PhaseVariation-PT-D05CS100-CTLFireability-09: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-10: AGEF false tscc_search
PhaseVariation-PT-D05CS100-CTLFireability-11: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLFireability-12: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-13: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-14: CONJ false CTL model checker
PhaseVariation-PT-D05CS100-CTLFireability-15: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D05CS100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is PhaseVariation-PT-D05CS100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r294-tall-167873946100026"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D05CS100.tgz
mv PhaseVariation-PT-D05CS100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;