fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r263-smll-167863538500602
Last Updated
May 14, 2023

About the Execution of LoLa+red for Peterson-PT-2

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
302.871 11903.00 24500.00 544.10 FFTFFTFFTTFTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538500602.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Peterson-PT-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538500602
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 876K
-rw-r--r-- 1 mcc users 13K Feb 25 22:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Feb 25 22:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 124K Feb 25 22:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 38K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 24K Feb 25 22:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 152K Feb 25 22:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 33K Feb 25 22:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 185K Feb 25 22:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.8K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 100K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-2-CTLFireability-00
FORMULA_NAME Peterson-PT-2-CTLFireability-01
FORMULA_NAME Peterson-PT-2-CTLFireability-02
FORMULA_NAME Peterson-PT-2-CTLFireability-03
FORMULA_NAME Peterson-PT-2-CTLFireability-04
FORMULA_NAME Peterson-PT-2-CTLFireability-05
FORMULA_NAME Peterson-PT-2-CTLFireability-06
FORMULA_NAME Peterson-PT-2-CTLFireability-07
FORMULA_NAME Peterson-PT-2-CTLFireability-08
FORMULA_NAME Peterson-PT-2-CTLFireability-09
FORMULA_NAME Peterson-PT-2-CTLFireability-10
FORMULA_NAME Peterson-PT-2-CTLFireability-11
FORMULA_NAME Peterson-PT-2-CTLFireability-12
FORMULA_NAME Peterson-PT-2-CTLFireability-13
FORMULA_NAME Peterson-PT-2-CTLFireability-14
FORMULA_NAME Peterson-PT-2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678855977297

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-PT-2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 04:52:59] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 04:52:59] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 04:53:00] [INFO ] Load time of PNML (sax parser for PT used): 70 ms
[2023-03-15 04:53:00] [INFO ] Transformed 102 places.
[2023-03-15 04:53:00] [INFO ] Transformed 126 transitions.
[2023-03-15 04:53:00] [INFO ] Found NUPN structural information;
[2023-03-15 04:53:00] [INFO ] Parsed PT model containing 102 places and 126 transitions and 384 arcs in 167 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Support contains 102 out of 102 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 21 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
[2023-03-15 04:53:00] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
// Phase 1: matrix 120 rows 102 cols
[2023-03-15 04:53:00] [INFO ] Computed 11 place invariants in 15 ms
[2023-03-15 04:53:00] [INFO ] Implicit Places using invariants in 267 ms returned []
[2023-03-15 04:53:00] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-15 04:53:00] [INFO ] Invariant cache hit.
[2023-03-15 04:53:00] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-15 04:53:00] [INFO ] Implicit Places using invariants and state equation in 155 ms returned []
Implicit Place search using SMT with State Equation took 461 ms to find 0 implicit places.
[2023-03-15 04:53:00] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-15 04:53:00] [INFO ] Invariant cache hit.
[2023-03-15 04:53:00] [INFO ] Dead Transitions using invariants and state equation in 169 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 654 ms. Remains : 102/102 places, 126/126 transitions.
Support contains 102 out of 102 places after structural reductions.
[2023-03-15 04:53:01] [INFO ] Flatten gal took : 46 ms
[2023-03-15 04:53:01] [INFO ] Flatten gal took : 26 ms
[2023-03-15 04:53:01] [INFO ] Input system was already deterministic with 126 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 686 ms. (steps per millisecond=14 ) properties (out of 89) seen :76
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 109 ms. (steps per millisecond=91 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 130 ms. (steps per millisecond=76 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 107 ms. (steps per millisecond=93 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 106 ms. (steps per millisecond=94 ) properties (out of 13) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 11) seen :0
Running SMT prover for 11 properties.
[2023-03-15 04:53:03] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-15 04:53:03] [INFO ] Invariant cache hit.
[2023-03-15 04:53:03] [INFO ] [Real]Absence check using 8 positive place invariants in 3 ms returned sat
[2023-03-15 04:53:03] [INFO ] [Real]Absence check using 8 positive and 3 generalized place invariants in 1 ms returned sat
[2023-03-15 04:53:03] [INFO ] After 258ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:10
[2023-03-15 04:53:03] [INFO ] [Nat]Absence check using 8 positive place invariants in 4 ms returned sat
[2023-03-15 04:53:03] [INFO ] [Nat]Absence check using 8 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-15 04:53:04] [INFO ] After 161ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :9
[2023-03-15 04:53:04] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-15 04:53:04] [INFO ] After 103ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :2 sat :9
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 29 places in 52 ms of which 8 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 74 ms
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 12 places in 74 ms of which 2 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 8 places in 61 ms of which 1 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 8 places in 64 ms of which 2 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 13 places in 58 ms of which 2 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 302 ms
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 22 places in 37 ms of which 1 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 64 ms
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 25 places in 49 ms of which 0 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Deduced a trap composed of 34 places in 51 ms of which 1 ms to minimize.
[2023-03-15 04:53:04] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 2 trap constraints in 115 ms
[2023-03-15 04:53:04] [INFO ] After 784ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :7
Attempting to minimize the solution found.
Minimization took 80 ms.
[2023-03-15 04:53:05] [INFO ] After 1192ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :7
Fused 11 Parikh solutions to 7 different solutions.
Parikh walk visited 0 properties in 46 ms.
Support contains 33 out of 102 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 30 transitions
Trivial Post-agglo rules discarded 30 transitions
Performed 30 trivial Post agglomeration. Transition count delta: 30
Iterating post reduction 0 with 30 rules applied. Total rules applied 30 place count 102 transition count 96
Reduce places removed 30 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 31 rules applied. Total rules applied 61 place count 72 transition count 95
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 62 place count 71 transition count 95
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 13 Pre rules applied. Total rules applied 62 place count 71 transition count 82
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 3 with 26 rules applied. Total rules applied 88 place count 58 transition count 82
Applied a total of 88 rules in 22 ms. Remains 58 /102 variables (removed 44) and now considering 82/126 (removed 44) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 22 ms. Remains : 58/102 places, 82/126 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 242 ms. (steps per millisecond=41 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 7) seen :0
Finished probabilistic random walk after 6800 steps, run visited all 7 properties in 58 ms. (steps per millisecond=117 )
Probabilistic random walk after 6800 steps, saw 1725 distinct states, run finished after 58 ms. (steps per millisecond=117 ) properties seen :7
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
FORMULA Peterson-PT-2-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 04:53:05] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 04:53:05] [INFO ] Flatten gal took : 13 ms
FORMULA Peterson-PT-2-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 04:53:05] [INFO ] Flatten gal took : 14 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 4 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 15 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 9 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 2 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 8 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 9 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 36 transitions
Trivial Post-agglo rules discarded 36 transitions
Performed 36 trivial Post agglomeration. Transition count delta: 36
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 102 transition count 90
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 72 place count 66 transition count 90
Performed 18 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 18 Pre rules applied. Total rules applied 72 place count 66 transition count 72
Deduced a syphon composed of 18 places in 0 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 2 with 36 rules applied. Total rules applied 108 place count 48 transition count 72
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 120 place count 42 transition count 66
Applied a total of 120 rules in 13 ms. Remains 42 /102 variables (removed 60) and now considering 66/126 (removed 60) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 42/102 places, 66/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 4 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 4 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 1 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 7 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 8 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 7 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 7 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 1 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 4 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 4 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 5 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 27 transitions
Trivial Post-agglo rules discarded 27 transitions
Performed 27 trivial Post agglomeration. Transition count delta: 27
Iterating post reduction 0 with 27 rules applied. Total rules applied 27 place count 102 transition count 99
Reduce places removed 27 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 30 rules applied. Total rules applied 57 place count 75 transition count 96
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 60 place count 72 transition count 96
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 14 Pre rules applied. Total rules applied 60 place count 72 transition count 82
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 3 with 28 rules applied. Total rules applied 88 place count 58 transition count 82
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 94 place count 55 transition count 79
Applied a total of 94 rules in 14 ms. Remains 55 /102 variables (removed 47) and now considering 79/126 (removed 47) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 55/102 places, 79/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 4 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 4 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 79 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 29 transitions
Trivial Post-agglo rules discarded 29 transitions
Performed 29 trivial Post agglomeration. Transition count delta: 29
Iterating post reduction 0 with 29 rules applied. Total rules applied 29 place count 102 transition count 97
Reduce places removed 29 places and 0 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Iterating post reduction 1 with 32 rules applied. Total rules applied 61 place count 73 transition count 94
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 64 place count 70 transition count 94
Performed 17 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 17 Pre rules applied. Total rules applied 64 place count 70 transition count 77
Deduced a syphon composed of 17 places in 0 ms
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 3 with 34 rules applied. Total rules applied 98 place count 53 transition count 77
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 10 rules applied. Total rules applied 108 place count 48 transition count 72
Applied a total of 108 rules in 12 ms. Remains 48 /102 variables (removed 54) and now considering 72/126 (removed 54) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 48/102 places, 72/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 3 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 4 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 4 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 4 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 6 ms
[2023-03-15 04:53:06] [INFO ] Input system was already deterministic with 126 transitions.
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 9 ms
[2023-03-15 04:53:06] [INFO ] Flatten gal took : 10 ms
[2023-03-15 04:53:06] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 11 ms.
[2023-03-15 04:53:06] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 102 places, 126 transitions and 384 arcs took 1 ms.
Total runtime 6916 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Peterson-PT-2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Peterson-PT-2-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-PT-2-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678855989200

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: LAUNCH task # 11 (type EXCL) for 10 Peterson-PT-2-CTLFireability-02
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for Peterson-PT-2-CTLFireability-02
lola: result : true
lola: markings : 82
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Peterson-PT-2-CTLFireability-00
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Peterson-PT-2-CTLFireability-00
lola: result : false
lola: markings : 397
lola: fired transitions : 1412
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 50 (type EXCL) for 43 Peterson-PT-2-CTLFireability-14
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Peterson-PT-2-CTLFireability-14
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 Peterson-PT-2-CTLFireability-12
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 38 (type EXCL) for Peterson-PT-2-CTLFireability-12
lola: result : true
lola: markings : 4480
lola: fired transitions : 14683
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 Peterson-PT-2-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 41 (type EXCL) for Peterson-PT-2-CTLFireability-13
lola: result : false
lola: markings : 20754
lola: fired transitions : 62276
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 Peterson-PT-2-CTLFireability-09
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for Peterson-PT-2-CTLFireability-09
lola: result : true
lola: markings : 4764
lola: fired transitions : 29309
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 Peterson-PT-2-CTLFireability-08
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for Peterson-PT-2-CTLFireability-08
lola: result : true
lola: markings : 5144
lola: fired transitions : 16206
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 Peterson-PT-2-CTLFireability-07
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for Peterson-PT-2-CTLFireability-07
lola: result : false
lola: markings : 497
lola: fired transitions : 1504
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 Peterson-PT-2-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for Peterson-PT-2-CTLFireability-06
lola: result : false
lola: markings : 10359
lola: fired transitions : 34302
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 Peterson-PT-2-CTLFireability-05
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Peterson-PT-2-CTLFireability-05
lola: result : true
lola: markings : 2903
lola: fired transitions : 5070
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 Peterson-PT-2-CTLFireability-04
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for Peterson-PT-2-CTLFireability-04
lola: result : false
lola: markings : 20754
lola: fired transitions : 62264
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 Peterson-PT-2-CTLFireability-01
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for Peterson-PT-2-CTLFireability-01
lola: result : true
lola: markings : 3
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 Peterson-PT-2-CTLFireability-11
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for Peterson-PT-2-CTLFireability-11
lola: result : true
lola: markings : 217
lola: fired transitions : 594
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 Peterson-PT-2-CTLFireability-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for Peterson-PT-2-CTLFireability-01
lola: result : false
lola: markings : 2918
lola: fired transitions : 13683
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 Peterson-PT-2-CTLFireability-10
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for Peterson-PT-2-CTLFireability-10
lola: result : false
lola: markings : 2992
lola: fired transitions : 12270
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-PT-2-CTLFireability-00: CTL false CTL model checker
Peterson-PT-2-CTLFireability-01: CONJ false CTL model checker
Peterson-PT-2-CTLFireability-02: EFAGEF true tscc_search
Peterson-PT-2-CTLFireability-04: CTL false CTL model checker
Peterson-PT-2-CTLFireability-05: CTL true CTL model checker
Peterson-PT-2-CTLFireability-06: CTL false CTL model checker
Peterson-PT-2-CTLFireability-07: CTL false CTL model checker
Peterson-PT-2-CTLFireability-08: CTL true CTL model checker
Peterson-PT-2-CTLFireability-09: CTL true CTL model checker
Peterson-PT-2-CTLFireability-10: CTL false CTL model checker
Peterson-PT-2-CTLFireability-11: CTL true CTL model checker
Peterson-PT-2-CTLFireability-12: CTL true CTL model checker
Peterson-PT-2-CTLFireability-13: CTL false CTL model checker
Peterson-PT-2-CTLFireability-14: CONJ false CTL model checker


Time elapsed: 2 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Peterson-PT-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538500602"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-2.tgz
mv Peterson-PT-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;