fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r263-smll-167863538400566
Last Updated
May 14, 2023

About the Execution of LoLa+red for Peterson-COL-3

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3626.231 38072.00 108245.00 601.90 TTTFFTTFFFTFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538400566.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Peterson-COL-3, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538400566
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 6.1K Feb 25 22:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Feb 25 22:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 25 22:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 22:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 22:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 147K Feb 25 22:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 22:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 25 22:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 43K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-00
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-01
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-02
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-03
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-04
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-05
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-06
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-07
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-08
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-09
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-10
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-11
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-12
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-13
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-14
FORMULA_NAME Peterson-COL-3-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678838490175

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-COL-3
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 00:01:32] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-15 00:01:32] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 00:01:33] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 00:01:33] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 00:01:33] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 864 ms
[2023-03-15 00:01:33] [INFO ] Imported 11 HL places and 14 HL transitions for a total of 256 PT places and 396.0 transition bindings in 26 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 36 ms.
Working with output stream class java.io.PrintStream
[2023-03-15 00:01:33] [INFO ] Built PT skeleton of HLPN with 11 places and 14 transitions 42 arcs in 5 ms.
[2023-03-15 00:01:33] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 2 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-15 00:01:34] [INFO ] Flatten gal took : 20 ms
[2023-03-15 00:01:34] [INFO ] Flatten gal took : 4 ms
FORMULA Peterson-COL-3-ReachabilityCardinality-02 TRUE TECHNIQUES CPN_APPROX
FORMULA Peterson-COL-3-ReachabilityCardinality-03 FALSE TECHNIQUES CPN_APPROX
FORMULA Peterson-COL-3-ReachabilityCardinality-12 TRUE TECHNIQUES CPN_APPROX
FORMULA Peterson-COL-3-ReachabilityCardinality-15 FALSE TECHNIQUES CPN_APPROX
Domain [Process(4), Tour(3), Process(4)] of place BeginLoop breaks symmetries in sort Process
Arc [2:1*[$i, (MOD (ADD $j 1) 3)]] contains successor/predecessor on variables of sort Tour
Symmetric sort wr.t. initial and guards and successors and join/free detected :Bool
Arc [1:1*[$i, 0]] contains constants of sort Bool
Transition Ask : constants on arcs in [[1:1*[$i, 0]]] introduces in Bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2023-03-15 00:01:34] [INFO ] Unfolded HLPN to a Petri net with 256 places and 356 transitions 1112 arcs in 33 ms.
[2023-03-15 00:01:34] [INFO ] Unfolded 16 HLPN properties in 2 ms.
Deduced a syphon composed of 12 places in 3 ms
Reduce places removed 12 places and 24 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1245 ms. (steps per millisecond=8 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 230 ms. (steps per millisecond=43 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 375 ms. (steps per millisecond=26 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 155 ms. (steps per millisecond=64 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 234 ms. (steps per millisecond=42 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 188 ms. (steps per millisecond=53 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 151 ms. (steps per millisecond=66 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 207 ms. (steps per millisecond=48 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 119 ms. (steps per millisecond=84 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 165 ms. (steps per millisecond=60 ) properties (out of 12) seen :0
Interrupted probabilistic random walk after 783085 steps, run timeout after 9001 ms. (steps per millisecond=86 ) properties seen :{}
Probabilistic random walk after 783085 steps, saw 158920 distinct states, run finished after 9005 ms. (steps per millisecond=86 ) properties seen :0
Running SMT prover for 12 properties.
[2023-03-15 00:01:46] [INFO ] Flow matrix only has 308 transitions (discarded 24 similar events)
// Phase 1: matrix 308 rows 244 cols
[2023-03-15 00:01:46] [INFO ] Computed 15 place invariants in 14 ms
[2023-03-15 00:01:47] [INFO ] After 460ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:12
[2023-03-15 00:01:47] [INFO ] [Nat]Absence check using 11 positive place invariants in 10 ms returned sat
[2023-03-15 00:01:47] [INFO ] [Nat]Absence check using 11 positive and 4 generalized place invariants in 4 ms returned sat
[2023-03-15 00:01:47] [INFO ] After 261ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :0
FORMULA Peterson-COL-3-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-11 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-3-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 12 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 15029 ms.
starting LoLA
BK_INPUT Peterson-COL-3
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA Peterson-COL-3-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-3-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678838528247

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SKEL/FNDP) for 30 Peterson-COL-3-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/EQUN) for 30 Peterson-COL-3-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/SRCH) for 30 Peterson-COL-3-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SKEL/SRCH) for 30 Peterson-COL-3-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 64 (type SKEL/SRCH) for Peterson-COL-3-ReachabilityCardinality-10
lola: result : false
lola: markings : 493
lola: fired transitions : 2179
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 55 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 62 (type EQUN) for Peterson-COL-3-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 65 (type SRCH) for Peterson-COL-3-ReachabilityCardinality-10 (obsolete)
lola: TR BINDINGS DONE
lola: Places: 256, Transitions: 356
lola: LAUNCH task # 71 (type SKEL/FNDP) for 36 Peterson-COL-3-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 36 Peterson-COL-3-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type SKEL/SRCH) for 36 Peterson-COL-3-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 36 Peterson-COL-3-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 11293
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type SKEL/SRCH) for Peterson-COL-3-ReachabilityCardinality-12
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 74 (type EQUN) for Peterson-COL-3-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 77 (type SRCH) for Peterson-COL-3-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 52 (type SKEL/FNDP) for 24 Peterson-COL-3-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/FNDP) for 33 Peterson-COL-3-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 33 Peterson-COL-3-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 24 Peterson-COL-3-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 74 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 52 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 87 (type SKEL/FNDP) for 18 Peterson-COL-3-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type SKEL/EQUN) for 18 Peterson-COL-3-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 2005
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans ContinueLoop
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans Ask
lola: FINISHED task # 59 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-11
lola: result : false
lola: CANCELED task # 58 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-11 (obsolete)
lola: @ trans NoIdentity
lola: @ trans EndLoop
lola: @ trans UpdateTurn
lola: @ trans ProgressTurn
lola: @ trans NotAlone
lola: @ trans TurnDiff
lola: @ trans TurnEqual
lola: @ trans Identity
lola: @ trans Alone1
lola: @ trans Loop
lola: @ trans AccessCS
lola: @ trans BecomeIdle
lola: LAUNCH task # 106 (type SKEL/FNDP) for 42 Peterson-COL-3-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 42 Peterson-COL-3-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 58 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 12498
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
lola: FINISHED task # 122 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 106 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 155 (type SKEL/FNDP) for 3 Peterson-COL-3-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/EQUN) for 3 Peterson-COL-3-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 106 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 57909
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0

lola: FINISHED task # 101 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 87 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 91 (type SKEL/FNDP) for 9 Peterson-COL-3-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/FNDP) for 0 Peterson-COL-3-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 51419
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-156.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147

lola: FINISHED task # 156 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 155 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 15 Peterson-COL-3-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 15 Peterson-COL-3-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 155 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 164542
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.

lola: FINISHED task # 57 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 50 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 12 Peterson-COL-3-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 12 Peterson-COL-3-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 116506
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 Peterson-COL-3-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 Peterson-COL-3-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for Peterson-COL-3-ReachabilityCardinality-02
lola: result : true

lola: FINISHED task # 10 (type CNST) for Peterson-COL-3-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 91 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 144 (type SKEL/FNDP) for 27 Peterson-COL-3-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 227828
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: Rule S: 24 transitions removed,12 places removed
lola: planning for Peterson-COL-3-ReachabilityCardinality-10 stopped (result already fixed).
lola: planning for Peterson-COL-3-ReachabilityCardinality-08 stopped (result already fixed).
lola: planning for Peterson-COL-3-ReachabilityCardinality-05 stopped (result already fixed).
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 Peterson-COL-3-ReachabilityCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: planning for Peterson-COL-3-ReachabilityCardinality-11 stopped (result already fixed).
lola: FINISHED task # 46 (type CNST) for Peterson-COL-3-ReachabilityCardinality-15
lola: result : false
lola: planning for Peterson-COL-3-ReachabilityCardinality-01 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for Peterson-COL-3-ReachabilityCardinality-14 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for Peterson-COL-3-ReachabilityCardinality-06 stopped (result already fixed).
lola: FINISHED task # 96 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 79 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 178 (type EXCL) for 21 Peterson-COL-3-ReachabilityCardinality-07
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 162 (type SKEL/FNDP) for 39 Peterson-COL-3-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 79 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 106268
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 178 (type EXCL) for Peterson-COL-3-ReachabilityCardinality-07
lola: result : false
lola: markings : 53229
lola: fired transitions : 139613
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 184 (type EXCL) for 39 Peterson-COL-3-ReachabilityCardinality-13
lola: time limit : 1199 sec
lola: memory limit: 32 pages

lola: FINISHED task # 62 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-10
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-3-ReachabilityCardinality-01: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-02: AG true preprocessing
Peterson-COL-3-ReachabilityCardinality-03: EF false preprocessing
Peterson-COL-3-ReachabilityCardinality-04: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-05: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-06: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-07: EF false tandem / relaxed
Peterson-COL-3-ReachabilityCardinality-08: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-11: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-14: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-3-ReachabilityCardinality-00: AG 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-09: EF 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-13: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 5/396 0/5 Peterson-COL-3-ReachabilityCardinality-00 1141640 t fired, 2 attempts, .
144 EF FNDP 4/397 0/5 Peterson-COL-3-ReachabilityCardinality-09 1539525 t fired, 2 attempts, .
162 EF FNDP 4/397 0/5 Peterson-COL-3-ReachabilityCardinality-13 3761318 t fired, 4 attempts, .
184 EF EXCL 3/1199 1/32 Peterson-COL-3-ReachabilityCardinality-13 154667 m, 30933 m/sec, 373736 t fired, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-3-ReachabilityCardinality-01: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-02: AG true preprocessing
Peterson-COL-3-ReachabilityCardinality-03: EF false preprocessing
Peterson-COL-3-ReachabilityCardinality-04: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-05: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-06: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-07: EF false tandem / relaxed
Peterson-COL-3-ReachabilityCardinality-08: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-11: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-14: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-3-ReachabilityCardinality-00: AG 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-09: EF 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-13: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 10/394 0/5 Peterson-COL-3-ReachabilityCardinality-00 2306360 t fired, 3 attempts, .
144 EF FNDP 9/395 0/5 Peterson-COL-3-ReachabilityCardinality-09 3631433 t fired, 4 attempts, .
162 EF FNDP 9/395 0/5 Peterson-COL-3-ReachabilityCardinality-13 6607609 t fired, 7 attempts, .
184 EF EXCL 8/1199 2/32 Peterson-COL-3-ReachabilityCardinality-13 435528 m, 56172 m/sec, 1068943 t fired, .

Time elapsed: 11 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-3-ReachabilityCardinality-01: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-02: AG true preprocessing
Peterson-COL-3-ReachabilityCardinality-03: EF false preprocessing
Peterson-COL-3-ReachabilityCardinality-04: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-05: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-06: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-07: EF false tandem / relaxed
Peterson-COL-3-ReachabilityCardinality-08: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-11: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-14: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-15: EF false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-3-ReachabilityCardinality-00: AG 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-09: EF 0 9 1 0 0 0 0 0
Peterson-COL-3-ReachabilityCardinality-13: EF 0 8 2 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
105 EF FNDP 15/389 0/5 Peterson-COL-3-ReachabilityCardinality-00 3435101 t fired, 4 attempts, .
144 EF FNDP 14/390 0/5 Peterson-COL-3-ReachabilityCardinality-09 5502595 t fired, 6 attempts, .
162 EF FNDP 14/390 0/5 Peterson-COL-3-ReachabilityCardinality-13 9835036 t fired, 10 attempts, .
184 EF EXCL 13/1199 3/32 Peterson-COL-3-ReachabilityCardinality-13 710018 m, 54898 m/sec, 1745623 t fired, .

Time elapsed: 16 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 184 (type EXCL) for Peterson-COL-3-ReachabilityCardinality-13
lola: result : false
lola: markings : 903598
lola: fired transitions : 2236387
lola: time used : 16.000000
lola: memory pages used : 4
lola: CANCELED task # 162 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 190 (type EXCL) for 27 Peterson-COL-3-ReachabilityCardinality-09
lola: time limit : 1790 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 109 (type SKEL/EQUN) for 0 Peterson-COL-3-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 162 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 11868088
lola: tried executions : 13
lola: time used : 17.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.

lola: FINISHED task # 109 (type SKEL/EQUN) for Peterson-COL-3-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 105 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 145 (type SKEL/EQUN) for 27 Peterson-COL-3-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SKEL/SRCH) for 27 Peterson-COL-3-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 105 (type SKEL/FNDP) for Peterson-COL-3-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 4327724
lola: tried executions : 6
lola: time used : 19.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 148 (type SKEL/SRCH) for Peterson-COL-3-ReachabilityCardinality-09
lola: result : false
lola: markings : 115
lola: fired transitions : 318
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 144 (type FNDP) for Peterson-COL-3-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 145 (type EQUN) for Peterson-COL-3-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 190 (type EXCL) for Peterson-COL-3-ReachabilityCardinality-09 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-3-ReachabilityCardinality-00: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-01: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-02: AG true preprocessing
Peterson-COL-3-ReachabilityCardinality-03: EF false preprocessing
Peterson-COL-3-ReachabilityCardinality-04: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-05: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-06: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-07: EF false tandem / relaxed
Peterson-COL-3-ReachabilityCardinality-08: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-11: EF false skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
Peterson-COL-3-ReachabilityCardinality-13: EF false tandem / relaxed
Peterson-COL-3-ReachabilityCardinality-14: AG true skeleton: state equation
Peterson-COL-3-ReachabilityCardinality-15: EF false preprocessing


Time elapsed: 20 secs. Pages in use: 4

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-3"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Peterson-COL-3, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538400566"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-3.tgz
mv Peterson-COL-3 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;