Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538400554.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Peterson-COL-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538400554
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 5.3K Feb 25 22:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 48K Feb 25 22:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 21:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 21:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.9K Feb 25 22:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 25 22:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Feb 25 22:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 25 22:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-2-CTLFireability-00
FORMULA_NAME Peterson-COL-2-CTLFireability-01
FORMULA_NAME Peterson-COL-2-CTLFireability-02
FORMULA_NAME Peterson-COL-2-CTLFireability-03
FORMULA_NAME Peterson-COL-2-CTLFireability-04
FORMULA_NAME Peterson-COL-2-CTLFireability-05
FORMULA_NAME Peterson-COL-2-CTLFireability-06
FORMULA_NAME Peterson-COL-2-CTLFireability-07
FORMULA_NAME Peterson-COL-2-CTLFireability-08
FORMULA_NAME Peterson-COL-2-CTLFireability-09
FORMULA_NAME Peterson-COL-2-CTLFireability-10
FORMULA_NAME Peterson-COL-2-CTLFireability-11
FORMULA_NAME Peterson-COL-2-CTLFireability-12
FORMULA_NAME Peterson-COL-2-CTLFireability-13
FORMULA_NAME Peterson-COL-2-CTLFireability-14
FORMULA_NAME Peterson-COL-2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678837755144

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-COL-2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 23:49:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 23:49:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 23:49:18] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-14 23:49:18] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-14 23:49:18] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 849 ms
[2023-03-14 23:49:18] [INFO ] Imported 11 HL places and 14 HL transitions for a total of 108 PT places and 159.0 transition bindings in 26 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 18 ms.
[2023-03-14 23:49:18] [INFO ] Built PT skeleton of HLPN with 11 places and 14 transitions 42 arcs in 6 ms.
[2023-03-14 23:49:18] [INFO ] Skeletonized 8 HLPN properties in 1 ms. Removed 8 properties that had guard overlaps.
Computed a total of 2 stabilizing places and 0 stable transitions
Remains 6 properties that can be checked using skeleton over-approximation.
Reduce places removed 2 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 135 steps, including 0 resets, run visited all 9 properties in 22 ms. (steps per millisecond=6 )
[2023-03-14 23:49:19] [INFO ] Flatten gal took : 21 ms
[2023-03-14 23:49:19] [INFO ] Flatten gal took : 3 ms
Domain [Process(3), Tour(2), Process(3)] of place BeginLoop breaks symmetries in sort Process
Symmetric sort wr.t. initial and guards and successors and join/free detected :Bool
Arc [1:1*[$i, 0]] contains constants of sort Bool
Transition Ask : constants on arcs in [[1:1*[$i, 0]]] introduces in Bool(2) partition with 1 elements that refines current partition to 2 subsets.
Arc [2:1*[$i, (MOD (ADD $j 1) 2)]] contains successor/predecessor on variables of sort Tour
[2023-03-14 23:49:19] [INFO ] Unfolded HLPN to a Petri net with 108 places and 138 transitions 432 arcs in 25 ms.
[2023-03-14 23:49:19] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 12 transitions.
Support contains 102 out of 102 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 10 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
[2023-03-14 23:49:19] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
// Phase 1: matrix 120 rows 102 cols
[2023-03-14 23:49:19] [INFO ] Computed 11 place invariants in 15 ms
[2023-03-14 23:49:19] [INFO ] Implicit Places using invariants in 258 ms returned []
[2023-03-14 23:49:19] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-14 23:49:19] [INFO ] Invariant cache hit.
[2023-03-14 23:49:19] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-14 23:49:19] [INFO ] Implicit Places using invariants and state equation in 150 ms returned []
Implicit Place search using SMT with State Equation took 448 ms to find 0 implicit places.
[2023-03-14 23:49:19] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-14 23:49:19] [INFO ] Invariant cache hit.
[2023-03-14 23:49:19] [INFO ] Dead Transitions using invariants and state equation in 184 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 644 ms. Remains : 102/102 places, 126/126 transitions.
Support contains 102 out of 102 places after structural reductions.
[2023-03-14 23:49:19] [INFO ] Flatten gal took : 31 ms
[2023-03-14 23:49:20] [INFO ] Flatten gal took : 35 ms
[2023-03-14 23:49:20] [INFO ] Input system was already deterministic with 126 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 923 ms. (steps per millisecond=10 ) properties (out of 42) seen :34
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 163 ms. (steps per millisecond=61 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 163 ms. (steps per millisecond=61 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 139 ms. (steps per millisecond=71 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 104 ms. (steps per millisecond=96 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 110 ms. (steps per millisecond=90 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-14 23:49:22] [INFO ] Flow matrix only has 120 transitions (discarded 6 similar events)
[2023-03-14 23:49:22] [INFO ] Invariant cache hit.
[2023-03-14 23:49:22] [INFO ] [Real]Absence check using 8 positive place invariants in 5 ms returned sat
[2023-03-14 23:49:22] [INFO ] [Real]Absence check using 8 positive and 3 generalized place invariants in 3 ms returned sat
[2023-03-14 23:49:22] [INFO ] After 225ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:6
[2023-03-14 23:49:22] [INFO ] [Nat]Absence check using 8 positive place invariants in 6 ms returned sat
[2023-03-14 23:49:22] [INFO ] [Nat]Absence check using 8 positive and 3 generalized place invariants in 3 ms returned sat
[2023-03-14 23:49:22] [INFO ] After 167ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :6
[2023-03-14 23:49:22] [INFO ] State equation strengthened by 22 read => feed constraints.
[2023-03-14 23:49:22] [INFO ] After 84ms SMT Verify possible using 22 Read/Feed constraints in natural domain returned unsat :1 sat :6
[2023-03-14 23:49:22] [INFO ] Deduced a trap composed of 22 places in 51 ms of which 6 ms to minimize.
[2023-03-14 23:49:22] [INFO ] Deduced a trap composed of 15 places in 58 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 26 places in 53 ms of which 2 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 13 places in 44 ms of which 2 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 25 places in 40 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Trap strengthening (SAT) tested/added 6/5 trap constraints in 321 ms
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 26 places in 53 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 33 places in 52 ms of which 0 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 12 places in 46 ms of which 0 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 29 places in 39 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 29 places in 35 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Trap strengthening (SAT) tested/added 6/5 trap constraints in 273 ms
[2023-03-14 23:49:23] [INFO ] Deduced a trap composed of 8 places in 46 ms of which 1 ms to minimize.
[2023-03-14 23:49:23] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 69 ms
[2023-03-14 23:49:23] [INFO ] After 856ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :6
Attempting to minimize the solution found.
Minimization took 77 ms.
[2023-03-14 23:49:23] [INFO ] After 1226ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :6
Fused 7 Parikh solutions to 6 different solutions.
Parikh walk visited 0 properties in 43 ms.
Support contains 33 out of 102 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 102 transition count 94
Reduce places removed 32 places and 0 transitions.
Iterating post reduction 1 with 32 rules applied. Total rules applied 64 place count 70 transition count 94
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 64 place count 70 transition count 80
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 92 place count 56 transition count 80
Applied a total of 92 rules in 26 ms. Remains 56 /102 variables (removed 46) and now considering 80/126 (removed 46) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 26 ms. Remains : 56/102 places, 80/126 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 374 ms. (steps per millisecond=26 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 125 ms. (steps per millisecond=80 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 6) seen :0
Finished probabilistic random walk after 4997 steps, run visited all 6 properties in 48 ms. (steps per millisecond=104 )
Probabilistic random walk after 4997 steps, saw 1329 distinct states, run finished after 48 ms. (steps per millisecond=104 ) properties seen :6
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
FORMULA Peterson-COL-2-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 23:49:24] [INFO ] Flatten gal took : 15 ms
[2023-03-14 23:49:24] [INFO ] Flatten gal took : 21 ms
[2023-03-14 23:49:24] [INFO ] Input system was already deterministic with 126 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:24] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:24] [INFO ] Flatten gal took : 12 ms
[2023-03-14 23:49:24] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 2 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 9 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 36 transitions
Trivial Post-agglo rules discarded 36 transitions
Performed 36 trivial Post agglomeration. Transition count delta: 36
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 102 transition count 90
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 72 place count 66 transition count 90
Performed 18 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 18 Pre rules applied. Total rules applied 72 place count 66 transition count 72
Deduced a syphon composed of 18 places in 0 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 2 with 36 rules applied. Total rules applied 108 place count 48 transition count 72
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 120 place count 42 transition count 66
Applied a total of 120 rules in 14 ms. Remains 42 /102 variables (removed 60) and now considering 66/126 (removed 60) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 42/102 places, 66/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 6 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 9 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 66 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 1 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 11 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 5 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 9 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 1 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 9 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 9 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 102 transition count 123
Reduce places removed 3 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 7 rules applied. Total rules applied 10 place count 99 transition count 119
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 14 place count 95 transition count 119
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 14 place count 95 transition count 117
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 18 place count 93 transition count 117
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 22 place count 91 transition count 115
Applied a total of 22 rules in 17 ms. Remains 91 /102 variables (removed 11) and now considering 115/126 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 91/102 places, 115/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 8 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 115 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 35 transitions
Trivial Post-agglo rules discarded 35 transitions
Performed 35 trivial Post agglomeration. Transition count delta: 35
Iterating post reduction 0 with 35 rules applied. Total rules applied 35 place count 102 transition count 91
Reduce places removed 35 places and 0 transitions.
Iterating post reduction 1 with 35 rules applied. Total rules applied 70 place count 67 transition count 91
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 70 place count 67 transition count 75
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 102 place count 51 transition count 75
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 108 place count 48 transition count 72
Applied a total of 108 rules in 13 ms. Remains 48 /102 variables (removed 54) and now considering 72/126 (removed 54) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 48/102 places, 72/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 4 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 5 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 2 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 8 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 102 transition count 102
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 48 place count 78 transition count 102
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 48 place count 78 transition count 87
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 78 place count 63 transition count 87
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 90 place count 57 transition count 81
Applied a total of 90 rules in 13 ms. Remains 57 /102 variables (removed 45) and now considering 81/126 (removed 45) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 57/102 places, 81/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 5 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 5 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 81 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 3 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 102 transition count 102
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 48 place count 78 transition count 102
Performed 18 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 18 Pre rules applied. Total rules applied 48 place count 78 transition count 84
Deduced a syphon composed of 18 places in 1 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 2 with 36 rules applied. Total rules applied 84 place count 60 transition count 84
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 96 place count 54 transition count 78
Applied a total of 96 rules in 10 ms. Remains 54 /102 variables (removed 48) and now considering 78/126 (removed 48) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 54/102 places, 78/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 5 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 5 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 2 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 6 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 102/102 places, 126/126 transitions.
Applied a total of 0 rules in 1 ms. Remains 102 /102 variables (removed 0) and now considering 126/126 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 102/102 places, 126/126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 7 ms
[2023-03-14 23:49:25] [INFO ] Input system was already deterministic with 126 transitions.
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 11 ms
[2023-03-14 23:49:25] [INFO ] Flatten gal took : 10 ms
[2023-03-14 23:49:25] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 12 ms.
[2023-03-14 23:49:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 102 places, 126 transitions and 384 arcs took 1 ms.
Total runtime 7762 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Peterson-COL-2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/370
CTLFireability

FORMULA Peterson-COL-2-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Peterson-COL-2-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678837767680

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/370/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/370/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/370/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 1 (type EXCL) for 0 Peterson-COL-2-CTLFireability-00
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 1 (type EXCL) for Peterson-COL-2-CTLFireability-00
lola: result : false
lola: markings : 348
lola: fired transitions : 1408
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 Peterson-COL-2-CTLFireability-04
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 14 (type EXCL) for Peterson-COL-2-CTLFireability-04
lola: result : false
lola: markings : 20754
lola: fired transitions : 62264
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 Peterson-COL-2-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Peterson-COL-2-CTLFireability-15
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 Peterson-COL-2-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for Peterson-COL-2-CTLFireability-14
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 Peterson-COL-2-CTLFireability-12
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Peterson-COL-2-CTLFireability-12
lola: result : true
lola: markings : 107
lola: fired transitions : 216
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 Peterson-COL-2-CTLFireability-10
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for Peterson-COL-2-CTLFireability-10
lola: result : true
lola: markings : 344
lola: fired transitions : 838
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 Peterson-COL-2-CTLFireability-07
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for Peterson-COL-2-CTLFireability-07
lola: result : false
lola: markings : 492
lola: fired transitions : 1367
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 Peterson-COL-2-CTLFireability-06
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for Peterson-COL-2-CTLFireability-06
lola: result : false
lola: markings : 11223
lola: fired transitions : 36256
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 Peterson-COL-2-CTLFireability-05
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Peterson-COL-2-CTLFireability-05
lola: result : true
lola: markings : 5882
lola: fired transitions : 10814
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 Peterson-COL-2-CTLFireability-01
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for Peterson-COL-2-CTLFireability-01
lola: result : true
lola: markings : 3
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 40 Peterson-COL-2-CTLFireability-13
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for Peterson-COL-2-CTLFireability-13
lola: result : false
lola: markings : 891
lola: fired transitions : 2644
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 28 Peterson-COL-2-CTLFireability-09
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for Peterson-COL-2-CTLFireability-09
lola: result : true
lola: markings : 1470
lola: fired transitions : 4194
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 Peterson-COL-2-CTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for Peterson-COL-2-CTLFireability-02
lola: result : true
lola: markings : 83
lola: fired transitions : 121
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 34 Peterson-COL-2-CTLFireability-11
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for Peterson-COL-2-CTLFireability-11
lola: result : false
lola: markings : 128
lola: fired transitions : 143
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 Peterson-COL-2-CTLFireability-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for Peterson-COL-2-CTLFireability-01
lola: result : false
lola: markings : 2918
lola: fired transitions : 13666
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 Peterson-COL-2-CTLFireability-08
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for Peterson-COL-2-CTLFireability-08
lola: result : false
lola: markings : 283
lola: fired transitions : 501
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-2-CTLFireability-00: CTL false CTL model checker
Peterson-COL-2-CTLFireability-01: CONJ false CTL model checker
Peterson-COL-2-CTLFireability-02: EFAGEF true tscc_search
Peterson-COL-2-CTLFireability-04: CTL false CTL model checker
Peterson-COL-2-CTLFireability-05: CTL true CTL model checker
Peterson-COL-2-CTLFireability-06: CTL false CTL model checker
Peterson-COL-2-CTLFireability-07: CTL false CTL model checker
Peterson-COL-2-CTLFireability-08: CTL false CTL model checker
Peterson-COL-2-CTLFireability-09: EFAG false tscc_search
Peterson-COL-2-CTLFireability-10: CTL true CTL model checker
Peterson-COL-2-CTLFireability-11: SP ACTL false LTL model checker
Peterson-COL-2-CTLFireability-12: CTL true CTL model checker
Peterson-COL-2-CTLFireability-13: SP ECTL true LTL model checker
Peterson-COL-2-CTLFireability-14: CTL false CTL model checker
Peterson-COL-2-CTLFireability-15: CTL false CTL model checker


Time elapsed: 1 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Peterson-COL-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538400554"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-2.tgz
mv Peterson-COL-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;