fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r263-smll-167863538400545
Last Updated
May 14, 2023

About the Execution of LoLa+red for PermAdmissibility-PT-50

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1941.355 3600000.00 682585.00 8674.90 ??TTFFT?TT??FFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538400545.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PermAdmissibility-PT-50, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538400545
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 11K Feb 26 01:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 90K Feb 26 01:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 76K Feb 26 01:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 407K Feb 26 01:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 23K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 22K Feb 26 01:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 190K Feb 26 01:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 36K Feb 26 01:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 166K Feb 26 01:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.7K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 340K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-00
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-01
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-02
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-03
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-04
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-05
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-06
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-07
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-08
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-09
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-10
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-11
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-12
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-13
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-14
FORMULA_NAME PermAdmissibility-PT-50-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678833750806

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-PT-50
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 22:42:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-14 22:42:33] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 22:42:34] [INFO ] Load time of PNML (sax parser for PT used): 164 ms
[2023-03-14 22:42:34] [INFO ] Transformed 168 places.
[2023-03-14 22:42:34] [INFO ] Transformed 592 transitions.
[2023-03-14 22:42:34] [INFO ] Parsed PT model containing 168 places and 592 transitions and 3456 arcs in 291 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 20 ms.
Support contains 168 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Applied a total of 0 rules in 22 ms. Remains 168 /168 variables (removed 0) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 168 cols
[2023-03-14 22:42:34] [INFO ] Computed 32 place invariants in 66 ms
[2023-03-14 22:42:34] [INFO ] Implicit Places using invariants in 401 ms returned []
[2023-03-14 22:42:34] [INFO ] Invariant cache hit.
[2023-03-14 22:42:35] [INFO ] Implicit Places using invariants and state equation in 446 ms returned []
Implicit Place search using SMT with State Equation took 894 ms to find 0 implicit places.
[2023-03-14 22:42:35] [INFO ] Invariant cache hit.
[2023-03-14 22:42:35] [INFO ] Dead Transitions using invariants and state equation in 467 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1404 ms. Remains : 168/168 places, 592/592 transitions.
Support contains 168 out of 168 places after structural reductions.
[2023-03-14 22:42:36] [INFO ] Flatten gal took : 139 ms
[2023-03-14 22:42:36] [INFO ] Flatten gal took : 87 ms
[2023-03-14 22:42:36] [INFO ] Input system was already deterministic with 592 transitions.
Incomplete random walk after 10017 steps, including 12 resets, run finished after 149 ms. (steps per millisecond=67 ) properties (out of 81) seen :63
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-14 22:42:36] [INFO ] Invariant cache hit.
[2023-03-14 22:42:37] [INFO ] [Real]Absence check using 0 positive and 32 generalized place invariants in 29 ms returned sat
[2023-03-14 22:42:37] [INFO ] After 221ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:17
[2023-03-14 22:42:37] [INFO ] [Nat]Absence check using 0 positive and 32 generalized place invariants in 22 ms returned sat
[2023-03-14 22:42:39] [INFO ] After 1484ms SMT Verify possible using state equation in natural domain returned unsat :11 sat :7
[2023-03-14 22:42:40] [INFO ] After 2526ms SMT Verify possible using trap constraints in natural domain returned unsat :11 sat :7
Attempting to minimize the solution found.
Minimization took 1521 ms.
[2023-03-14 22:42:41] [INFO ] After 4362ms SMT Verify possible using all constraints in natural domain returned unsat :11 sat :7
Fused 18 Parikh solutions to 7 different solutions.
Finished Parikh walk after 592 steps, including 0 resets, run visited all 1 properties in 9 ms. (steps per millisecond=65 )
Parikh walk visited 7 properties in 431 ms.
Successfully simplified 11 atomic propositions for a total of 16 simplifications.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 54 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 50 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 592 transitions.
Support contains 145 out of 168 places (down from 151) after GAL structural reductions.
Computed a total of 168 stabilizing places and 592 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 168 transition count 592
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 112 transition count 592
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 76 place count 92 transition count 356
Iterating global reduction 1 with 20 rules applied. Total rules applied 96 place count 92 transition count 356
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 110 place count 78 transition count 230
Iterating global reduction 1 with 14 rules applied. Total rules applied 124 place count 78 transition count 230
Applied a total of 124 rules in 24 ms. Remains 78 /168 variables (removed 90) and now considering 230/592 (removed 362) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 78/168 places, 230/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 16 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 16 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 230 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 112 transition count 592
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 75 place count 93 transition count 372
Iterating global reduction 1 with 19 rules applied. Total rules applied 94 place count 93 transition count 372
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 104 place count 83 transition count 262
Iterating global reduction 1 with 10 rules applied. Total rules applied 114 place count 83 transition count 262
Applied a total of 114 rules in 28 ms. Remains 83 /168 variables (removed 85) and now considering 262/592 (removed 330) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 83/168 places, 262/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 14 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 14 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 262 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 83 place count 85 transition count 372
Iterating global reduction 1 with 19 rules applied. Total rules applied 102 place count 85 transition count 372
Applied a total of 102 rules in 8 ms. Remains 85 /168 variables (removed 83) and now considering 372/592 (removed 220) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 85/168 places, 372/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 23 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 21 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 372 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 40 places and 0 transitions.
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 128 transition count 592
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 47 place count 121 transition count 480
Iterating global reduction 1 with 7 rules applied. Total rules applied 54 place count 121 transition count 480
Applied a total of 54 rules in 10 ms. Remains 121 /168 variables (removed 47) and now considering 480/592 (removed 112) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 121/168 places, 480/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 26 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 27 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 480 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 84 place count 84 transition count 356
Iterating global reduction 1 with 20 rules applied. Total rules applied 104 place count 84 transition count 356
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 118 place count 70 transition count 230
Iterating global reduction 1 with 14 rules applied. Total rules applied 132 place count 70 transition count 230
Applied a total of 132 rules in 10 ms. Remains 70 /168 variables (removed 98) and now considering 230/592 (removed 362) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 70/168 places, 230/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 12 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 12 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 230 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 112 transition count 592
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 76 place count 92 transition count 356
Iterating global reduction 1 with 20 rules applied. Total rules applied 96 place count 92 transition count 356
Discarding 7 places :
Symmetric choice reduction at 1 with 7 rule applications. Total rules 103 place count 85 transition count 244
Iterating global reduction 1 with 7 rules applied. Total rules applied 110 place count 85 transition count 244
Applied a total of 110 rules in 10 ms. Remains 85 /168 variables (removed 83) and now considering 244/592 (removed 348) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 85/168 places, 244/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 12 ms
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 14 ms
[2023-03-14 22:42:42] [INFO ] Input system was already deterministic with 244 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 112 transition count 592
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 62 place count 106 transition count 496
Iterating global reduction 1 with 6 rules applied. Total rules applied 68 place count 106 transition count 496
Applied a total of 68 rules in 8 ms. Remains 106 /168 variables (removed 62) and now considering 496/592 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 106/168 places, 496/592 transitions.
[2023-03-14 22:42:42] [INFO ] Flatten gal took : 22 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 24 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 496 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Graph (complete) has 1615 edges and 168 vertex of which 50 are kept as prefixes of interest. Removing 118 places using SCC suffix rule.6 ms
Discarding 118 places :
Also discarding 384 output transitions
Drop transitions removed 384 transitions
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 15 place count 36 transition count 82
Iterating global reduction 0 with 14 rules applied. Total rules applied 29 place count 36 transition count 82
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 33 place count 32 transition count 52
Iterating global reduction 0 with 4 rules applied. Total rules applied 37 place count 32 transition count 52
Applied a total of 37 rules in 19 ms. Remains 32 /168 variables (removed 136) and now considering 52/592 (removed 540) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 32/168 places, 52/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 2 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 3 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Discarding 25 places :
Symmetric choice reduction at 1 with 25 rule applications. Total rules 89 place count 79 transition count 346
Iterating global reduction 1 with 25 rules applied. Total rules applied 114 place count 79 transition count 346
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 134 place count 59 transition count 134
Iterating global reduction 1 with 20 rules applied. Total rules applied 154 place count 59 transition count 134
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 155 place count 58 transition count 126
Iterating global reduction 1 with 1 rules applied. Total rules applied 156 place count 58 transition count 126
Applied a total of 156 rules in 11 ms. Remains 58 /168 variables (removed 110) and now considering 126/592 (removed 466) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 58/168 places, 126/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Graph (complete) has 1615 edges and 168 vertex of which 107 are kept as prefixes of interest. Removing 61 places using SCC suffix rule.4 ms
Discarding 61 places :
Also discarding 0 output transitions
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 24 place count 84 transition count 356
Iterating global reduction 0 with 23 rules applied. Total rules applied 47 place count 84 transition count 356
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 64 place count 67 transition count 156
Iterating global reduction 0 with 17 rules applied. Total rules applied 81 place count 67 transition count 156
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 83 place count 65 transition count 140
Iterating global reduction 0 with 2 rules applied. Total rules applied 85 place count 65 transition count 140
Applied a total of 85 rules in 29 ms. Remains 65 /168 variables (removed 103) and now considering 140/592 (removed 452) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 65/168 places, 140/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 6 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Discarding 26 places :
Symmetric choice reduction at 1 with 26 rule applications. Total rules 90 place count 78 transition count 344
Iterating global reduction 1 with 26 rules applied. Total rules applied 116 place count 78 transition count 344
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 139 place count 55 transition count 114
Iterating global reduction 1 with 23 rules applied. Total rules applied 162 place count 55 transition count 114
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 165 place count 52 transition count 90
Iterating global reduction 1 with 3 rules applied. Total rules applied 168 place count 52 transition count 90
Applied a total of 168 rules in 10 ms. Remains 52 /168 variables (removed 116) and now considering 90/592 (removed 502) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 52/168 places, 90/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 5 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 4 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 90 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Graph (complete) has 1615 edges and 168 vertex of which 114 are kept as prefixes of interest. Removing 54 places using SCC suffix rule.4 ms
Discarding 54 places :
Also discarding 0 output transitions
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 16 place count 99 transition count 390
Iterating global reduction 0 with 15 rules applied. Total rules applied 31 place count 99 transition count 390
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 38 place count 92 transition count 302
Iterating global reduction 0 with 7 rules applied. Total rules applied 45 place count 92 transition count 302
Applied a total of 45 rules in 33 ms. Remains 92 /168 variables (removed 76) and now considering 302/592 (removed 290) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 92/168 places, 302/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 15 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 15 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 302 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 59 places and 0 transitions.
Iterating post reduction 0 with 59 rules applied. Total rules applied 59 place count 109 transition count 592
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 78 place count 90 transition count 376
Iterating global reduction 1 with 19 rules applied. Total rules applied 97 place count 90 transition count 376
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 106 place count 81 transition count 254
Iterating global reduction 1 with 9 rules applied. Total rules applied 115 place count 81 transition count 254
Applied a total of 115 rules in 10 ms. Remains 81 /168 variables (removed 87) and now considering 254/592 (removed 338) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 81/168 places, 254/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 11 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 13 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 254 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Graph (complete) has 1615 edges and 168 vertex of which 105 are kept as prefixes of interest. Removing 63 places using SCC suffix rule.4 ms
Discarding 63 places :
Also discarding 0 output transitions
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 26 place count 80 transition count 348
Iterating global reduction 0 with 25 rules applied. Total rules applied 51 place count 80 transition count 348
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 70 place count 61 transition count 134
Iterating global reduction 0 with 19 rules applied. Total rules applied 89 place count 61 transition count 134
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 91 place count 59 transition count 118
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 59 transition count 118
Applied a total of 93 rules in 24 ms. Remains 59 /168 variables (removed 109) and now considering 118/592 (removed 474) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 59/168 places, 118/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 6 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 6 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Graph (complete) has 1615 edges and 168 vertex of which 105 are kept as prefixes of interest. Removing 63 places using SCC suffix rule.3 ms
Discarding 63 places :
Also discarding 0 output transitions
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 25 place count 81 transition count 350
Iterating global reduction 0 with 24 rules applied. Total rules applied 49 place count 81 transition count 350
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 69 place count 61 transition count 134
Iterating global reduction 0 with 20 rules applied. Total rules applied 89 place count 61 transition count 134
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 91 place count 59 transition count 118
Iterating global reduction 0 with 2 rules applied. Total rules applied 93 place count 59 transition count 118
Applied a total of 93 rules in 24 ms. Remains 59 /168 variables (removed 109) and now considering 118/592 (removed 474) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 59/168 places, 118/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 62 places and 0 transitions.
Iterating post reduction 0 with 62 rules applied. Total rules applied 62 place count 106 transition count 592
Discarding 23 places :
Symmetric choice reduction at 1 with 23 rule applications. Total rules 85 place count 83 transition count 358
Iterating global reduction 1 with 23 rules applied. Total rules applied 108 place count 83 transition count 358
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 126 place count 65 transition count 152
Iterating global reduction 1 with 18 rules applied. Total rules applied 144 place count 65 transition count 152
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 146 place count 63 transition count 136
Iterating global reduction 1 with 2 rules applied. Total rules applied 148 place count 63 transition count 136
Applied a total of 148 rules in 11 ms. Remains 63 /168 variables (removed 105) and now considering 136/592 (removed 456) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 63/168 places, 136/592 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 7 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 8 ms
[2023-03-14 22:42:43] [INFO ] Input system was already deterministic with 136 transitions.
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 30 ms
[2023-03-14 22:42:43] [INFO ] Flatten gal took : 31 ms
[2023-03-14 22:42:43] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-14 22:42:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 168 places, 592 transitions and 3456 arcs took 5 ms.
Total runtime 9761 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PermAdmissibility-PT-50
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369

FORMULA PermAdmissibility-PT-50-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-50-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 14207736 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16099692 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:203
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SKEL/FNDP) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 67 (type SKEL/SRCH) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SKEL/SRCH) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 68 (type SKEL/SRCH) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : unknown
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-02 (obsolete)
lola: CANCELED task # 66 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-02 (obsolete)
lola: FINISHED task # 65 (type SKEL/FNDP) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 66 (type SKEL/EQUN) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 70 (type SKEL/FNDP) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/EQUN) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/SRCH) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 72 (type SKEL/SRCH) for PermAdmissibility-PT-50-CTLCardinality-03
lola: result : true
lola: markings : 441
lola: fired transitions : 440
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: CANCELED task # 71 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: CANCELED task # 73 (type SRCH) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: RELEASE
lola: RELEASE
lola: LAUNCH task # 75 (type SKEL/SRCH) for 19 PermAdmissibility-PT-50-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type SKEL/SRCH) for PermAdmissibility-PT-50-CTLCardinality-05
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/369/CTLCardinality-71.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 70 (type SKEL/FNDP) for PermAdmissibility-PT-50-CTLCardinality-03
lola: result : true
lola: fired transitions : 439
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.

lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 71 (type SKEL/EQUN) for PermAdmissibility-PT-50-CTLCardinality-03
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 19 PermAdmissibility-PT-50-CTLCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 28 (type CNST) for PermAdmissibility-PT-50-CTLCardinality-05
lola: result : true
lola: LAUNCH task # 76 (type SKEL/SRCH) for 19 PermAdmissibility-PT-50-CTLCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type SKEL/SRCH) for PermAdmissibility-PT-50-CTLCardinality-05
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 79 (type EXCL) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 77 (type FNDP) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SRCH) for 6 PermAdmissibility-PT-50-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type EXCL) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 77 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-02 (obsolete)
lola: CANCELED task # 78 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-02 (obsolete)
lola: CANCELED task # 80 (type SRCH) for PermAdmissibility-PT-50-CTLCardinality-02 (obsolete)
lola: FINISHED task # 77 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : true
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 81 (type EXCL) for 19 PermAdmissibility-PT-50-CTLCardinality-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 82 (type FNDP) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type EQUN) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SRCH) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 81 (type EXCL) for PermAdmissibility-PT-50-CTLCardinality-05
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 84 (type EXCL) for 13 PermAdmissibility-PT-50-CTLCardinality-03
lola: time limit : 189 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/369/CTLCardinality-78.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 78 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-02
lola: result : true
lola: FINISHED task # 82 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-03
lola: result : true
lola: fired transitions : 439
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 83 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: CANCELED task # 84 (type EXCL) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: CANCELED task # 85 (type SRCH) for PermAdmissibility-PT-50-CTLCardinality-03 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 83 (type EQUN) for PermAdmissibility-PT-50-CTLCardinality-03
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 34 (type EXCL) for 33 PermAdmissibility-PT-50-CTLCardinality-07
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 88 (type FNDP) for 57 PermAdmissibility-PT-50-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 57 PermAdmissibility-PT-50-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 91 (type SRCH) for 57 PermAdmissibility-PT-50-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SRCH) for PermAdmissibility-PT-50-CTLCardinality-15
lola: result : true
lola: markings : 524
lola: fired transitions : 906
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for PermAdmissibility-PT-50-CTLCardinality-15 (obsolete)
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lola: result : unknown
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lola: tried executions : 2
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lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/369/CTLCardinality-89.sara.
sara: place or transition ordering is non-deterministic

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lola: result : true
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34 CTL EXCL 10/257 5/32 PermAdmissibility-PT-50-CTLCardinality-07 804466 m, 81825 m/sec, 7076214 t fired, .

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34 CTL EXCL 15/257 6/32 PermAdmissibility-PT-50-CTLCardinality-07 1076171 m, 54341 m/sec, 11324152 t fired, .

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34 CTL EXCL 20/257 7/32 PermAdmissibility-PT-50-CTLCardinality-07 1338630 m, 52491 m/sec, 15526845 t fired, .

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34 CTL EXCL 25/257 9/32 PermAdmissibility-PT-50-CTLCardinality-07 1589854 m, 50244 m/sec, 19727809 t fired, .

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34 CTL EXCL 40/257 12/32 PermAdmissibility-PT-50-CTLCardinality-07 2324934 m, 47797 m/sec, 31907626 t fired, .

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34 CTL EXCL 45/257 13/32 PermAdmissibility-PT-50-CTLCardinality-07 2564386 m, 47890 m/sec, 35891606 t fired, .

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34 CTL EXCL 60/257 16/32 PermAdmissibility-PT-50-CTLCardinality-07 3312833 m, 45088 m/sec, 47961713 t fired, .

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43 CTL EXCL 150/313 32/32 PermAdmissibility-PT-50-CTLCardinality-10 7168677 m, 49516 m/sec, 118999888 t fired, .

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4 CTL EXCL 10/549 9/32 PermAdmissibility-PT-50-CTLCardinality-01 1876261 m, 196785 m/sec, 2330129 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-02: CONJ true CONJ
PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PermAdmissibility-PT-50-CTLCardinality-02: CONJ true CONJ
PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/650 3/32 PermAdmissibility-PT-50-CTLCardinality-00 447832 m, 89566 m/sec, 3554292 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/650 5/32 PermAdmissibility-PT-50-CTLCardinality-00 815488 m, 73531 m/sec, 7204760 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/650 7/32 PermAdmissibility-PT-50-CTLCardinality-00 1070689 m, 51040 m/sec, 11253992 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/650 8/32 PermAdmissibility-PT-50-CTLCardinality-00 1321087 m, 50079 m/sec, 15199648 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-02: CONJ true CONJ
PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/650 9/32 PermAdmissibility-PT-50-CTLCardinality-00 1553716 m, 46525 m/sec, 19136827 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-50-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
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PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
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PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/650 10/32 PermAdmissibility-PT-50-CTLCardinality-00 1791376 m, 47532 m/sec, 23048064 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-02: CONJ true CONJ
PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-50-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/650 11/32 PermAdmissibility-PT-50-CTLCardinality-00 2024706 m, 46666 m/sec, 26911885 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/650 12/32 PermAdmissibility-PT-50-CTLCardinality-00 2255739 m, 46206 m/sec, 30761326 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
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1 CTL EXCL 45/650 13/32 PermAdmissibility-PT-50-CTLCardinality-00 2487157 m, 46283 m/sec, 34589070 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 50/650 14/32 PermAdmissibility-PT-50-CTLCardinality-00 2723578 m, 47284 m/sec, 38405247 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
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1 CTL EXCL 55/650 15/32 PermAdmissibility-PT-50-CTLCardinality-00 2963558 m, 47996 m/sec, 42094873 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
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1 CTL EXCL 60/650 16/32 PermAdmissibility-PT-50-CTLCardinality-00 3202115 m, 47711 m/sec, 46035835 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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1 CTL EXCL 65/650 17/32 PermAdmissibility-PT-50-CTLCardinality-00 3424983 m, 44573 m/sec, 49987176 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
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PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
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PermAdmissibility-PT-50-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 145/650 31/32 PermAdmissibility-PT-50-CTLCardinality-00 6631117 m, 37195 m/sec, 110067903 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
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PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-14: EFAG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 150/650 32/32 PermAdmissibility-PT-50-CTLCardinality-00 6868725 m, 47521 m/sec, 113989373 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-50-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PermAdmissibility-PT-50-CTLCardinality-02: CONJ true CONJ
PermAdmissibility-PT-50-CTLCardinality-03: EF true findpath
PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-50-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-01: CTL 0 0 0 0 1 0 1 0
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PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 5/3099 3/32 PermAdmissibility-PT-50-CTLCardinality-11 340274 m, 68054 m/sec, 3350112 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 10/3099 5/32 PermAdmissibility-PT-50-CTLCardinality-11 663708 m, 64686 m/sec, 6629772 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-50-CTLCardinality-00: CTL 0 0 0 0 1 0 1 0
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PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 15/3099 6/32 PermAdmissibility-PT-50-CTLCardinality-11 986825 m, 64623 m/sec, 9840554 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-07: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 20/3099 7/32 PermAdmissibility-PT-50-CTLCardinality-11 1293265 m, 61288 m/sec, 12980875 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 25/3099 9/32 PermAdmissibility-PT-50-CTLCardinality-11 1602339 m, 61814 m/sec, 16232903 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-04: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 30/3099 10/32 PermAdmissibility-PT-50-CTLCardinality-11 1866600 m, 52852 m/sec, 19511887 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
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PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

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46 CTL EXCL 35/3099 11/32 PermAdmissibility-PT-50-CTLCardinality-11 2121826 m, 51045 m/sec, 22853854 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 40/3099 12/32 PermAdmissibility-PT-50-CTLCardinality-11 2373370 m, 50308 m/sec, 26182357 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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46 CTL EXCL 45/3099 13/32 PermAdmissibility-PT-50-CTLCardinality-11 2637779 m, 52881 m/sec, 29446166 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-05: CONJ false state space /EXEF
PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
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PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-14: EFAG true tscc_search
PermAdmissibility-PT-50-CTLCardinality-15: DISJ false DISJ

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 50/3099 14/32 PermAdmissibility-PT-50-CTLCardinality-11 2874552 m, 47354 m/sec, 32809587 t fired, .

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PermAdmissibility-PT-50-CTLCardinality-06: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-08: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-09: CTL true CTL model checker
PermAdmissibility-PT-50-CTLCardinality-12: CTL false CTL model checker
PermAdmissibility-PT-50-CTLCardinality-13: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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PermAdmissibility-PT-50-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 55/3099 15/32 PermAdmissibility-PT-50-CTLCardinality-11 3136165 m, 52322 m/sec, 36044614 t fired, .

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46 CTL EXCL 60/3099 16/32 PermAdmissibility-PT-50-CTLCardinality-11 3364841 m, 45735 m/sec, 39358557 t fired, .

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46 CTL EXCL 65/3099 17/32 PermAdmissibility-PT-50-CTLCardinality-11 3609046 m, 48841 m/sec, 42581416 t fired, .

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46 CTL EXCL 70/3099 18/32 PermAdmissibility-PT-50-CTLCardinality-11 3846192 m, 47429 m/sec, 45797341 t fired, .

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46 CTL EXCL 75/3099 19/32 PermAdmissibility-PT-50-CTLCardinality-11 4088179 m, 48397 m/sec, 49113384 t fired, .

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46 CTL EXCL 80/3099 20/32 PermAdmissibility-PT-50-CTLCardinality-11 4343190 m, 51002 m/sec, 52323515 t fired, .

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46 CTL EXCL 85/3099 21/32 PermAdmissibility-PT-50-CTLCardinality-11 4566464 m, 44654 m/sec, 55560402 t fired, .

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46 CTL EXCL 90/3099 22/32 PermAdmissibility-PT-50-CTLCardinality-11 4807133 m, 48133 m/sec, 58825943 t fired, .

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46 CTL EXCL 95/3099 23/32 PermAdmissibility-PT-50-CTLCardinality-11 5057764 m, 50126 m/sec, 62036133 t fired, .

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46 CTL EXCL 100/3099 24/32 PermAdmissibility-PT-50-CTLCardinality-11 5296166 m, 47680 m/sec, 65178789 t fired, .

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46 CTL EXCL 105/3099 25/32 PermAdmissibility-PT-50-CTLCardinality-11 5519716 m, 44710 m/sec, 68464758 t fired, .

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46 CTL EXCL 110/3099 26/32 PermAdmissibility-PT-50-CTLCardinality-11 5751390 m, 46334 m/sec, 71680918 t fired, .

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46 CTL EXCL 115/3099 28/32 PermAdmissibility-PT-50-CTLCardinality-11 6014955 m, 52713 m/sec, 74740508 t fired, .

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46 CTL EXCL 120/3099 28/32 PermAdmissibility-PT-50-CTLCardinality-11 6223465 m, 41702 m/sec, 78005397 t fired, .

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46 CTL EXCL 125/3099 30/32 PermAdmissibility-PT-50-CTLCardinality-11 6459644 m, 47235 m/sec, 81244362 t fired, .

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46 CTL EXCL 130/3099 31/32 PermAdmissibility-PT-50-CTLCardinality-11 6698638 m, 47798 m/sec, 84441700 t fired, .

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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-50"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PermAdmissibility-PT-50, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538400545"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-50.tgz
mv PermAdmissibility-PT-50 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;