fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r263-smll-167863538400538
Last Updated
May 14, 2023

About the Execution of LoLa+red for PermAdmissibility-PT-20

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5073.407 1889072.00 1915286.00 5230.30 ???????TTF?F?TTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538400538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PermAdmissibility-PT-20, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538400538
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 7.7K Feb 26 01:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 01:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 45K Feb 26 01:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 230K Feb 26 01:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 17K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 01:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 26 01:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 76K Feb 26 01:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 374K Feb 26 01:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 336K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-00
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-01
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-02
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-03
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-04
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-05
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-06
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-07
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-08
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-09
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-10
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-11
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-12
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-13
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-14
FORMULA_NAME PermAdmissibility-PT-20-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678828129505

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PermAdmissibility-PT-20
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 21:08:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 21:08:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 21:08:53] [INFO ] Load time of PNML (sax parser for PT used): 308 ms
[2023-03-14 21:08:53] [INFO ] Transformed 168 places.
[2023-03-14 21:08:53] [INFO ] Transformed 592 transitions.
[2023-03-14 21:08:53] [INFO ] Parsed PT model containing 168 places and 592 transitions and 3456 arcs in 486 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 52 ms.
Support contains 104 out of 168 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Applied a total of 64 rules in 52 ms. Remains 104 /168 variables (removed 64) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2023-03-14 21:08:53] [INFO ] Computed 16 place invariants in 59 ms
[2023-03-14 21:08:54] [INFO ] Implicit Places using invariants in 352 ms returned []
[2023-03-14 21:08:54] [INFO ] Invariant cache hit.
[2023-03-14 21:08:54] [INFO ] Implicit Places using invariants and state equation in 439 ms returned []
Implicit Place search using SMT with State Equation took 844 ms to find 0 implicit places.
[2023-03-14 21:08:54] [INFO ] Invariant cache hit.
[2023-03-14 21:08:55] [INFO ] Dead Transitions using invariants and state equation in 798 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 104/168 places, 592/592 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1698 ms. Remains : 104/168 places, 592/592 transitions.
Support contains 104 out of 104 places after structural reductions.
[2023-03-14 21:08:56] [INFO ] Flatten gal took : 262 ms
[2023-03-14 21:08:56] [INFO ] Flatten gal took : 108 ms
[2023-03-14 21:08:56] [INFO ] Input system was already deterministic with 592 transitions.
Incomplete random walk after 10019 steps, including 29 resets, run finished after 285 ms. (steps per millisecond=35 ) properties (out of 62) seen :54
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 257 ms. (steps per millisecond=38 ) properties (out of 8) seen :5
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 3) seen :2
Finished Best-First random walk after 5242 steps, including 1 resets, run visited all 1 properties in 29 ms. (steps per millisecond=180 )
[2023-03-14 21:08:57] [INFO ] Flatten gal took : 86 ms
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 96 ms
[2023-03-14 21:08:58] [INFO ] Input system was already deterministic with 592 transitions.
Computed a total of 104 stabilizing places and 592 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 104 transition count 592
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
FORMULA PermAdmissibility-PT-20-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 49 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 104/104 places, 592/592 transitions.
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 40 ms
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 35 ms
[2023-03-14 21:08:58] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 4 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 32 ms
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 39 ms
[2023-03-14 21:08:58] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 13 places :
Symmetric choice reduction at 0 with 13 rule applications. Total rules 13 place count 91 transition count 468
Iterating global reduction 0 with 13 rules applied. Total rules applied 26 place count 91 transition count 468
Applied a total of 26 rules in 13 ms. Remains 91 /104 variables (removed 13) and now considering 468/592 (removed 124) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 91/104 places, 468/592 transitions.
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 21 ms
[2023-03-14 21:08:58] [INFO ] Flatten gal took : 24 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 468 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 5 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 104/104 places, 592/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 27 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 31 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 592 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Applied a total of 52 rules in 9 ms. Remains 78 /104 variables (removed 26) and now considering 344/592 (removed 248) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 78/104 places, 344/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 15 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 18 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 344 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 26 place count 78 transition count 344
Iterating global reduction 0 with 26 rules applied. Total rules applied 52 place count 78 transition count 344
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 66 place count 64 transition count 218
Iterating global reduction 0 with 14 rules applied. Total rules applied 80 place count 64 transition count 218
Applied a total of 80 rules in 13 ms. Remains 64 /104 variables (removed 40) and now considering 218/592 (removed 374) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 64/104 places, 218/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 11 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 12 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 218 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 12 are kept as prefixes of interest. Removing 92 places using SCC suffix rule.4 ms
Discarding 92 places :
Also discarding 576 output transitions
Drop transitions removed 576 transitions
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 3 place count 10 transition count 10
Ensure Unique test removed 1 places
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 9 transition count 10
Applied a total of 6 rules in 9 ms. Remains 9 /104 variables (removed 95) and now considering 10/592 (removed 582) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 9/104 places, 10/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 0 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 1 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.3 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions removed 128 transitions
Applied a total of 1 rules in 18 ms. Remains 86 /104 variables (removed 18) and now considering 464/592 (removed 128) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 86/104 places, 464/592 transitions.
[2023-03-14 21:08:59] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 21 ms
FORMULA PermAdmissibility-PT-20-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 23 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 464 transitions.
Support contains 0 out of 86 places (down from 75) after GAL structural reductions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 68 place count 60 transition count 136
Iterating global reduction 0 with 20 rules applied. Total rules applied 88 place count 60 transition count 136
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 89 place count 59 transition count 128
Iterating global reduction 0 with 1 rules applied. Total rules applied 90 place count 59 transition count 128
Applied a total of 90 rules in 32 ms. Remains 59 /104 variables (removed 45) and now considering 128/592 (removed 464) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 59/104 places, 128/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 7 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 7 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 128 transitions.
Finished random walk after 1657 steps, including 4 resets, run visited all 1 properties in 4 ms. (steps per millisecond=414 )
FORMULA PermAdmissibility-PT-20-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 80 transition count 352
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 80 transition count 352
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 66 place count 62 transition count 148
Iterating global reduction 0 with 18 rules applied. Total rules applied 84 place count 62 transition count 148
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 85 place count 61 transition count 140
Iterating global reduction 0 with 1 rules applied. Total rules applied 86 place count 61 transition count 140
Applied a total of 86 rules in 10 ms. Remains 61 /104 variables (removed 43) and now considering 140/592 (removed 452) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 61/104 places, 140/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 7 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 7 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 140 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Graph (complete) has 975 edges and 104 vertex of which 86 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.2 ms
Discarding 18 places :
Also discarding 128 output transitions
Drop transitions removed 128 transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 12 place count 75 transition count 348
Iterating global reduction 0 with 11 rules applied. Total rules applied 23 place count 75 transition count 348
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 45 place count 53 transition count 118
Iterating global reduction 0 with 22 rules applied. Total rules applied 67 place count 53 transition count 118
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 70 place count 50 transition count 94
Iterating global reduction 0 with 3 rules applied. Total rules applied 73 place count 50 transition count 94
Applied a total of 73 rules in 21 ms. Remains 50 /104 variables (removed 54) and now considering 94/592 (removed 498) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 50/104 places, 94/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 4 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 6 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 21 place count 83 transition count 366
Iterating global reduction 0 with 21 rules applied. Total rules applied 42 place count 83 transition count 366
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 56 place count 69 transition count 192
Iterating global reduction 0 with 14 rules applied. Total rules applied 70 place count 69 transition count 192
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 71 place count 68 transition count 184
Iterating global reduction 0 with 1 rules applied. Total rules applied 72 place count 68 transition count 184
Applied a total of 72 rules in 10 ms. Remains 68 /104 variables (removed 36) and now considering 184/592 (removed 408) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 68/104 places, 184/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 9 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 10 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 184 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 79 transition count 348
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 79 transition count 348
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 66 place count 63 transition count 172
Iterating global reduction 0 with 16 rules applied. Total rules applied 82 place count 63 transition count 172
Applied a total of 82 rules in 19 ms. Remains 63 /104 variables (removed 41) and now considering 172/592 (removed 420) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 63/104 places, 172/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 9 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 10 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 172 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 92 transition count 436
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 92 transition count 436
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 26 place count 90 transition count 406
Iterating global reduction 0 with 2 rules applied. Total rules applied 28 place count 90 transition count 406
Applied a total of 28 rules in 8 ms. Remains 90 /104 variables (removed 14) and now considering 406/592 (removed 186) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 90/104 places, 406/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 19 ms
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 22 ms
[2023-03-14 21:08:59] [INFO ] Input system was already deterministic with 406 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 22 place count 82 transition count 364
Iterating global reduction 0 with 22 rules applied. Total rules applied 44 place count 82 transition count 364
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 59 place count 67 transition count 182
Iterating global reduction 0 with 15 rules applied. Total rules applied 74 place count 67 transition count 182
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 75 place count 66 transition count 174
Iterating global reduction 0 with 1 rules applied. Total rules applied 76 place count 66 transition count 174
Applied a total of 76 rules in 9 ms. Remains 66 /104 variables (removed 38) and now considering 174/592 (removed 418) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 66/104 places, 174/592 transitions.
[2023-03-14 21:08:59] [INFO ] Flatten gal took : 8 ms
[2023-03-14 21:09:00] [INFO ] Flatten gal took : 9 ms
[2023-03-14 21:09:00] [INFO ] Input system was already deterministic with 174 transitions.
[2023-03-14 21:09:00] [INFO ] Flatten gal took : 46 ms
[2023-03-14 21:09:00] [INFO ] Flatten gal took : 48 ms
[2023-03-14 21:09:00] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 24 ms.
[2023-03-14 21:09:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 592 transitions and 2944 arcs took 4 ms.
Total runtime 7623 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PermAdmissibility-PT-20
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA PermAdmissibility-PT-20-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-20-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-20-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PermAdmissibility-PT-20-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678830018577

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 8 (type EXCL) for 7 PermAdmissibility-PT-20-CTLFireability-01
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 53 (type FNDP) for 13 PermAdmissibility-PT-20-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 13 PermAdmissibility-PT-20-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type SRCH) for 13 PermAdmissibility-PT-20-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 56 (type SRCH) for PermAdmissibility-PT-20-CTLFireability-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type FNDP) for PermAdmissibility-PT-20-CTLFireability-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for PermAdmissibility-PT-20-CTLFireability-03 (obsolete)
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PermAdmissibility-PT-20-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PermAdmissibility-PT-20-CTLFireability-15: CONJ 0 2 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
8 CTL EXCL 5/239 3/32 PermAdmissibility-PT-20-CTLFireability-01 442785 m, 88557 m/sec, 3678797 t fired, .

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8 CTL EXCL 10/239 5/32 PermAdmissibility-PT-20-CTLFireability-01 855635 m, 82570 m/sec, 7543498 t fired, .

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8 CTL EXCL 15/239 8/32 PermAdmissibility-PT-20-CTLFireability-01 1261445 m, 81162 m/sec, 11432942 t fired, .

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8 CTL EXCL 20/239 10/32 PermAdmissibility-PT-20-CTLFireability-01 1615963 m, 70903 m/sec, 15185209 t fired, .

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8 CTL EXCL 25/239 12/32 PermAdmissibility-PT-20-CTLFireability-01 1918190 m, 60445 m/sec, 18950143 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 75/1808 30/32 PermAdmissibility-PT-20-CTLFireability-00 5445558 m, 71418 m/sec, 14645979 t fired, .

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PermAdmissibility-PT-20-CTLFireability-11: CTL false CTL model checker
PermAdmissibility-PT-20-CTLFireability-13: CTL true CTL model checker
PermAdmissibility-PT-20-CTLFireability-14: CTL true CTL model checker
PermAdmissibility-PT-20-CTLFireability-15: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-20-CTLFireability-00: DISJ 0 0 1 0 2 0 1 0
PermAdmissibility-PT-20-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-03: DISJ 0 0 0 0 5 0 1 1
PermAdmissibility-PT-20-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-06: EFEG 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-12: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 CTL EXCL 80/1808 31/32 PermAdmissibility-PT-20-CTLFireability-00 5799195 m, 70727 m/sec, 15626739 t fired, .

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PermAdmissibility-PT-20-CTLFireability-11: CTL false CTL model checker
PermAdmissibility-PT-20-CTLFireability-13: CTL true CTL model checker
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PermAdmissibility-PT-20-CTLFireability-15: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PermAdmissibility-PT-20-CTLFireability-00: DISJ 0 0 0 0 2 0 2 0
PermAdmissibility-PT-20-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-03: DISJ 0 0 0 0 5 0 1 1
PermAdmissibility-PT-20-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-06: EFEG 0 0 0 0 1 0 1 0
PermAdmissibility-PT-20-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PermAdmissibility-PT-20-CTLFireability-00: DISJ unknown DISJ
PermAdmissibility-PT-20-CTLFireability-01: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-02: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-03: DISJ unknown DISJ
PermAdmissibility-PT-20-CTLFireability-04: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-05: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-06: EFEG unknown AGGR
PermAdmissibility-PT-20-CTLFireability-10: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-11: CTL false CTL model checker
PermAdmissibility-PT-20-CTLFireability-12: CTL unknown AGGR
PermAdmissibility-PT-20-CTLFireability-13: CTL true CTL model checker
PermAdmissibility-PT-20-CTLFireability-14: CTL true CTL model checker
PermAdmissibility-PT-20-CTLFireability-15: CONJ false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-20"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PermAdmissibility-PT-20, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538400538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-20.tgz
mv PermAdmissibility-PT-20 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;