Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538200401.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ParamProductionCell-PT-5, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538200401
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 656K
-rw-r--r-- 1 mcc users 7.2K Feb 26 17:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 17:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 26 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 26 17:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 166K Feb 26 17:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 17:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 26 17:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 174K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-00
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-01
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-02
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-03
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-04
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-05
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-06
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-07
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-08
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-09
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-10
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-11
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-12
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-13
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-14
FORMULA_NAME ParamProductionCell-PT-5-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678781438075

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-5
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 08:10:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-14 08:10:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 08:10:42] [INFO ] Load time of PNML (sax parser for PT used): 166 ms
[2023-03-14 08:10:42] [INFO ] Transformed 231 places.
[2023-03-14 08:10:42] [INFO ] Transformed 202 transitions.
[2023-03-14 08:10:42] [INFO ] Found NUPN structural information;
[2023-03-14 08:10:42] [INFO ] Parsed PT model containing 231 places and 202 transitions and 846 arcs in 346 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 23 ms.
FORMULA ParamProductionCell-PT-5-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 81 out of 231 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 231/231 places, 202/202 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 230 transition count 201
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 230 transition count 201
Applied a total of 2 rules in 65 ms. Remains 230 /231 variables (removed 1) and now considering 201/202 (removed 1) transitions.
// Phase 1: matrix 201 rows 230 cols
[2023-03-14 08:10:42] [INFO ] Computed 59 place invariants in 29 ms
[2023-03-14 08:10:43] [INFO ] Implicit Places using invariants in 725 ms returned [18, 19, 24, 31, 35, 36, 41, 46, 47, 59, 64, 73, 79, 98, 101, 114, 115, 120, 164, 166, 195, 196, 200, 205, 206, 221]
Discarding 26 places :
Implicit Place search using SMT only with invariants took 796 ms to find 26 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 204/231 places, 201/202 transitions.
Applied a total of 0 rules in 16 ms. Remains 204 /204 variables (removed 0) and now considering 201/201 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 877 ms. Remains : 204/231 places, 201/202 transitions.
Support contains 81 out of 204 places after structural reductions.
[2023-03-14 08:10:43] [INFO ] Flatten gal took : 90 ms
[2023-03-14 08:10:43] [INFO ] Flatten gal took : 42 ms
[2023-03-14 08:10:43] [INFO ] Input system was already deterministic with 201 transitions.
Support contains 80 out of 204 places (down from 81) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 701 ms. (steps per millisecond=14 ) properties (out of 59) seen :55
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 136 ms. (steps per millisecond=73 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 3) seen :1
Running SMT prover for 2 properties.
// Phase 1: matrix 201 rows 204 cols
[2023-03-14 08:10:44] [INFO ] Computed 33 place invariants in 8 ms
[2023-03-14 08:10:45] [INFO ] [Real]Absence check using 23 positive place invariants in 11 ms returned sat
[2023-03-14 08:10:45] [INFO ] [Real]Absence check using 23 positive and 10 generalized place invariants in 7 ms returned sat
[2023-03-14 08:10:45] [INFO ] After 125ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 15 simplifications.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 15 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 18 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 201 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 199 transition count 196
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 199 transition count 196
Applied a total of 10 rules in 25 ms. Remains 199 /204 variables (removed 5) and now considering 196/201 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 199/204 places, 196/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 13 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 15 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 26 transitions
Trivial Post-agglo rules discarded 26 transitions
Performed 26 trivial Post agglomeration. Transition count delta: 26
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 204 transition count 175
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 52 place count 178 transition count 175
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 13 Pre rules applied. Total rules applied 52 place count 178 transition count 162
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 78 place count 165 transition count 162
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 85 place count 158 transition count 155
Iterating global reduction 2 with 7 rules applied. Total rules applied 92 place count 158 transition count 155
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 1 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 152 place count 128 transition count 125
Applied a total of 152 rules in 45 ms. Remains 128 /204 variables (removed 76) and now considering 125/201 (removed 76) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 45 ms. Remains : 128/204 places, 125/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 125 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 204 transition count 177
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 48 place count 180 transition count 177
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 12 Pre rules applied. Total rules applied 48 place count 180 transition count 165
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 72 place count 168 transition count 165
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 79 place count 161 transition count 158
Iterating global reduction 2 with 7 rules applied. Total rules applied 86 place count 161 transition count 158
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 1 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 146 place count 131 transition count 128
Applied a total of 146 rules in 33 ms. Remains 131 /204 variables (removed 73) and now considering 128/201 (removed 73) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 131/204 places, 128/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 12 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 128 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 199 transition count 196
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 199 transition count 196
Applied a total of 10 rules in 8 ms. Remains 199 /204 variables (removed 5) and now considering 196/201 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 199/204 places, 196/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 13 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 14 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 26 transitions
Trivial Post-agglo rules discarded 26 transitions
Performed 26 trivial Post agglomeration. Transition count delta: 26
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 204 transition count 175
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 52 place count 178 transition count 175
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 52 place count 178 transition count 161
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 80 place count 164 transition count 161
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 87 place count 157 transition count 154
Iterating global reduction 2 with 7 rules applied. Total rules applied 94 place count 157 transition count 154
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 1 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 154 place count 127 transition count 124
Applied a total of 154 rules in 28 ms. Remains 127 /204 variables (removed 77) and now considering 124/201 (removed 77) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 127/204 places, 124/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 22 transitions
Trivial Post-agglo rules discarded 22 transitions
Performed 22 trivial Post agglomeration. Transition count delta: 22
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 204 transition count 179
Reduce places removed 22 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 24 rules applied. Total rules applied 46 place count 182 transition count 177
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 48 place count 180 transition count 177
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 16 Pre rules applied. Total rules applied 48 place count 180 transition count 161
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 3 with 32 rules applied. Total rules applied 80 place count 164 transition count 161
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 86 place count 158 transition count 155
Iterating global reduction 3 with 6 rules applied. Total rules applied 92 place count 158 transition count 155
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 3 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 3 with 60 rules applied. Total rules applied 152 place count 128 transition count 125
Applied a total of 152 rules in 29 ms. Remains 128 /204 variables (removed 76) and now considering 125/201 (removed 76) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 128/204 places, 125/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 125 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 198 transition count 195
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 198 transition count 195
Applied a total of 12 rules in 7 ms. Remains 198 /204 variables (removed 6) and now considering 195/201 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 198/204 places, 195/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 195 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 23 transitions
Trivial Post-agglo rules discarded 23 transitions
Performed 23 trivial Post agglomeration. Transition count delta: 23
Iterating post reduction 0 with 23 rules applied. Total rules applied 23 place count 204 transition count 178
Reduce places removed 23 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 24 rules applied. Total rules applied 47 place count 181 transition count 177
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 48 place count 180 transition count 177
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 15 Pre rules applied. Total rules applied 48 place count 180 transition count 162
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 3 with 30 rules applied. Total rules applied 78 place count 165 transition count 162
Discarding 7 places :
Symmetric choice reduction at 3 with 7 rule applications. Total rules 85 place count 158 transition count 155
Iterating global reduction 3 with 7 rules applied. Total rules applied 92 place count 158 transition count 155
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 0 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 142 place count 133 transition count 130
Applied a total of 142 rules in 36 ms. Remains 133 /204 variables (removed 71) and now considering 130/201 (removed 71) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 133/204 places, 130/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 130 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 26 transitions
Trivial Post-agglo rules discarded 26 transitions
Performed 26 trivial Post agglomeration. Transition count delta: 26
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 204 transition count 175
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 52 place count 178 transition count 175
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 52 place count 178 transition count 161
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 80 place count 164 transition count 161
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 87 place count 157 transition count 154
Iterating global reduction 2 with 7 rules applied. Total rules applied 94 place count 157 transition count 154
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 0 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 154 place count 127 transition count 124
Applied a total of 154 rules in 20 ms. Remains 127 /204 variables (removed 77) and now considering 124/201 (removed 77) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 127/204 places, 124/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 197 transition count 194
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 197 transition count 194
Applied a total of 14 rules in 8 ms. Remains 197 /204 variables (removed 7) and now considering 194/201 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 197/204 places, 194/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:45] [INFO ] Input system was already deterministic with 194 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 200 transition count 197
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 200 transition count 197
Applied a total of 8 rules in 7 ms. Remains 200 /204 variables (removed 4) and now considering 197/201 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 200/204 places, 197/201 transitions.
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:10:45] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 25 transitions
Trivial Post-agglo rules discarded 25 transitions
Performed 25 trivial Post agglomeration. Transition count delta: 25
Iterating post reduction 0 with 25 rules applied. Total rules applied 25 place count 204 transition count 176
Reduce places removed 25 places and 0 transitions.
Iterating post reduction 1 with 25 rules applied. Total rules applied 50 place count 179 transition count 176
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 50 place count 179 transition count 162
Deduced a syphon composed of 14 places in 1 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 78 place count 165 transition count 162
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 85 place count 158 transition count 155
Iterating global reduction 2 with 7 rules applied. Total rules applied 92 place count 158 transition count 155
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Deduced a syphon composed of 29 places in 1 ms
Reduce places removed 29 places and 0 transitions.
Iterating global reduction 2 with 58 rules applied. Total rules applied 150 place count 129 transition count 126
Applied a total of 150 rules in 22 ms. Remains 129 /204 variables (removed 75) and now considering 126/201 (removed 75) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 129/204 places, 126/201 transitions.
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:10:46] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Drop transitions removed 26 transitions
Trivial Post-agglo rules discarded 26 transitions
Performed 26 trivial Post agglomeration. Transition count delta: 26
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 204 transition count 175
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 1 with 26 rules applied. Total rules applied 52 place count 178 transition count 175
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 52 place count 178 transition count 161
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 80 place count 164 transition count 161
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 87 place count 157 transition count 154
Iterating global reduction 2 with 7 rules applied. Total rules applied 94 place count 157 transition count 154
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 0 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 154 place count 127 transition count 124
Applied a total of 154 rules in 27 ms. Remains 127 /204 variables (removed 77) and now considering 124/201 (removed 77) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 127/204 places, 124/201 transitions.
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:10:46] [INFO ] Input system was already deterministic with 124 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 197 transition count 194
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 197 transition count 194
Applied a total of 14 rules in 8 ms. Remains 197 /204 variables (removed 7) and now considering 194/201 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 197/204 places, 194/201 transitions.
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Input system was already deterministic with 194 transitions.
Starting structural reductions in LTL mode, iteration 0 : 204/204 places, 201/201 transitions.
Discarding 7 places :
Symmetric choice reduction at 0 with 7 rule applications. Total rules 7 place count 197 transition count 194
Iterating global reduction 0 with 7 rules applied. Total rules applied 14 place count 197 transition count 194
Applied a total of 14 rules in 8 ms. Remains 197 /204 variables (removed 7) and now considering 194/201 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 197/204 places, 194/201 transitions.
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Input system was already deterministic with 194 transitions.
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:10:46] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-14 08:10:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 204 places, 201 transitions and 679 arcs took 2 ms.
Total runtime 4372 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ParamProductionCell-PT-5
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368

FORMULA ParamProductionCell-PT-5-CTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-5-CTLCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678781498936

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 22 (type EXCL) for 21 ParamProductionCell-PT-5-CTLCardinality-03
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type FNDP) for 48 ParamProductionCell-PT-5-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 48 ParamProductionCell-PT-5-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 48 ParamProductionCell-PT-5-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SRCH) for ParamProductionCell-PT-5-CTLCardinality-13
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 69 (type FNDP) for 6 ParamProductionCell-PT-5-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 69 (type FNDP) for ParamProductionCell-PT-5-CTLCardinality-02
lola: result : true
lola: fired transitions : 39
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 62 (type FNDP) for ParamProductionCell-PT-5-CTLCardinality-13
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for ParamProductionCell-PT-5-CTLCardinality-13 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 68 (type FNDP) for 54 ParamProductionCell-PT-5-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type EQUN) for 54 ParamProductionCell-PT-5-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 79 (type SRCH) for 54 ParamProductionCell-PT-5-CTLCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type EQUN) for ParamProductionCell-PT-5-CTLCardinality-13
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 79 (type SRCH) for ParamProductionCell-PT-5-CTLCardinality-15
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 68 (type FNDP) for ParamProductionCell-PT-5-CTLCardinality-15
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 77 (type EQUN) for ParamProductionCell-PT-5-CTLCardinality-15 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 82 (type FNDP) for 6 ParamProductionCell-PT-5-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type EQUN) for 6 ParamProductionCell-PT-5-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SRCH) for 6 ParamProductionCell-PT-5-CTLCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 82 (type FNDP) for ParamProductionCell-PT-5-CTLCardinality-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 83 (type EQUN) for ParamProductionCell-PT-5-CTLCardinality-02 (obsolete)
lola: CANCELED task # 85 (type SRCH) for ParamProductionCell-PT-5-CTLCardinality-02 (obsolete)
lola: FINISHED task # 85 (type SRCH) for ParamProductionCell-PT-5-CTLCardinality-02
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/368/CTLCardinality-77.sara.
sara: try reading problem file /home/mcc/execution/368/CTLCardinality-83.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 83 (type EQUN) for ParamProductionCell-PT-5-CTLCardinality-02
lola: result : true
lola: FINISHED task # 22 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-03
lola: result : true
lola: markings : 625845
lola: fired transitions : 2244548
lola: time used : 5.000000
lola: memory pages used : 3
lola: LAUNCH task # 59 (type EXCL) for 54 ParamProductionCell-PT-5-CTLCardinality-15
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-15
lola: result : false
lola: markings : 22
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 ParamProductionCell-PT-5-CTLCardinality-14
lola: time limit : 326 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 0/326 1/32 ParamProductionCell-PT-5-CTLCardinality-14 8820 m, 1764 m/sec, 23801 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 52 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-14
lola: result : false
lola: markings : 36456
lola: fired transitions : 124819
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 ParamProductionCell-PT-5-CTLCardinality-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 4/359 4/32 ParamProductionCell-PT-5-CTLCardinality-11 800942 m, 160188 m/sec, 2523412 t fired, .

Time elapsed: 10 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 9/359 8/32 ParamProductionCell-PT-5-CTLCardinality-11 1586392 m, 157090 m/sec, 5284991 t fired, .

Time elapsed: 15 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 14/359 8/32 ParamProductionCell-PT-5-CTLCardinality-11 1631366 m, 8994 m/sec, 7979009 t fired, .

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ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 19/359 8/32 ParamProductionCell-PT-5-CTLCardinality-11 1640459 m, 1818 m/sec, 10809235 t fired, .

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ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 24/359 8/32 ParamProductionCell-PT-5-CTLCardinality-11 1648656 m, 1639 m/sec, 13722173 t fired, .

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ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 29/359 8/32 ParamProductionCell-PT-5-CTLCardinality-11 1654510 m, 1170 m/sec, 16592023 t fired, .

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lola: FINISHED task # 43 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-11
lola: result : false
lola: markings : 1657242
lola: fired transitions : 18886394
lola: time used : 34.000000
lola: memory pages used : 8
lola: LAUNCH task # 40 (type EXCL) for 39 ParamProductionCell-PT-5-CTLCardinality-10
lola: time limit : 395 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-10
lola: result : true
lola: markings : 485
lola: fired transitions : 1410
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 ParamProductionCell-PT-5-CTLCardinality-07
lola: time limit : 445 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-10: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 0/445 1/32 ParamProductionCell-PT-5-CTLCardinality-07 125802 m, 25160 m/sec, 311174 t fired, .

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ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-10: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-07: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/445 5/32 ParamProductionCell-PT-5-CTLCardinality-07 1000297 m, 174899 m/sec, 3192227 t fired, .

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lola: FINISHED task # 31 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-07
lola: result : true
lola: markings : 1436004
lola: fired transitions : 5075778
lola: time used : 9.000000
lola: memory pages used : 7
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-5-CTLCardinality-00
lola: time limit : 507 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-10: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-04: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-05: EG 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLCardinality-12: AGEF 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 1/507 1/32 ParamProductionCell-PT-5-CTLCardinality-00 128343 m, 25668 m/sec, 642781 t fired, .

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lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-00
lola: result : true
lola: markings : 198988
lola: fired transitions : 1032550
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ParamProductionCell-PT-5-CTLCardinality-04
lola: time limit : 591 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-04
lola: result : false
lola: markings : 264
lola: fired transitions : 291
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 ParamProductionCell-PT-5-CTLCardinality-05
lola: time limit : 709 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-05
lola: result : false
lola: markings : 274
lola: fired transitions : 337
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 ParamProductionCell-PT-5-CTLCardinality-12
lola: time limit : 887 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-12
lola: result : true
lola: markings : 39476
lola: fired transitions : 56398
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-5-CTLCardinality-01
lola: time limit : 1183 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-01
lola: result : false
lola: markings : 4186
lola: fired transitions : 13180
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 ParamProductionCell-PT-5-CTLCardinality-08
lola: time limit : 1774 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-08
lola: result : true
lola: markings : 13
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 ParamProductionCell-PT-5-CTLCardinality-09
lola: time limit : 3549 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ParamProductionCell-PT-5-CTLCardinality-09
lola: result : true
lola: markings : 139
lola: fired transitions : 271
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLCardinality-00: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-01: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-02: DISJ false DISJ
ParamProductionCell-PT-5-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-04: EG false state space / EG
ParamProductionCell-PT-5-CTLCardinality-05: EG false state space / EG
ParamProductionCell-PT-5-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-08: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-09: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-10: CTL true CTL model checker
ParamProductionCell-PT-5-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-12: AGEF true tscc_search
ParamProductionCell-PT-5-CTLCardinality-13: AG false findpath
ParamProductionCell-PT-5-CTLCardinality-14: CTL false CTL model checker
ParamProductionCell-PT-5-CTLCardinality-15: DISJ false DISJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-5"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ParamProductionCell-PT-5, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538200401"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-5.tgz
mv ParamProductionCell-PT-5 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;