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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r263-smll-167863538100362
Last Updated
May 14, 2023

About the Execution of LoLa+red for ParamProductionCell-PT-0

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1398.903 122760.00 134091.00 868.40 TFFFTFFFFTFTFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538100362.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ParamProductionCell-PT-0, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538100362
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 640K
-rw-r--r-- 1 mcc users 8.3K Feb 26 17:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 17:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 17:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 17:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 17:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 135K Feb 26 17:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 26 17:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 149K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-00
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-01
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-02
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-03
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-04
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-05
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-06
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-07
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-08
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-09
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678779920163

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-0
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 07:45:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 07:45:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 07:45:22] [INFO ] Load time of PNML (sax parser for PT used): 303 ms
[2023-03-14 07:45:22] [INFO ] Transformed 198 places.
[2023-03-14 07:45:22] [INFO ] Transformed 176 transitions.
[2023-03-14 07:45:22] [INFO ] Found NUPN structural information;
[2023-03-14 07:45:22] [INFO ] Parsed PT model containing 198 places and 176 transitions and 730 arcs in 440 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 114 out of 198 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 176/176 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 194 transition count 172
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 194 transition count 172
Applied a total of 8 rules in 37 ms. Remains 194 /198 variables (removed 4) and now considering 172/176 (removed 4) transitions.
// Phase 1: matrix 172 rows 194 cols
[2023-03-14 07:45:23] [INFO ] Computed 49 place invariants in 23 ms
[2023-03-14 07:45:23] [INFO ] Implicit Places using invariants in 379 ms returned [15, 16, 35, 36, 46, 73, 79, 120, 167]
Discarding 9 places :
Implicit Place search using SMT only with invariants took 417 ms to find 9 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 185/198 places, 172/176 transitions.
Applied a total of 0 rules in 6 ms. Remains 185 /185 variables (removed 0) and now considering 172/172 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 460 ms. Remains : 185/198 places, 172/176 transitions.
Support contains 114 out of 185 places after structural reductions.
[2023-03-14 07:45:23] [INFO ] Flatten gal took : 58 ms
[2023-03-14 07:45:23] [INFO ] Flatten gal took : 24 ms
[2023-03-14 07:45:23] [INFO ] Input system was already deterministic with 172 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 626 ms. (steps per millisecond=15 ) properties (out of 69) seen :60
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 181 ms. (steps per millisecond=55 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 130 ms. (steps per millisecond=76 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 120 ms. (steps per millisecond=83 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
// Phase 1: matrix 172 rows 185 cols
[2023-03-14 07:45:25] [INFO ] Computed 40 place invariants in 10 ms
[2023-03-14 07:45:25] [INFO ] [Real]Absence check using 27 positive place invariants in 13 ms returned sat
[2023-03-14 07:45:25] [INFO ] [Real]Absence check using 27 positive and 13 generalized place invariants in 4 ms returned sat
[2023-03-14 07:45:25] [INFO ] After 168ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:7
[2023-03-14 07:45:26] [INFO ] [Nat]Absence check using 27 positive place invariants in 15 ms returned sat
[2023-03-14 07:45:26] [INFO ] [Nat]Absence check using 27 positive and 13 generalized place invariants in 6 ms returned sat
[2023-03-14 07:45:26] [INFO ] After 132ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :1
[2023-03-14 07:45:26] [INFO ] State equation strengthened by 59 read => feed constraints.
[2023-03-14 07:45:26] [INFO ] After 39ms SMT Verify possible using 59 Read/Feed constraints in natural domain returned unsat :7 sat :1
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 7 places in 98 ms of which 8 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 5 places in 91 ms of which 1 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 8 places in 69 ms of which 2 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 40 places in 69 ms of which 2 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 11 places in 71 ms of which 1 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Deduced a trap composed of 26 places in 35 ms of which 1 ms to minimize.
[2023-03-14 07:45:26] [INFO ] Trap strengthening (SAT) tested/added 7/6 trap constraints in 544 ms
[2023-03-14 07:45:26] [INFO ] After 601ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :1
Attempting to minimize the solution found.
Minimization took 12 ms.
[2023-03-14 07:45:26] [INFO ] After 897ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :1
Fused 8 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 9 ms.
Support contains 4 out of 185 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 13 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 13 Pre rules applied. Total rules applied 6 place count 182 transition count 156
Deduced a syphon composed of 13 places in 1 ms
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 2 with 26 rules applied. Total rules applied 32 place count 169 transition count 156
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 34 place count 167 transition count 154
Iterating global reduction 2 with 2 rules applied. Total rules applied 36 place count 167 transition count 154
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 76 place count 146 transition count 135
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 76 place count 146 transition count 134
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 78 place count 145 transition count 134
Free-agglomeration rule (complex) applied 4 times.
Iterating global reduction 2 with 4 rules applied. Total rules applied 82 place count 145 transition count 130
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 86 place count 141 transition count 130
Applied a total of 86 rules in 69 ms. Remains 141 /185 variables (removed 44) and now considering 130/172 (removed 42) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 69 ms. Remains : 141/185 places, 130/172 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Finished probabilistic random walk after 125975 steps, run visited all 1 properties in 371 ms. (steps per millisecond=339 )
Probabilistic random walk after 125975 steps, saw 40932 distinct states, run finished after 371 ms. (steps per millisecond=339 ) properties seen :1
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA ParamProductionCell-PT-0-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ParamProductionCell-PT-0-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:45:27] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA ParamProductionCell-PT-0-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 17 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 172 transitions.
Support contains 85 out of 185 places (down from 91) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 6 place count 182 transition count 154
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 36 place count 167 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 38 place count 165 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 40 place count 165 transition count 152
Performed 18 Post agglomeration using F-continuation condition.Transition count delta: 18
Deduced a syphon composed of 18 places in 1 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 2 with 38 rules applied. Total rules applied 78 place count 145 transition count 134
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 78 place count 145 transition count 133
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 80 place count 144 transition count 133
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 83 place count 142 transition count 132
Applied a total of 83 rules in 36 ms. Remains 142 /185 variables (removed 43) and now considering 132/172 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 142/185 places, 132/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 6 place count 182 transition count 154
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 36 place count 167 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 38 place count 165 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 40 place count 165 transition count 152
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 80 place count 144 transition count 133
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 80 place count 144 transition count 132
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 82 place count 143 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 85 place count 141 transition count 131
Applied a total of 85 rules in 32 ms. Remains 141 /185 variables (removed 44) and now considering 131/172 (removed 41) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 141/185 places, 131/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 6 place count 182 transition count 154
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 36 place count 167 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 38 place count 165 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 40 place count 165 transition count 152
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 80 place count 144 transition count 133
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 80 place count 144 transition count 132
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 82 place count 143 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 85 place count 141 transition count 131
Applied a total of 85 rules in 30 ms. Remains 141 /185 variables (removed 44) and now considering 131/172 (removed 41) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 141/185 places, 131/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 6 place count 182 transition count 154
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 36 place count 167 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 38 place count 165 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 40 place count 165 transition count 152
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 80 place count 144 transition count 133
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 80 place count 144 transition count 132
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 82 place count 143 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 85 place count 141 transition count 131
Applied a total of 85 rules in 31 ms. Remains 141 /185 variables (removed 44) and now considering 131/172 (removed 41) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 141/185 places, 131/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 131 transitions.
Finished random walk after 73 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=36 )
FORMULA ParamProductionCell-PT-0-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 7 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 6 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 185 transition count 171
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 184 transition count 171
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 2 place count 184 transition count 156
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 32 place count 169 transition count 156
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 33 place count 168 transition count 155
Iterating global reduction 2 with 1 rules applied. Total rules applied 34 place count 168 transition count 155
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 66 place count 151 transition count 140
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 66 place count 151 transition count 139
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 68 place count 150 transition count 139
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 71 place count 148 transition count 138
Applied a total of 71 rules in 27 ms. Remains 148 /185 variables (removed 37) and now considering 138/172 (removed 34) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 27 ms. Remains : 148/185 places, 138/172 transitions.
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:45:27] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:27] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 6 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 7 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 5 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 184 transition count 171
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 184 transition count 171
Applied a total of 2 rules in 7 ms. Remains 184 /185 variables (removed 1) and now considering 171/172 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 184/185 places, 171/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 185 transition count 169
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 6 place count 182 transition count 169
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 6 place count 182 transition count 154
Deduced a syphon composed of 15 places in 1 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 36 place count 167 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 38 place count 165 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 40 place count 165 transition count 152
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 1 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 80 place count 144 transition count 133
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 80 place count 144 transition count 132
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 82 place count 143 transition count 132
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 85 place count 141 transition count 131
Applied a total of 85 rules in 32 ms. Remains 141 /185 variables (removed 44) and now considering 131/172 (removed 41) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 141/185 places, 131/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 7 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 8 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 131 transitions.
Starting structural reductions in LTL mode, iteration 0 : 185/185 places, 172/172 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 183 transition count 170
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 183 transition count 170
Applied a total of 4 rules in 5 ms. Remains 183 /185 variables (removed 2) and now considering 170/172 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 183/185 places, 170/172 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:45:28] [INFO ] Input system was already deterministic with 170 transitions.
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:28] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:45:28] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-14 07:45:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 185 places, 172 transitions and 688 arcs took 3 ms.
Total runtime 5948 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ParamProductionCell-PT-0
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA ParamProductionCell-PT-0-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-0-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678780042923

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-0-CTLFireability-00
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-00
lola: result : true
lola: markings : 658
lola: fired transitions : 1084
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 16 (type EXCL) for 15 ParamProductionCell-PT-0-CTLFireability-07
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 16 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-07
lola: result : false
lola: markings : 35032
lola: fired transitions : 100540
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 ParamProductionCell-PT-0-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-0-CTLFireability-00: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-07: CTL false CTL model checker

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ParamProductionCell-PT-0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 5/327 3/32 ParamProductionCell-PT-0-CTLFireability-14 519357 m, 103871 m/sec, 2569347 t fired, .

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ParamProductionCell-PT-0-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 10/327 5/32 ParamProductionCell-PT-0-CTLFireability-14 950403 m, 86209 m/sec, 5026863 t fired, .

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ParamProductionCell-PT-0-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 15/327 7/32 ParamProductionCell-PT-0-CTLFireability-14 1363313 m, 82582 m/sec, 7552746 t fired, .

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ParamProductionCell-PT-0-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 20/327 8/32 ParamProductionCell-PT-0-CTLFireability-14 1770620 m, 81461 m/sec, 10233106 t fired, .

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38 CTL EXCL 25/327 10/32 ParamProductionCell-PT-0-CTLFireability-14 2187237 m, 83323 m/sec, 12942834 t fired, .

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38 CTL EXCL 30/327 12/32 ParamProductionCell-PT-0-CTLFireability-14 2580800 m, 78712 m/sec, 15703503 t fired, .

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38 CTL EXCL 35/327 13/32 ParamProductionCell-PT-0-CTLFireability-14 2759432 m, 35726 m/sec, 18202292 t fired, .

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13 CTL EXCL 5/707 4/32 ParamProductionCell-PT-0-CTLFireability-06 892050 m, 153366 m/sec, 3643566 t fired, .

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ParamProductionCell-PT-0-CTLFireability-10: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-11: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-0-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 27/880 11/32 ParamProductionCell-PT-0-CTLFireability-05 2456580 m, 79561 m/sec, 10043017 t fired, .

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# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-0-CTLFireability-00: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-07: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-09: CONJ true CONJ
ParamProductionCell-PT-0-CTLFireability-10: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-11: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-0-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-0-CTLFireability-13: F 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 32/880 13/32 ParamProductionCell-PT-0-CTLFireability-05 2759173 m, 60518 m/sec, 12072185 t fired, .

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# running tasks: 1 of 4 Visible: 12
lola: FINISHED task # 10 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-05
lola: result : false
lola: markings : 2759432
lola: fired transitions : 13079745
lola: time used : 35.000000
lola: memory pages used : 13
lola: LAUNCH task # 40 (type EXCL) for 34 ParamProductionCell-PT-0-CTLFireability-13
lola: time limit : 1162 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-13
lola: result : false
lola: markings : 915
lola: fired transitions : 988
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-0-CTLFireability-03
lola: time limit : 1743 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-03
lola: result : false
lola: markings : 48567
lola: fired transitions : 218402
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-0-CTLFireability-01
lola: time limit : 3487 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-0-CTLFireability-01
lola: result : false
lola: markings : 48567
lola: fired transitions : 225153
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-0-CTLFireability-00: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-03: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-07: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-09: CONJ true CONJ
ParamProductionCell-PT-0-CTLFireability-10: CTL false CTL model checker
ParamProductionCell-PT-0-CTLFireability-11: CTL true CTL model checker
ParamProductionCell-PT-0-CTLFireability-13: F true state space / EG
ParamProductionCell-PT-0-CTLFireability-14: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-0"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ParamProductionCell-PT-0, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538100362"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-0.tgz
mv ParamProductionCell-PT-0 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;