Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538000274.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is NoC3x3-PT-4A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538000274
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 6.0K Feb 26 10:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 10:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Feb 26 10:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 10:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 10:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 10:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 10:21 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 26 10:21 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 144K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-00
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-01
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-02
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-03
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-04
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-05
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-06
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-07
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-08
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-09
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-10
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-11
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-12
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-13
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-14
FORMULA_NAME NoC3x3-PT-4A-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678756189354

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NoC3x3-PT-4A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 01:09:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 01:09:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 01:09:51] [INFO ] Load time of PNML (sax parser for PT used): 125 ms
[2023-03-14 01:09:51] [INFO ] Transformed 293 places.
[2023-03-14 01:09:51] [INFO ] Transformed 608 transitions.
[2023-03-14 01:09:51] [INFO ] Found NUPN structural information;
[2023-03-14 01:09:51] [INFO ] Parsed PT model containing 293 places and 608 transitions and 1905 arcs in 252 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Ensure Unique test removed 155 transitions
Reduce redundant transitions removed 155 transitions.
Support contains 103 out of 293 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 293/293 places, 453/453 transitions.
Discarding 36 places :
Symmetric choice reduction at 0 with 36 rule applications. Total rules 36 place count 257 transition count 402
Iterating global reduction 0 with 36 rules applied. Total rules applied 72 place count 257 transition count 402
Drop transitions removed 57 transitions
Redundant transition composition rules discarded 57 transitions
Iterating global reduction 0 with 57 rules applied. Total rules applied 129 place count 257 transition count 345
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 137 place count 249 transition count 345
Applied a total of 137 rules in 66 ms. Remains 249 /293 variables (removed 44) and now considering 345/453 (removed 108) transitions.
// Phase 1: matrix 345 rows 249 cols
[2023-03-14 01:09:52] [INFO ] Computed 58 place invariants in 28 ms
[2023-03-14 01:09:52] [INFO ] Implicit Places using invariants in 520 ms returned []
[2023-03-14 01:09:52] [INFO ] Invariant cache hit.
[2023-03-14 01:09:53] [INFO ] Implicit Places using invariants and state equation in 379 ms returned []
Implicit Place search using SMT with State Equation took 942 ms to find 0 implicit places.
[2023-03-14 01:09:53] [INFO ] Invariant cache hit.
[2023-03-14 01:09:53] [INFO ] Dead Transitions using invariants and state equation in 311 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 249/293 places, 345/453 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1322 ms. Remains : 249/293 places, 345/453 transitions.
Support contains 103 out of 249 places after structural reductions.
[2023-03-14 01:09:53] [INFO ] Flatten gal took : 117 ms
[2023-03-14 01:09:53] [INFO ] Flatten gal took : 60 ms
[2023-03-14 01:09:54] [INFO ] Input system was already deterministic with 345 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 729 ms. (steps per millisecond=13 ) properties (out of 65) seen :58
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 6) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-14 01:09:55] [INFO ] Invariant cache hit.
[2023-03-14 01:09:55] [INFO ] [Real]Absence check using 58 positive place invariants in 22 ms returned sat
[2023-03-14 01:09:55] [INFO ] After 189ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:4
[2023-03-14 01:09:55] [INFO ] [Nat]Absence check using 58 positive place invariants in 28 ms returned sat
[2023-03-14 01:09:55] [INFO ] After 252ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :4
[2023-03-14 01:09:55] [INFO ] After 396ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :4
Attempting to minimize the solution found.
Minimization took 86 ms.
[2023-03-14 01:09:55] [INFO ] After 698ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :4
Finished Parikh walk after 119 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=59 )
Parikh walk visited 4 properties in 25 ms.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 29 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 33 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 345 transitions.
Computed a total of 2 stabilizing places and 1 stable transitions
Graph (complete) has 814 edges and 249 vertex of which 248 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.7 ms
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 20 place count 229 transition count 326
Iterating global reduction 1 with 19 rules applied. Total rules applied 39 place count 229 transition count 326
Applied a total of 39 rules in 25 ms. Remains 229 /249 variables (removed 20) and now considering 326/345 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 229/249 places, 326/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 23 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 24 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 326 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 20 place count 229 transition count 326
Iterating global reduction 1 with 19 rules applied. Total rules applied 39 place count 229 transition count 326
Applied a total of 39 rules in 16 ms. Remains 229 /249 variables (removed 20) and now considering 326/345 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 229/249 places, 326/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 21 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 22 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 326 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 20 place count 229 transition count 326
Iterating global reduction 1 with 19 rules applied. Total rules applied 39 place count 229 transition count 326
Applied a total of 39 rules in 14 ms. Remains 229 /249 variables (removed 20) and now considering 326/345 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 229/249 places, 326/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 20 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 18 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 326 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 234 transition count 330
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 234 transition count 330
Applied a total of 30 rules in 11 ms. Remains 234 /249 variables (removed 15) and now considering 330/345 (removed 15) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 234/249 places, 330/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 18 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 18 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 330 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 120 edges and 249 vertex of which 64 / 249 are part of one of the 28 SCC in 4 ms
Free SCC test removed 36 places
Ensure Unique test removed 71 transitions
Reduce isomorphic transitions removed 71 transitions.
Graph (complete) has 743 edges and 213 vertex of which 212 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 18 place count 196 transition count 258
Iterating global reduction 0 with 16 rules applied. Total rules applied 34 place count 196 transition count 258
Drop transitions removed 6 transitions
Redundant transition composition rules discarded 6 transitions
Iterating global reduction 0 with 6 rules applied. Total rules applied 40 place count 196 transition count 252
Applied a total of 40 rules in 52 ms. Remains 196 /249 variables (removed 53) and now considering 252/345 (removed 93) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 52 ms. Remains : 196/249 places, 252/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 11 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 11 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 252 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 131 edges and 249 vertex of which 70 / 249 are part of one of the 31 SCC in 0 ms
Free SCC test removed 39 places
Ensure Unique test removed 77 transitions
Reduce isomorphic transitions removed 77 transitions.
Graph (complete) has 737 edges and 210 vertex of which 209 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 21 place count 190 transition count 249
Iterating global reduction 0 with 19 rules applied. Total rules applied 40 place count 190 transition count 249
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 42 place count 190 transition count 247
Applied a total of 42 rules in 31 ms. Remains 190 /249 variables (removed 59) and now considering 247/345 (removed 98) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 190/249 places, 247/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 10 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 11 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 247 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 133 edges and 249 vertex of which 70 / 249 are part of one of the 31 SCC in 1 ms
Free SCC test removed 39 places
Ensure Unique test removed 77 transitions
Reduce isomorphic transitions removed 77 transitions.
Graph (complete) has 737 edges and 210 vertex of which 209 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 19 places :
Symmetric choice reduction at 0 with 19 rule applications. Total rules 21 place count 190 transition count 249
Iterating global reduction 0 with 19 rules applied. Total rules applied 40 place count 190 transition count 249
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 43 place count 190 transition count 246
Applied a total of 43 rules in 32 ms. Remains 190 /249 variables (removed 59) and now considering 246/345 (removed 99) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 190/249 places, 246/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 10 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 18 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 246 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 20 place count 229 transition count 326
Iterating global reduction 1 with 19 rules applied. Total rules applied 39 place count 229 transition count 326
Applied a total of 39 rules in 10 ms. Remains 229 /249 variables (removed 20) and now considering 326/345 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 229/249 places, 326/345 transitions.
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:56] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:56] [INFO ] Input system was already deterministic with 326 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 137 edges and 249 vertex of which 73 / 249 are part of one of the 32 SCC in 0 ms
Free SCC test removed 41 places
Ensure Unique test removed 81 transitions
Reduce isomorphic transitions removed 81 transitions.
Graph (complete) has 733 edges and 208 vertex of which 207 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 41 rules applied. Total rules applied 43 place count 197 transition count 231
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 67 place count 173 transition count 231
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 87 place count 153 transition count 211
Iterating global reduction 2 with 20 rules applied. Total rules applied 107 place count 153 transition count 211
Drop transitions removed 24 transitions
Redundant transition composition rules discarded 24 transitions
Iterating global reduction 2 with 24 rules applied. Total rules applied 131 place count 153 transition count 187
Applied a total of 131 rules in 38 ms. Remains 153 /249 variables (removed 96) and now considering 187/345 (removed 158) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 153/249 places, 187/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 21 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 8 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 187 transitions.
Finished random walk after 98 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=32 )
FORMULA NoC3x3-PT-4A-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 137 edges and 249 vertex of which 73 / 249 are part of one of the 32 SCC in 1 ms
Free SCC test removed 41 places
Ensure Unique test removed 81 transitions
Reduce isomorphic transitions removed 81 transitions.
Graph (complete) has 733 edges and 208 vertex of which 207 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 41 rules applied. Total rules applied 43 place count 197 transition count 231
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 1 with 24 rules applied. Total rules applied 67 place count 173 transition count 231
Discarding 20 places :
Symmetric choice reduction at 2 with 20 rule applications. Total rules 87 place count 153 transition count 211
Iterating global reduction 2 with 20 rules applied. Total rules applied 107 place count 153 transition count 211
Drop transitions removed 24 transitions
Redundant transition composition rules discarded 24 transitions
Iterating global reduction 2 with 24 rules applied. Total rules applied 131 place count 153 transition count 187
Applied a total of 131 rules in 35 ms. Remains 153 /249 variables (removed 96) and now considering 187/345 (removed 158) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 153/249 places, 187/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 7 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 8 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 187 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 19 places :
Symmetric choice reduction at 1 with 19 rule applications. Total rules 20 place count 229 transition count 326
Iterating global reduction 1 with 19 rules applied. Total rules applied 39 place count 229 transition count 326
Applied a total of 39 rules in 9 ms. Remains 229 /249 variables (removed 20) and now considering 326/345 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 229/249 places, 326/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 15 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 326 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 18 places :
Symmetric choice reduction at 1 with 18 rule applications. Total rules 19 place count 230 transition count 327
Iterating global reduction 1 with 18 rules applied. Total rules applied 37 place count 230 transition count 327
Applied a total of 37 rules in 10 ms. Remains 230 /249 variables (removed 19) and now considering 327/345 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 230/249 places, 327/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 16 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 16 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 327 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 21 place count 228 transition count 325
Iterating global reduction 1 with 20 rules applied. Total rules applied 41 place count 228 transition count 325
Applied a total of 41 rules in 10 ms. Remains 228 /249 variables (removed 21) and now considering 325/345 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 228/249 places, 325/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 15 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 325 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Graph (trivial) has 91 edges and 249 vertex of which 45 / 249 are part of one of the 20 SCC in 0 ms
Free SCC test removed 25 places
Ensure Unique test removed 49 transitions
Reduce isomorphic transitions removed 49 transitions.
Graph (complete) has 765 edges and 224 vertex of which 223 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.2 ms
Discarding 1 places :
Also discarding 0 output transitions
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 19 place count 206 transition count 279
Iterating global reduction 0 with 17 rules applied. Total rules applied 36 place count 206 transition count 279
Drop transitions removed 13 transitions
Redundant transition composition rules discarded 13 transitions
Iterating global reduction 0 with 13 rules applied. Total rules applied 49 place count 206 transition count 266
Applied a total of 49 rules in 36 ms. Remains 206 /249 variables (removed 43) and now considering 266/345 (removed 79) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 206/249 places, 266/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 12 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 12 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 266 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 17 places :
Symmetric choice reduction at 1 with 17 rule applications. Total rules 18 place count 231 transition count 328
Iterating global reduction 1 with 17 rules applied. Total rules applied 35 place count 231 transition count 328
Applied a total of 35 rules in 9 ms. Remains 231 /249 variables (removed 18) and now considering 328/345 (removed 17) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 231/249 places, 328/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 328 transitions.
Starting structural reductions in LTL mode, iteration 0 : 249/249 places, 345/345 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 248 transition count 345
Discarding 20 places :
Symmetric choice reduction at 1 with 20 rule applications. Total rules 21 place count 228 transition count 325
Iterating global reduction 1 with 20 rules applied. Total rules applied 41 place count 228 transition count 325
Applied a total of 41 rules in 8 ms. Remains 228 /249 variables (removed 21) and now considering 325/345 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 228/249 places, 325/345 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 13 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 13 ms
[2023-03-14 01:09:57] [INFO ] Input system was already deterministic with 325 transitions.
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 13 ms
[2023-03-14 01:09:57] [INFO ] Flatten gal took : 14 ms
[2023-03-14 01:09:57] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-14 01:09:57] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 249 places, 345 transitions and 1155 arcs took 3 ms.
Total runtime 5973 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT NoC3x3-PT-4A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA NoC3x3-PT-4A-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-4A-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678756434519

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 58 (type EXCL) for 23 NoC3x3-PT-4A-CTLFireability-05
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 58 (type EXCL) for NoC3x3-PT-4A-CTLFireability-05
lola: result : false
lola: markings : 78
lola: fired transitions : 171
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 29 NoC3x3-PT-4A-CTLFireability-07
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 12 NoC3x3-PT-4A-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 12 NoC3x3-PT-4A-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 72 (type SRCH) for 12 NoC3x3-PT-4A-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: FINISHED task # 32 (type EXCL) for NoC3x3-PT-4A-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/373/CTLFireability-70.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:813

lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 55 (type EXCL) for 54 NoC3x3-PT-4A-CTLFireability-15
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type FNDP) for NoC3x3-PT-4A-CTLFireability-04
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for NoC3x3-PT-4A-CTLFireability-04 (obsolete)
lola: CANCELED task # 72 (type SRCH) for NoC3x3-PT-4A-CTLFireability-04 (obsolete)
lola: LAUNCH task # 62 (type FNDP) for 26 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 26 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 26 NoC3x3-PT-4A-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SRCH) for NoC3x3-PT-4A-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: FINISHED task # 66 (type SRCH) for NoC3x3-PT-4A-CTLFireability-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 70 (type EQUN) for NoC3x3-PT-4A-CTLFireability-04
lola: result : true
lola: FINISHED task # 62 (type FNDP) for NoC3x3-PT-4A-CTLFireability-06
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for NoC3x3-PT-4A-CTLFireability-06 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
sara: try reading problem file /home/mcc/execution/373/CTLFireability-63.sara.
lola: FINISHED task # 55 (type EXCL) for NoC3x3-PT-4A-CTLFireability-15
lola: result : true
lola: markings : 2666
lola: fired transitions : 10130
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 NoC3x3-PT-4A-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 63 (type EQUN) for NoC3x3-PT-4A-CTLFireability-06
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-04: CONJ false findpath
NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 5/327 6/32 NoC3x3-PT-4A-CTLFireability-14 1263454 m, 252690 m/sec, 2281907 t fired, .

Time elapsed: 6 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-04: CONJ false findpath
NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-4A-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-07: DISJ 0 1 0 0 3 0 0 0
NoC3x3-PT-4A-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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49 CTL EXCL 25/3409 21/32 NoC3x3-PT-4A-CTLFireability-13 4382854 m, 173455 m/sec, 14712385 t fired, .

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NoC3x3-PT-4A-CTLFireability-00: CTL true CTL model checker
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NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

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NoC3x3-PT-4A-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-4A-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-4A-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

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49 CTL EXCL 30/3409 24/32 NoC3x3-PT-4A-CTLFireability-13 5244826 m, 172394 m/sec, 17614065 t fired, .

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NoC3x3-PT-4A-CTLFireability-00: CTL true CTL model checker
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NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
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NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

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49 CTL EXCL 35/3409 28/32 NoC3x3-PT-4A-CTLFireability-13 6074851 m, 166005 m/sec, 20409600 t fired, .

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NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

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49 CTL EXCL 40/3409 32/32 NoC3x3-PT-4A-CTLFireability-13 6908680 m, 166765 m/sec, 23211569 t fired, .

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NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-4A-CTLFireability-00: CTL true CTL model checker
NoC3x3-PT-4A-CTLFireability-01: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-02: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-03: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-04: CONJ false findpath
NoC3x3-PT-4A-CTLFireability-05: SP ECTL true LTL model checker
NoC3x3-PT-4A-CTLFireability-06: AG false findpath
NoC3x3-PT-4A-CTLFireability-07: DISJ false DISJ
NoC3x3-PT-4A-CTLFireability-09: EFEG true state space /EFEG
NoC3x3-PT-4A-CTLFireability-10: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-11: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-4A-CTLFireability-13: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-14: CTL unknown AGGR
NoC3x3-PT-4A-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-4A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is NoC3x3-PT-4A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538000274"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-4A.tgz
mv NoC3x3-PT-4A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;