MCC'2023- Execution of r262-smll-167863537600634

About the Execution of LoLA for Peterson-PT-6

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16218.539	1342821.00	6165911.00	15423.90	F?TF???????????T	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-inpu
Waiting for the VM to be
................................
==========
Generated by BenchKit 2-5348
Executing tool lola
Input is Peterson-PT-6,
Time confinement is
Memory confinement
Number of cores is 4
Run identifier is r262-smll-
================================

--------------------
preparation of the directory
/home/mcc/execution
total 7.0M
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 877K Mar

--------------------
content from stdout:

=== Data for post analysis

The expected result is
BOOL_VECTOR

here is the order used
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi
FORMULA_NAME Peterson-PT-6-CTLFi

=== Now, execution of the

BK_START 1679014116053

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/b
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-PT-6
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Peterson-PT-6
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKi
current directory: /home/mcc/exe
CTLFireability

FORMULA Peterson-PT-6-CTLFireability-15

FORMULA Peterson-PT-6-CTLFireability-03

FORMULA Peterson-PT-6-CTLFireability-02

FORMULA Peterson-PT-6-CTLFireability-00

BK_STOP 1679015458874
TIME LIMIT: Killed
MemTotal: 16393232 kB
MemFree: 5262084 kB
After kill :
MemTotal: 16393232 kB
MemFree: 5257224 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 54
lola: time limit : 153 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 73
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 75
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 78
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 72
lola: time limit :
lola: memory limit: 5 pages
sara: try reading problem
sara: place or transition
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 3/153
72 EF FNDP 3/1688
73 EF FNDP 3/1688
75 EF STEQ 3/3379

Time elapsed: 221 secs.
# running tasks: 4 of 4
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
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lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 8/153
72 EF FNDP 8/1687
73 EF FNDP 8/1687
75 EF STEQ 8/3378

Time elapsed: 226 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 13/153
72 EF FNDP 13/1683
73 EF FNDP 13/1683
75 EF STEQ 13/3374

Time elapsed: 231 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 18/153
72 EF FNDP 18/1678
73 EF FNDP 18/1678
75 EF STEQ 18/3369

Time elapsed: 236 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 23/153
72 EF FNDP 23/1673
73 EF FNDP 23/1673
75 EF STEQ 23/3364

Time elapsed: 241 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 28/153
72 EF FNDP 28/1668
73 EF FNDP 28/1668
75 EF STEQ 28/3359

Time elapsed: 246 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 33/153
72 EF FNDP 33/1663
73 EF FNDP 33/1663
75 EF STEQ 33/3354

Time elapsed: 251 secs.
# running tasks: 4 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-6-CTLFireability-00:
Peterson-PT-6-CTLFireability-01:
Peterson-PT-6-CTLFireability-02:
Peterson-PT-6-CTLFireability-03:
Peterson-PT-6-CTLFireability-04:
Peterson-PT-6-CTLFireability-05:
Peterson-PT-6-CTLFireability-06:
Peterson-PT-6-CTLFireability-07:
Peterson-PT-6-CTLFireability-08:
Peterson-PT-6-CTLFireability-09:
Peterson-PT-6-CTLFireability-10:
Peterson-PT-6-CTLFireability-11:
Peterson-PT-6-CTLFireability-12:
Peterson-PT-6-CTLFireability-13:
Peterson-PT-6-CTLFireability-14:
Peterson-PT-6-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
54 CTL EXCL 38/153
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lola: memory limit: 32 pages
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=========================================================== examination is CTLFireability 3600 seconds is 16384 MBytes 167863537600634 ===================================== to be used: 204K Feb 25 22:30 CTLCardinality.txt 847K Feb 25 22:30 CTLCardinality.xml 215K Feb 25 22:22 CTLFireability.txt 986K Feb 25 22:22 CTLFireability.xml 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml 124K Feb 25 16:31 LTLCardinality.txt 364K Feb 25 16:31 LTLCardinality.xml 82K Feb 25 16:31 LTLFireability.txt 288K Feb 25 16:31 LTLFireability.xml 402K Feb 25 22:59 ReachabilityCardinality.txt 1.6M Feb 25 22:59 ReachabilityCardinality.xml 198K Feb 25 22:47 ReachabilityFireability.txt 839K Feb 25 22:47 ReachabilityFireability.xml 20K Feb 25 16:31 UpperBounds.txt 44K Feb 25 16:31 UpperBounds.xml 5 Mar 5 18:23 equiv_col 2 Mar 5 18:23 instance 6 Mar 5 18:23 iscolored 5 18:23 model.pnml generated by BenchKit (invocation template) a vector of booleans to build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N in/ t/bin//../lola/bin/ cution TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT by timeout after 3600 seconds (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:253 formula_rewrite.k:553 formula_rewrite.k:553 formula_rewrite.k:553 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:299 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:299 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:314 formula_rewrite.k:299 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:299 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:317 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:469 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:299 formula_rewrite.k:457 formula_rewrite.k:544 formula_rewrite.k:388 formula_rewrite.k:250 formula_rewrite.k:314 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:445 formula_rewrite.k:448 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:317 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:299 formula_rewrite.k:299 formula_rewrite.k:250 formula_rewrite.k:250 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:340 formula_rewrite.k:299 formula_rewrite.k:299 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:253 formula_rewrite.k:472 formula_rewrite.k:448 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:472 formula_rewrite.k:454 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:253 formula_rewrite.k:547 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:547 formula_rewrite.k:400 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 1.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed in 0.000000 secs. in 1.000000 secs. formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:811 formula_rewrite.k:806 (type EXCL) for 53 Peterson-PT-6-CTLFireability-11 formula_rewrite.k:814 formula_rewrite.k:814 formula_rewrite.k:814 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 formula_rewrite.k:711 (type FNDP) for 6 Peterson-PT-6-CTLFireability-02 32000000 sec (type EQUN) for 6 Peterson-PT-6-CTLFireability-02 32000000 sec (type SRCH) for 6 Peterson-PT-6-CTLFireability-02 32000000 sec formula_rewrite.k:711 78 (type SRCH) for Peterson-PT-6-CTLFireability-02 : unknown 0.000000 1 (type FNDP) for 56 Peterson-PT-6-CTLFireability-12 32000000 sec file /home/mcc/execution/CTLFireability-75.sara. ordering is non-deterministic formula_rewrite.k:815 formula_rewrite.k:806 formula_rewrite.k:807 formula_rewrite.k:813 formula_rewrite.k:807 formula_rewrite.k:810 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:810 formula_rewrite.k:808 formula_rewrite.k:810 formula_rewrite.k:815 formula_rewrite.k:814 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:812 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:814 formula_rewrite.k:811 formula_rewrite.k:813 formula_rewrite.k:809 formula_rewrite.k:807 formula_rewrite.k:808 formula_rewrite.k:811 formula_rewrite.k:806 formula_rewrite.k:812 formula_rewrite.k:806 formula_rewrite.k:814 formula_rewrite.k:808 formula_rewrite.k:813 formula_rewrite.k:810 formula_rewrite.k:812 formula_rewrite.k:806 formula_rewrite.k:811 formula_rewrite.k:809 formula_rewrite.k:807 formula_rewrite.k:809 formula_rewrite.k:813 formula_rewrite.k:809 formula_rewrite.k:813 formula_rewrite.k:806 formula_rewrite.k:809 formula_rewrite.k:814 formula_rewrite.k:807 formula_rewrite.k:811 formula_rewrite.k:806 formula_rewrite.k:807 formula_rewrite.k:813 formula_rewrite.k:807 formula_rewrite.k:810 formula_rewrite.k:812 formula_rewrite.k:809 formula_rewrite.k:813 formula_rewrite.k:811 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:811 formula_rewrite.k:808 formula_rewrite.k:811 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 3 2 0 7 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 Peterson-PT-6-CTLFireability-11 69803 m, 13960 m/sec, 554385 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31151 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 35889 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 2 Visible: 16 formula_rewrite.k:811 formula_rewrite.k:812 formula_rewrite.k:806 formula_rewrite.k:806 formula_rewrite.k:807 formula_rewrite.k:812 formula_rewrite.k:806 formula_rewrite.k:811 formula_rewrite.k:806 formula_rewrite.k:814 formula_rewrite.k:808 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:808 formula_rewrite.k:811 formula_rewrite.k:806 formula_rewrite.k:806 formula_rewrite.k:815 formula_rewrite.k:807 formula_rewrite.k:813 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:807 formula_rewrite.k:808 formula_rewrite.k:809 formula_rewrite.k:806 formula_rewrite.k:807 formula_rewrite.k:812 formula_rewrite.k:814 formula_rewrite.k:808 formula_rewrite.k:812 formula_rewrite.k:809 formula_rewrite.k:814 formula_rewrite.k:807 formula_rewrite.k:807 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-6-CTLFireability-11 413044 m, 68648 m/sec, 3282319 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 174384 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 171782 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 3 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-6-CTLFireability-11 767235 m, 70838 m/sec, 6135946 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 321547 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 318615 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 5 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-6-CTLFireability-11 1125218 m, 71596 m/sec, 8986781 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 469345 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 465903 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 6 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-11 1476032 m, 70162 m/sec, 11801972 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 617026 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 612819 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 8 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-11 1782598 m, 61313 m/sec, 14250167 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 766319 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 741012 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 10 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-11 2130109 m, 69502 m/sec, 17029382 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 913696 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 887444 t fired, 1 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 12 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-11 2477204 m, 69419 m/sec, 19799793 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1061132 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1034114 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 14 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-11 2821683 m, 68895 m/sec, 22563655 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1209105 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1180682 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 15 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-11 3168384 m, 69340 m/sec, 25345625 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1357137 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1326959 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 17 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-11 3506051 m, 67533 m/sec, 28047476 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1505143 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1473155 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 19 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-11 3844328 m, 67655 m/sec, 30753865 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1653083 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1619714 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 21 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-11 4186246 m, 68383 m/sec, 33472620 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1801497 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1765944 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 23 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-11 4529620 m, 68674 m/sec, 36226160 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 1950071 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 1912110 t fired, 2 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 24 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-11 4869029 m, 67881 m/sec, 38940628 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2098566 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2058602 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 26 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-11 5204431 m, 67080 m/sec, 41623808 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2246902 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2205760 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 28 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-11 5534967 m, 66107 m/sec, 44278877 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2395176 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2353035 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 30 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-11 5872653 m, 67537 m/sec, 46975913 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2543248 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2500057 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 31 Visible: 16 54 (type EXCL) for Peterson-PT-6-CTLFireability-11 (memory limit exceeded) VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 2691263 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2645721 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 69 Peterson-PT-6-CTLFireability-15 70 (type EXCL) for Peterson-PT-6-CTLFireability-15 : true 34 68 0.000000 1 (type EXCL) for 62 Peterson-PT-6-CTLFireability-14 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-6-CTLFireability-14 296958 m, 59391 m/sec, 783184 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2833660 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2789987 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-6-CTLFireability-14 575768 m, 55762 m/sec, 1582934 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 2982755 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 2934473 t fired, 3 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-6-CTLFireability-14 834089 m, 51664 m/sec, 2392812 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3131805 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3077951 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-14 1000622 m, 33306 m/sec, 3330295 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3281174 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3221028 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-6-CTLFireability-14 1101418 m, 20159 m/sec, 4146349 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3432626 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3366601 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-14 1222791 m, 24274 m/sec, 5119089 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3581402 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3510020 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-6-CTLFireability-14 1345047 m, 24451 m/sec, 6111723 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3729250 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3652689 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-14 1468236 m, 24637 m/sec, 7112371 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 3877292 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3795312 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-6-CTLFireability-14 1591846 m, 24722 m/sec, 8102670 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4025491 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 3938281 t fired, 4 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-14 1708976 m, 23426 m/sec, 9017869 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4174247 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4070225 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-14 1830466 m, 24298 m/sec, 10008219 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4321738 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4210635 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-14 1951700 m, 24246 m/sec, 10984284 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4468962 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4353531 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-14 2071552 m, 23970 m/sec, 11939573 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4615832 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4496257 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-14 2196998 m, 25089 m/sec, 12911935 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4763172 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4639224 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-14 2318196 m, 24239 m/sec, 13911255 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 4910773 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4782363 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-14 2444748 m, 25310 m/sec, 14904399 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5058963 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 4925920 t fired, 5 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-14 2563998 m, 23850 m/sec, 15882813 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5207583 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5069482 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-14 2684973 m, 24195 m/sec, 16846452 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5355849 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5212804 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-14 2806914 m, 24388 m/sec, 17826606 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5504173 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5356265 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-14 2930045 m, 24626 m/sec, 18812516 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5652477 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5499579 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-14 3053838 m, 24758 m/sec, 19799043 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5801249 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5643225 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-14 3173836 m, 23999 m/sec, 20761568 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 5948577 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5786751 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-14 3291363 m, 23505 m/sec, 21703003 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6075309 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 5929910 t fired, 6 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-14 3395539 m, 20835 m/sec, 22531704 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6213707 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6059305 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-6-CTLFireability-14 3511214 m, 23135 m/sec, 23456428 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6360138 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6201376 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-14 3624049 m, 22567 m/sec, 24364451 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6497628 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6334157 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-6-CTLFireability-14 3734002 m, 21990 m/sec, 25232585 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6639207 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6473761 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-14 3848749 m, 22949 m/sec, 26160122 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6780505 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6611268 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-14 3963436 m, 22937 m/sec, 27075886 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 6922266 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6747000 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-14 4078876 m, 23088 m/sec, 27993679 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7066488 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 6882367 t fired, 7 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 1 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-6-CTLFireability-14 4193176 m, 22860 m/sec, 28915623 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7209735 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7026655 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 65 (type EXCL) for Peterson-PT-6-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 7355581 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7161670 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 59 Peterson-PT-6-CTLFireability-13 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-13 477321 m, 95464 m/sec, 949292 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7500868 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7302990 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-6-CTLFireability-13 867163 m, 77968 m/sec, 1950987 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7647302 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7447283 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-13 1206615 m, 67890 m/sec, 2925327 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7792110 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7590886 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-13 1510077 m, 60692 m/sec, 3906632 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 7938218 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7730465 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-13 1801373 m, 58259 m/sec, 4879941 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8086190 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 7872251 t fired, 8 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-13 2096609 m, 59047 m/sec, 5793775 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8229046 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8002629 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-13 2347340 m, 50146 m/sec, 6775670 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8373947 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8136243 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-13 2563084 m, 43148 m/sec, 7718440 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8516999 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8271611 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-13 2824421 m, 52267 m/sec, 8641088 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8661536 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8411594 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-13 3074699 m, 50055 m/sec, 9566730 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8799591 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8547260 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-13 3337119 m, 52484 m/sec, 10457652 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 8941125 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8683668 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-6-CTLFireability-13 3573848 m, 47345 m/sec, 11380163 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9082088 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8821215 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 6 2 0 7 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 3 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-6-CTLFireability-13 3806063 m, 46443 m/sec, 12383135 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9225952 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 8959807 t fired, 9 attempts, . 0/5 Peterson-PT-6-CTLFireability-02 sara is running. Pages in use: 32 Visible: 16 73 (type FNDP) for Peterson-PT-6-CTLFireability-02 : true 9000008 10 : 320.000000 0 75 (type EQUN) for Peterson-PT-6-CTLFireability-02 (obsolete) (type EQUN) for 56 Peterson-PT-6-CTLFireability-12 32000000 sec (type SRCH) for 56 Peterson-PT-6-CTLFireability-12 32000000 sec formula_rewrite.k:711 79 (type SRCH) for Peterson-PT-6-CTLFireability-12 : unknown 0.000000 1 75 (type EQUN) for Peterson-PT-6-CTLFireability-02 : unknown file /home/mcc/execution/CTLFireability-74.sara. ordering is non-deterministic VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-13 4184202 m, 75627 m/sec, 13327732 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9366217 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 60 (type EXCL) for Peterson-PT-6-CTLFireability-13 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 9520396 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 50 Peterson-PT-6-CTLFireability-10 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Peterson-PT-6-CTLFireability-10 142466 m, 28493 m/sec, 509204 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9670534 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-6-CTLFireability-10 283803 m, 28267 m/sec, 1019666 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9819607 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-10 422027 m, 27644 m/sec, 1538618 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 9969005 t fired, 10 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-6-CTLFireability-10 559750 m, 27544 m/sec, 2072261 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10116282 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-6-CTLFireability-10 695551 m, 27160 m/sec, 2621878 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10273219 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-6-CTLFireability-10 828780 m, 26645 m/sec, 3176588 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10429995 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-10 944555 m, 23155 m/sec, 3828627 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10586758 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-10 1022936 m, 15676 m/sec, 4552244 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10742462 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-6-CTLFireability-10 1103136 m, 16040 m/sec, 5276859 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 10898255 t fired, 11 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-6-CTLFireability-10 1177188 m, 14810 m/sec, 5935143 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11052867 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-10 1262440 m, 17050 m/sec, 6725763 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11209065 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-6-CTLFireability-10 1350093 m, 17530 m/sec, 7510727 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11365657 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-10 1436486 m, 17278 m/sec, 8292735 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11522152 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-10 1526375 m, 17977 m/sec, 9063095 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11678855 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-6-CTLFireability-10 1611862 m, 17097 m/sec, 9865891 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11835488 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-10 1692849 m, 16197 m/sec, 10597316 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 11986261 t fired, 12 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-10 1778189 m, 17068 m/sec, 11359900 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12135405 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-10 1859017 m, 16165 m/sec, 12066878 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12288627 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-10 1941148 m, 16426 m/sec, 12855178 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12445106 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-10 2026334 m, 17037 m/sec, 13620427 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12601621 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-10 2112865 m, 17306 m/sec, 14394046 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12758158 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-10 2200875 m, 17602 m/sec, 15166010 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 12914563 t fired, 13 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-10 2288367 m, 17498 m/sec, 15953950 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13071300 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-10 2373310 m, 16988 m/sec, 16744040 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13228355 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-10 2460788 m, 17495 m/sec, 17523882 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13385429 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-10 2546821 m, 17206 m/sec, 18305675 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13542384 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-10 2632220 m, 17079 m/sec, 19075162 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13699589 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-10 2719347 m, 17425 m/sec, 19857895 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 13856696 t fired, 14 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-10 2805785 m, 17287 m/sec, 20634498 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14013823 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-10 2893281 m, 17499 m/sec, 21419234 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14168631 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 of lp_solve (at job 7266) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-10 2981647 m, 17673 m/sec, 22218963 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14322956 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-10 3068574 m, 17385 m/sec, 23001132 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14477592 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-10 3154032 m, 17091 m/sec, 23770909 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14632030 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-10 3238873 m, 16968 m/sec, 24533938 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14774263 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-10 3324918 m, 17209 m/sec, 25285937 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 14927687 t fired, 15 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 51 (type EXCL) for Peterson-PT-6-CTLFireability-10 (local timeout) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 1 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 15071060 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 47 Peterson-PT-6-CTLFireability-09 (type EXCL) for 50 Peterson-PT-6-CTLFireability-10 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-09 482884 m, 96576 m/sec, 870806 t fired, . 2/5 Peterson-PT-6-CTLFireability-10 143232 m, -636337 m/sec, 511899 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15224216 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-6-CTLFireability-09 896577 m, 82738 m/sec, 1783928 t fired, . 3/5 Peterson-PT-6-CTLFireability-10 287753 m, 28904 m/sec, 1033969 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15377746 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 36 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-6-CTLFireability-09 1052926 m, 31269 m/sec, 2854785 t fired, . 4/5 Peterson-PT-6-CTLFireability-10 429047 m, 28258 m/sec, 1565994 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15531382 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 39 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-09 1185818 m, 26578 m/sec, 3873940 t fired, . 5/5 Peterson-PT-6-CTLFireability-10 567724 m, 27735 m/sec, 2103606 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15685403 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 41 Visible: 16 51 (type EXCL) for Peterson-PT-6-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-6-CTLFireability-09 1342963 m, 31429 m/sec, 4993026 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15839735 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 41 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-09 1505122 m, 32431 m/sec, 6141270 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 15993963 t fired, 16 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 41 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-6-CTLFireability-09 1670049 m, 32985 m/sec, 7294763 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16147990 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 41 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-09 1834774 m, 32945 m/sec, 8445316 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16302124 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 41 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-09 1994805 m, 32006 m/sec, 9565720 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16455651 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 42 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-09 2152393 m, 31517 m/sec, 10677377 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16609480 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 43 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-09 2315314 m, 32584 m/sec, 11811759 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16763452 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 44 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-09 2480893 m, 33115 m/sec, 12938217 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 16917369 t fired, 17 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 45 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-09 2634441 m, 30709 m/sec, 14051216 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17071309 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 47 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-09 2795579 m, 32227 m/sec, 15175703 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17225814 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 48 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-09 2957348 m, 32353 m/sec, 16302371 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17380342 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 49 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-09 3113128 m, 31156 m/sec, 17402267 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17534911 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 50 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-09 3267440 m, 30862 m/sec, 18482851 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17689283 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 51 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-09 3423442 m, 31200 m/sec, 19572752 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17843328 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 52 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-09 3580523 m, 31416 m/sec, 20664997 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 17997661 t fired, 18 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 54 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-6-CTLFireability-09 3734901 m, 30875 m/sec, 21744623 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 18151799 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 55 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-09 3896018 m, 32223 m/sec, 22872372 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 18305943 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 56 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-09 4054730 m, 31742 m/sec, 23990457 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 18459648 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 57 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-6-CTLFireability-09 4212088 m, 31471 m/sec, 25093805 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 18613075 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 48 (type EXCL) for Peterson-PT-6-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 18767935 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 (type EXCL) for 41 Peterson-PT-6-CTLFireability-07 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-07 492128 m, 98425 m/sec, 983967 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 18923409 t fired, 19 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-07 892803 m, 80135 m/sec, 2023089 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19079057 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-07 1229050 m, 67249 m/sec, 3003929 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19234076 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-07 1549459 m, 64081 m/sec, 4025694 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19390070 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-07 1852418 m, 60591 m/sec, 5016260 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19545777 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-07 2161330 m, 61782 m/sec, 6021306 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19700995 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-07 2412794 m, 50292 m/sec, 7068922 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19841050 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-07 2669749 m, 51391 m/sec, 8103657 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 19996203 t fired, 20 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-07 2928829 m, 51816 m/sec, 9050555 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 20153212 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-07 3198472 m, 53928 m/sec, 10017181 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 20310605 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-07 3462724 m, 52850 m/sec, 10879624 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 20466524 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-07 3697341 m, 46923 m/sec, 11926934 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 20623869 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-07 4010006 m, 62533 m/sec, 12907041 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 20779580 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 42 (type EXCL) for Peterson-PT-6-CTLFireability-07 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 20936170 t fired, 21 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 (type EXCL) for 38 Peterson-PT-6-CTLFireability-06 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-06 379534 m, 75906 m/sec, 857231 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21092886 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-6-CTLFireability-06 686506 m, 61394 m/sec, 1803059 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21249072 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-06 948310 m, 52360 m/sec, 2756935 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21405076 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-06 1190148 m, 48367 m/sec, 3712936 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21561076 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-06 1301300 m, 22230 m/sec, 4781818 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21717190 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-6-CTLFireability-06 1399406 m, 19621 m/sec, 5862519 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 21873326 t fired, 22 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-06 1476788 m, 15476 m/sec, 6880507 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22028388 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-06 1571215 m, 18885 m/sec, 7881194 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22182469 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-6-CTLFireability-06 1665434 m, 18843 m/sec, 8976174 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22339503 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-06 1783836 m, 23680 m/sec, 9978401 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22495433 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-06 1898503 m, 22933 m/sec, 11074255 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22652468 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-06 2008416 m, 21982 m/sec, 12087627 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22808702 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-06 2124767 m, 23270 m/sec, 13138240 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 22965606 t fired, 23 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-06 2232013 m, 21449 m/sec, 14100055 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23121354 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-06 2348335 m, 23264 m/sec, 15154600 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23265933 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-06 2468604 m, 24053 m/sec, 16218272 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23417173 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-06 2587791 m, 23837 m/sec, 17316309 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23569956 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-06 2707333 m, 23908 m/sec, 18391449 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23722744 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-06 2823265 m, 23186 m/sec, 19446878 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 23875172 t fired, 24 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-06 2944584 m, 24263 m/sec, 20526636 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24027913 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-06 3062149 m, 23513 m/sec, 21588023 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24179394 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-06 3179852 m, 23540 m/sec, 22651779 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24329502 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-06 3297279 m, 23485 m/sec, 23712878 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24481924 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-06 3411748 m, 22893 m/sec, 24747016 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24633418 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-6-CTLFireability-06 3526525 m, 22955 m/sec, 25786670 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24784591 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-06 3642608 m, 23216 m/sec, 26836452 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 24936030 t fired, 25 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-6-CTLFireability-06 3759249 m, 23328 m/sec, 27882996 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25088970 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-06 3873451 m, 22840 m/sec, 28903973 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25241206 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-06 3990513 m, 23412 m/sec, 29987434 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25392948 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-6-CTLFireability-06 4106179 m, 23133 m/sec, 31035843 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25540687 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-6-CTLFireability-06 4221035 m, 22971 m/sec, 32086007 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25681296 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 39 (type EXCL) for Peterson-PT-6-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 25834155 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 (type EXCL) for 35 Peterson-PT-6-CTLFireability-05 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-6-CTLFireability-05 255474 m, 51094 m/sec, 883516 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 25986394 t fired, 26 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-6-CTLFireability-05 493974 m, 47700 m/sec, 1754484 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26138381 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-6-CTLFireability-05 714934 m, 44192 m/sec, 2622177 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26289257 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-05 918138 m, 40640 m/sec, 3505803 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26441144 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-05 1030780 m, 22528 m/sec, 4523092 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26593432 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-6-CTLFireability-05 1142179 m, 22279 m/sec, 5533540 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26736563 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-05 1253550 m, 22274 m/sec, 6545345 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 26888905 t fired, 27 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-6-CTLFireability-05 1365749 m, 22439 m/sec, 7558694 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27031801 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-05 1481623 m, 23174 m/sec, 8583847 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27183401 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-6-CTLFireability-05 1595134 m, 22702 m/sec, 9615843 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27337137 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-05 1711610 m, 23295 m/sec, 10631865 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27488539 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-6-CTLFireability-05 1824247 m, 22527 m/sec, 11647125 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27630594 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-05 1937566 m, 22663 m/sec, 12651873 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27783230 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-6-CTLFireability-05 2049642 m, 22415 m/sec, 13643342 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 27935736 t fired, 28 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-05 2163902 m, 22852 m/sec, 14659437 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28089799 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-6-CTLFireability-05 2282040 m, 23627 m/sec, 15668116 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28240572 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-05 2392342 m, 22060 m/sec, 16677553 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28392786 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-05 2505179 m, 22567 m/sec, 17686210 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28545436 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-05 2616019 m, 22168 m/sec, 18683971 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28699222 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-6-CTLFireability-05 2729709 m, 22738 m/sec, 19692397 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 28850185 t fired, 29 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-6-CTLFireability-05 2845446 m, 23147 m/sec, 20711464 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29003107 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-05 2960974 m, 23105 m/sec, 21731532 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29155075 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-05 3074170 m, 22639 m/sec, 22734197 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29307026 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-05 3186221 m, 22410 m/sec, 23730618 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29460260 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-6-CTLFireability-05 3304269 m, 23609 m/sec, 24731381 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29613929 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-05 3412839 m, 21714 m/sec, 25724658 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29766236 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-6-CTLFireability-05 3527818 m, 22995 m/sec, 26735465 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 29919419 t fired, 30 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-05 3637644 m, 21965 m/sec, 27701156 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30069362 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-6-CTLFireability-05 3748070 m, 22085 m/sec, 28657190 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30208975 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-6-CTLFireability-05 3863855 m, 23157 m/sec, 29680177 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30352134 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-05 3978791 m, 22987 m/sec, 30685503 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30504233 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-05 4091945 m, 22630 m/sec, 31679963 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30656432 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-6-CTLFireability-05 4208388 m, 23288 m/sec, 32688570 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 30808368 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 36 (type EXCL) for Peterson-PT-6-CTLFireability-05 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 30961740 t fired, 31 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 (type EXCL) for 32 Peterson-PT-6-CTLFireability-04 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-6-CTLFireability-04 521978 m, 104395 m/sec, 1055058 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31113499 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-6-CTLFireability-04 929576 m, 81519 m/sec, 2101077 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31265041 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-6-CTLFireability-04 1269476 m, 67980 m/sec, 3155793 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31415697 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-6-CTLFireability-04 1524489 m, 51002 m/sec, 3950784 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31544083 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-6-CTLFireability-04 1833766 m, 61855 m/sec, 4964732 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31695152 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-6-CTLFireability-04 2148363 m, 62919 m/sec, 5984628 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31846280 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-6-CTLFireability-04 2408949 m, 52117 m/sec, 7046928 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 31997712 t fired, 32 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-6-CTLFireability-04 2662220 m, 50654 m/sec, 8070388 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32149682 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-6-CTLFireability-04 2942312 m, 56018 m/sec, 9088932 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32301094 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-6-CTLFireability-04 3214171 m, 54371 m/sec, 10066795 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32442159 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-6-CTLFireability-04 3491999 m, 55565 m/sec, 11020865 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32593103 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-6-CTLFireability-04 3738660 m, 49332 m/sec, 12103618 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32744318 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-6-CTLFireability-04 4116963 m, 75660 m/sec, 13161308 t fired, . 0/5 Peterson-PT-6-CTLFireability-12 32895580 t fired, 33 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 33 (type EXCL) for Peterson-PT-6-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 5 0 0 9 0 0 1 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 33047726 t fired, 34 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. Pages in use: 58 Visible: 16 (type EXCL) for 29 Peterson-PT-6-CTLFireability-03 30 (type EXCL) for Peterson-PT-6-CTLFireability-03 : false 35 35 0.000000 1 (type EXCL) for 6 Peterson-PT-6-CTLFireability-02 23 (type EXCL) for Peterson-PT-6-CTLFireability-02 : false 0.000000 1 (type EXCL) for 6 Peterson-PT-6-CTLFireability-02 21 (type EXCL) for Peterson-PT-6-CTLFireability-02 : false 7 6 0.000000 1 (type EXCL) for 6 Peterson-PT-6-CTLFireability-02 17 (type EXCL) for Peterson-PT-6-CTLFireability-02 : true 0.000000 1 (type EXCL) for 0 Peterson-PT-6-CTLFireability-00 1 (type EXCL) for Peterson-PT-6-CTLFireability-00 : false 6070 7748 0.000000 1 (type EXCL) for 56 Peterson-PT-6-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 33203053 t fired, 34 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. 1/32 Peterson-PT-6-CTLFireability-12 132728 m, 26545 m/sec, 379785 t fired, . Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 33358857 t fired, 34 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. 2/32 Peterson-PT-6-CTLFireability-12 267286 m, 26911 m/sec, 767671 t fired, . Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 33419583 t fired, 34 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. 2/32 Peterson-PT-6-CTLFireability-12 319331 m, 10409 m/sec, 918064 t fired, . Pages in use: 58 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker DISJ true DISJ CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 2 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-6-CTLFireability-12 33433481 t fired, 34 attempts, . 0/5 Peterson-PT-6-CTLFireability-12 sara is running. 2/32 Peterson-PT-6-CTLFireability-12 338740 m, 3881 m/sec, 974567 t fired, . Pages in use: 58 Visible: 16 bin//../BenchKit_head.sh: line 63: 374 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-6"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Peterson-PT-6, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537600634"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-6.tgz
mv Peterson-PT-6 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;