fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r262-smll-167863537100298
Last Updated
May 14, 2023

About the Execution of LoLA for NoC3x3-PT-5B

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2613.756 894616.00 885424.00 2338.60 ??TT??T?FFT?F?TF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r262-smll-167863537100298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is NoC3x3-PT-5B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-smll-167863537100298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 980K
-rw-r--r-- 1 mcc users 5.5K Feb 26 10:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 26 10:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 26 10:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 10:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 10:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 161K Feb 26 10:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 10:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 10:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 525K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-00
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-01
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-02
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-03
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-04
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-05
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-06
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-07
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-08
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-09
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-10
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-11
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-12
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-13
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-14
FORMULA_NAME NoC3x3-PT-5B-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678819899289

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NoC3x3-PT-5B
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT NoC3x3-PT-5B
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA NoC3x3-PT-5B-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NoC3x3-PT-5B-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678820793905

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
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lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:314
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lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
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lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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16 AGEF EXCL 3/224 2/32 NoC3x3-PT-5B-CTLFireability-05 276813 m, 55362 m/sec, 873908 t fired, .

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16 AGEF EXCL 8/224 4/32 NoC3x3-PT-5B-CTLFireability-05 661283 m, 76894 m/sec, 2596848 t fired, .

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16 AGEF EXCL 13/224 5/32 NoC3x3-PT-5B-CTLFireability-05 1030612 m, 73865 m/sec, 4324882 t fired, .

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16 AGEF EXCL 18/224 6/32 NoC3x3-PT-5B-CTLFireability-05 1338330 m, 61543 m/sec, 5962773 t fired, .

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16 AGEF EXCL 23/224 8/32 NoC3x3-PT-5B-CTLFireability-05 1598749 m, 52083 m/sec, 7617653 t fired, .

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16 AGEF EXCL 28/224 9/32 NoC3x3-PT-5B-CTLFireability-05 1910646 m, 62379 m/sec, 9289830 t fired, .

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NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-03: EFEG 0 1 0 0 1 0 0 0
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NoC3x3-PT-5B-CTLFireability-05: AGEF 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 105/716 30/32 NoC3x3-PT-5B-CTLFireability-13 5415539 m, 40611 m/sec, 35021991 t fired, .

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NoC3x3-PT-5B-CTLFireability-02: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-03: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-05: AGEF 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 110/716 31/32 NoC3x3-PT-5B-CTLFireability-13 5650357 m, 46963 m/sec, 36649259 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-5B-CTLFireability-02: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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NoC3x3-PT-5B-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-03: EFEG 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-05: AGEF 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 0 0 1 0 1 0

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lola: FINISHED task # 10 (type EXCL) for NoC3x3-PT-5B-CTLFireability-03
lola: result : true
lola: markings : 8
lola: fired transitions : 8
lola: time used : 0.000000
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lola: LAUNCH task # 49 (type EXCL) for 48 NoC3x3-PT-5B-CTLFireability-12
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lola: result : false
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lola: time limit : 2751 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-5B-CTLFireability-02: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-03: EFEG true state space /EFEG
NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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NoC3x3-PT-5B-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/2751 5/32 NoC3x3-PT-5B-CTLFireability-07 773072 m, 154614 m/sec, 1438804 t fired, .

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-03: EFEG true state space /EFEG
NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-05: AGEF 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
NoC3x3-PT-5B-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 0 0 1 0 1 0

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22 CTL EXCL 25/2751 22/32 NoC3x3-PT-5B-CTLFireability-07 3786668 m, 148295 m/sec, 7061996 t fired, .

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
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NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 0 0 1 0 1 0

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22 CTL EXCL 30/2751 25/32 NoC3x3-PT-5B-CTLFireability-07 4363089 m, 115284 m/sec, 8594826 t fired, .

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-13: EGEF 0 0 0 0 1 0 1 0

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22 CTL EXCL 40/2751 32/32 NoC3x3-PT-5B-CTLFireability-07 5649216 m, 143138 m/sec, 11519027 t fired, .

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NoC3x3-PT-5B-CTLFireability-02: CTL true CTL model checker
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NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker

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NoC3x3-PT-5B-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-05: AGEF 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-5B-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-5B-CTLFireability-00: CTL unknown AGGR
NoC3x3-PT-5B-CTLFireability-01: CTL unknown AGGR
NoC3x3-PT-5B-CTLFireability-02: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-03: EFEG true state space /EFEG
NoC3x3-PT-5B-CTLFireability-04: CTL unknown AGGR
NoC3x3-PT-5B-CTLFireability-05: AGEF unknown AGGR
NoC3x3-PT-5B-CTLFireability-06: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-07: CTL unknown AGGR
NoC3x3-PT-5B-CTLFireability-08: CONJ false CTL model checker
NoC3x3-PT-5B-CTLFireability-09: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-10: DISJ true state space / EG
NoC3x3-PT-5B-CTLFireability-11: CTL unknown AGGR
NoC3x3-PT-5B-CTLFireability-12: CTL false CTL model checker
NoC3x3-PT-5B-CTLFireability-13: EGEF unknown AGGR
NoC3x3-PT-5B-CTLFireability-14: CTL true CTL model checker
NoC3x3-PT-5B-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-5B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is NoC3x3-PT-5B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537100298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-5B.tgz
mv NoC3x3-PT-5B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;