Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r235-tall-167856421700382.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is LamportFastMutEx-COL-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r235-tall-167856421700382
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 552K
-rw-r--r-- 1 mcc users 9.5K Feb 25 13:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 105K Feb 25 13:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 13:41 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 13:41 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 121K Feb 25 13:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 13:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Feb 25 13:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 43K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678649904211

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-COL-7
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-12 19:38:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-12 19:38:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-12 19:38:25] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-12 19:38:26] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-12 19:38:26] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 710 ms
[2023-03-12 19:38:26] [INFO ] Imported 18 HL places and 17 HL transitions for a total of 264 PT places and 672.0 transition bindings in 26 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 23 ms.
Working with output stream class java.io.PrintStream
[2023-03-12 19:38:26] [INFO ] Built PT skeleton of HLPN with 18 places and 17 transitions 68 arcs in 4 ms.
[2023-03-12 19:38:26] [INFO ] Skeletonized 16 HLPN properties in 1 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-12 19:38:26] [INFO ] Flatten gal took : 14 ms
[2023-03-12 19:38:26] [INFO ] Flatten gal took : 3 ms
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-00 FALSE TECHNIQUES CPN_APPROX
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-06 TRUE TECHNIQUES CPN_APPROX
Domain [pid(8), pid(8)] of place P_wait breaks symmetries in sort pid
Symmetric sort wr.t. initial and guards and successors and join/free detected :P_bool
Arc [3:1*[$i, 1]] contains constants of sort P_bool
Transition T_setbi_2 : constants on arcs in [[3:1*[$i, 1]]] introduces in P_bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2023-03-12 19:38:26] [INFO ] Unfolded HLPN to a Petri net with 264 places and 536 transitions 2352 arcs in 23 ms.
[2023-03-12 19:38:26] [INFO ] Unfolded 16 HLPN properties in 9 ms.
Deduced a syphon composed of 45 places in 2 ms
Reduce places removed 45 places and 74 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 492 ms. (steps per millisecond=20 ) properties (out of 14) seen :4
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 124 ms. (steps per millisecond=80 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 155 ms. (steps per millisecond=64 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
[2023-03-12 19:38:28] [INFO ] Flow matrix only has 336 transitions (discarded 126 similar events)
// Phase 1: matrix 336 rows 219 cols
[2023-03-12 19:38:28] [INFO ] Computed 65 place invariants in 16 ms
[2023-03-12 19:38:28] [INFO ] [Real]Absence check using 65 positive place invariants in 14 ms returned sat
[2023-03-12 19:38:28] [INFO ] After 265ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:9
[2023-03-12 19:38:28] [INFO ] [Nat]Absence check using 65 positive place invariants in 13 ms returned sat
[2023-03-12 19:38:28] [INFO ] After 96ms SMT Verify possible using state equation in natural domain returned unsat :9 sat :1
[2023-03-12 19:38:28] [INFO ] State equation strengthened by 91 read => feed constraints.
[2023-03-12 19:38:28] [INFO ] After 29ms SMT Verify possible using 91 Read/Feed constraints in natural domain returned unsat :9 sat :1
[2023-03-12 19:38:28] [INFO ] Deduced a trap composed of 11 places in 104 ms of which 5 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 84 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 86 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 18 places in 67 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 72 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 68 ms of which 0 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 61 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 16 places in 90 ms of which 1 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Deduced a trap composed of 9 places in 60 ms of which 0 ms to minimize.
[2023-03-12 19:38:29] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 9 trap constraints in 796 ms
[2023-03-12 19:38:29] [INFO ] After 834ms SMT Verify possible using trap constraints in natural domain returned unsat :10 sat :0
[2023-03-12 19:38:29] [INFO ] After 1091ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :0
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 4032 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running LamportFastMutEx (COL), instance 7
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart

GOT IT HERE. BS
Petri model created: 18 places, 17 transitions, 68 arcs.
Final Score: 56.129
Took : 0 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-00 (reachable & potential(( (! ( ( 8 ) <= (tk(P14)) )) & ( ( ( 44 ) <= (tk(P3)) ) & ( (tk(P15)) <= (tk(P17)) ) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-01 (reachable & potential(( ( ( 77 ) <= (tk(P8)) ) & ( (tk(P1)) <= ( 100 ) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-02 (reachable & potential(( ( ( 28 ) <= (tk(P1)) ) & ( ( ( (tk(P11)) <= ( 61 ) ) & ( (! ( (tk(P7)) <= (tk(P9)) )) | (! ( (tk(P7)) <= (tk(P3)) )) ) ) & ( (! ( ( ( ( ( (tk(P6)) <= (tk(P14)) ) | ( (tk(P9)) <= ( 22 ) ) ) & ( (tk(P13)) <= ( 0 ) ) ) | ( ( ( (tk(P8)) <= ( 7 ) ) & ( (tk(P17)) <= (tk(P14)) ) ) | ( ( ( 59 ) <= (tk(P6)) ) | ( ( 85 ) <= (tk(P10)) ) ) ) ) & ( (! ( ( (tk(P15)) <= (tk(P16)) ) | ( ( 17 ) <= (tk(P2)) ) )) & ( ( (tk(P18)) <= (tk(P18)) ) & ( ( ( 55 ) <= (tk(P11)) ) & ( ( 46 ) <= (tk(P6)) ) ) ) ) )) | ( ( (tk(P18)) <= ( 8 ) ) | ( ( (! ( (tk(P3)) <= (tk(P16)) )) & ( (tk(P15)) <= (tk(P2)) ) ) & (! ( ( (tk(P14)) <= (tk(P6)) ) & (! ( ( (tk(P5)) <= (tk(P17)) ) & ( ( 78 ) <= (tk(P12)) ) )) )) ) ) ) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-03 (reachable & potential(( (tk(P4)) <= (tk(P11)) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-04 (reachable &!potential( ( (! ( ( ( ( 76 ) <= (tk(P2)) ) & ( (tk(P5)) <= (tk(P5)) ) ) | (! ( (tk(P8)) <= ( 20 ) )) )) | ( (! ( (tk(P12)) <= ( 78 ) )) & ( (tk(P10)) <= (tk(P10)) ) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-05 (reachable &!potential( ( (tk(P12)) <= ( 84 ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-06 (reachable &!potential( (! ( ( ( ( ( ( ( ( (tk(P9)) <= (tk(P12)) ) & ( (tk(P13)) <= (tk(P16)) ) ) & (! ( (tk(P13)) <= (tk(P5)) )) ) & ( (tk(P9)) <= (tk(P3)) ) ) | (! ( ( 75 ) <= (tk(P10)) )) ) | ( ( ( ( (tk(P10)) <= ( 90 ) ) & (! ( (tk(P8)) <= (tk(P7)) )) ) | ( ( ( (tk(P8)) <= (tk(P4)) ) & ( ( 99 ) <= (tk(P3)) ) ) | ( ( (tk(P12)) <= ( 89 ) ) & ( ( 57 ) <= (tk(P18)) ) ) ) ) | ( ( ( ( ( 34 ) <= (tk(P8)) ) | ( (tk(P2)) <= ( 60 ) ) ) | (! ( (tk(P16)) <= (tk(P18)) )) ) & ( (tk(P7)) <= (tk(P4)) ) ) ) ) & ( ( (tk(P14)) <= (tk(P17)) ) & ( ( (! ( ( 18 ) <= (tk(P6)) )) & (! ( (tk(P1)) <= (tk(P12)) )) ) & (! ( ( ( 58 ) <= (tk(P12)) ) | ( ( (tk(P3)) <= ( 78 ) ) | ( (tk(P5)) <= ( 88 ) ) ) )) ) ) ) & ( ( ( (! ( ( ( (tk(P3)) <= (tk(P7)) ) | ( (tk(P4)) <= (tk(P9)) ) ) | ( ( ( 97 ) <= (tk(P13)) ) | ( (tk(P6)) <= (tk(P18)) ) ) )) | ( (tk(P11)) <= ( 16 ) ) ) & ( ( (! ( (tk(P5)) <= (tk(P8)) )) & ( (tk(P18)) <= (tk(P2)) ) ) | ( (! ( (tk(P2)) <= ( 1 ) )) & ( ( ( (tk(P14)) <= (tk(P16)) ) | ( ( 62 ) <= (tk(P18)) ) ) & ( (tk(P16)) <= (tk(P14)) ) ) ) ) ) & (! ( (tk(P1)) <= ( 11 ) )) ) ))))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-07 (reachable &!potential( ( ( ( ( ( (tk(P7)) <= ( 73 ) ) | ( (tk(P4)) <= (tk(P13)) ) ) | ( ( 20 ) <= (tk(P4)) ) ) | (! ( (! ( (! ( ( 86 ) <= (tk(P13)) )) & ( ( (! ( ( 23 ) <= (tk(P10)) )) | (! ( (tk(P14)) <= ( 73 ) )) ) & ( ( ( ( 94 ) <= (tk(P12)) ) | ( ( 36 ) <= (tk(P14)) ) ) | (! ( (tk(P3)) <= ( 29 ) )) ) ) )) | ( ( (tk(P2)) <= ( 28 ) ) & ( (tk(P16)) <= (tk(P11)) ) ) )) ) | ( (tk(P8)) <= (tk(P11)) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-08 (reachable &!potential( ( (tk(P6)) <= (tk(P16)) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-09 (reachable & potential(( (tk(P3)) <= (tk(P10)) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-10 (reachable & potential((! ( (tk(P1)) <= ( 22 ) ))))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-11 (reachable &!potential( ( ( ( ( (! ( ( (tk(P16)) <= ( 55 ) ) | ( (! ( ( ( 8 ) <= (tk(P17)) ) & ( (tk(P16)) <= ( 47 ) ) )) & ( ( (tk(P13)) <= ( 69 ) ) & ( (tk(P9)) <= ( 93 ) ) ) ) )) | ( (tk(P4)) <= ( 92 ) ) ) & ( ( ( 81 ) <= (tk(P9)) ) & ( ( ( ( ( ( (tk(P18)) <= (tk(P7)) ) & ( (tk(P2)) <= ( 28 ) ) ) & ( ( ( 22 ) <= (tk(P14)) ) & ( (tk(P16)) <= (tk(P7)) ) ) ) & ( (! ( (tk(P17)) <= ( 99 ) )) | ( ( (tk(P13)) <= (tk(P1)) ) | ( (tk(P3)) <= ( 97 ) ) ) ) ) & (! ( (tk(P15)) <= (tk(P1)) )) ) | (! ( (! ( ( ( 77 ) <= (tk(P14)) ) & ( (tk(P17)) <= (tk(P15)) ) )) | ( ( ( (tk(P5)) <= (tk(P8)) ) | ( (tk(P1)) <= (tk(P7)) ) ) & ( ( (tk(P6)) <= (tk(P2)) ) | ( (tk(P16)) <= (tk(P7)) ) ) ) )) ) ) ) | ( ( ( (! ( ( (tk(P12)) <= (tk(P13)) ) & ( (! ( (tk(P15)) <= ( 53 ) )) & ( ( 79 ) <= (tk(P16)) ) ) )) & (! ( ( ( ( ( 84 ) <= (tk(P14)) ) & ( ( 42 ) <= (tk(P13)) ) ) | ( ( (tk(P5)) <= (tk(P17)) ) & ( ( 23 ) <= (tk(P4)) ) ) ) | ( ( ( (tk(P10)) <= (tk(P17)) ) & ( (tk(P8)) <= ( 43 ) ) ) & ( ( (tk(P15)) <= ( 64 ) ) & ( ( 86 ) <= (tk(P11)) ) ) ) )) ) & ( ( (tk(P14)) <= (tk(P1)) ) & ( ( ( (! ( ( 35 ) <= (tk(P10)) )) | ( ( (tk(P10)) <= (tk(P2)) ) | ( (tk(P5)) <= ( 2 ) ) ) ) | ( (! ( (tk(P10)) <= (tk(P10)) )) & ( ( (tk(P11)) <= (tk(P18)) ) & ( (tk(P16)) <= (tk(P13)) ) ) ) ) & ( ( ( (tk(P6)) <= ( 12 ) ) & ( (tk(P18)) <= ( 8 ) ) ) | ( (tk(P12)) <= (tk(P13)) ) ) ) ) ) & ( ( ( ( (tk(P12)) <= ( 5 ) ) | ( ( ( 66 ) <= (tk(P9)) ) & ( ( ( (tk(P2)) <= ( 81 ) ) & ( (tk(P3)) <= (tk(P1)) ) ) & (! ( ( 29 ) <= (tk(P15)) )) ) ) ) | ( ( (! ( ( 21 ) <= (tk(P7)) )) | (! ( (tk(P17)) <= ( 63 ) )) ) | ( (tk(P6)) <= (tk(P7)) ) ) ) & (! ( (tk(P2)) <= (tk(P12)) )) ) ) ) | ( ( (tk(P12)) <= (tk(P10)) ) & ( (tk(P7)) <= ( 90 ) ) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-12 (reachable & potential(( ( ( ( ( ( ( (! ( (tk(P15)) <= (tk(P9)) )) | ( ( ( ( 95 ) <= (tk(P17)) ) | ( (tk(P9)) <= ( 41 ) ) ) & ( (tk(P1)) <= ( 96 ) ) ) ) | ( ( (tk(P12)) <= ( 60 ) ) | ( ( 72 ) <= (tk(P15)) ) ) ) | ( ( (tk(P6)) <= (tk(P7)) ) & (! ( ( (tk(P12)) <= (tk(P4)) ) & ( ( 7 ) <= (tk(P5)) ) )) ) ) | (! ( ( ( ( ( (tk(P15)) <= (tk(P3)) ) | ( (tk(P11)) <= (tk(P15)) ) ) | ( (tk(P14)) <= (tk(P5)) ) ) | ( ( ( 84 ) <= (tk(P4)) ) | ( ( (tk(P5)) <= (tk(P5)) ) | ( (tk(P14)) <= ( 2 ) ) ) ) ) | ( ( ( ( (tk(P10)) <= ( 5 ) ) | ( (tk(P6)) <= ( 100 ) ) ) | ( ( (tk(P18)) <= (tk(P6)) ) | ( ( 11 ) <= (tk(P18)) ) ) ) & ( (tk(P3)) <= ( 93 ) ) ) )) ) | ( ( 24 ) <= (tk(P17)) ) ) | ( (! ( (! ( ( (tk(P13)) <= ( 32 ) ) & ( ( 90 ) <= (tk(P16)) ) )) | (! ( ( (tk(P1)) <= (tk(P6)) ) | ( (tk(P13)) <= (tk(P8)) ) )) )) | ( ( ( 30 ) <= (tk(P8)) ) | ( (tk(P3)) <= ( 30 ) ) ) ) ) & ( ( 18 ) <= (tk(P8)) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-13 (reachable &!potential( ( (! ( ( ( ( ( 75 ) <= (tk(P14)) ) | ( ( ( ( ( ( 63 ) <= (tk(P5)) ) & ( ( 91 ) <= (tk(P16)) ) ) | ( ( ( 80 ) <= (tk(P1)) ) & ( (tk(P14)) <= (tk(P12)) ) ) ) & (! ( ( (tk(P18)) <= ( 38 ) ) | ( (tk(P9)) <= (tk(P8)) ) )) ) & ( ( (tk(P6)) <= (tk(P5)) ) & (! ( ( (tk(P17)) <= (tk(P16)) ) | ( ( 19 ) <= (tk(P17)) ) )) ) ) ) | ( ( ( 94 ) <= (tk(P14)) ) | (! ( (tk(P2)) <= ( 49 ) )) ) ) & (! ( ( (! ( ( ( ( 30 ) <= (tk(P8)) ) & ( (tk(P17)) <= (tk(P9)) ) ) | ( (tk(P1)) <= (tk(P3)) ) )) | ( ( (tk(P14)) <= ( 64 ) ) & ( ( 29 ) <= (tk(P15)) ) ) ) & ( (! ( (! ( (tk(P1)) <= (tk(P2)) )) | ( (tk(P12)) <= (tk(P16)) ) )) & ( ( (tk(P2)) <= ( 40 ) ) & ( ( ( 34 ) <= (tk(P6)) ) & ( (tk(P7)) <= (tk(P2)) ) ) ) ) )) )) & ( ( (! ( (! ( ( (tk(P9)) <= (tk(P14)) ) | ( ( ( (tk(P1)) <= (tk(P15)) ) & ( ( 81 ) <= (tk(P17)) ) ) & ( ( (tk(P13)) <= ( 98 ) ) | ( (tk(P5)) <= ( 82 ) ) ) ) )) & ( ( (! ( ( (tk(P8)) <= ( 95 ) ) | ( ( 63 ) <= (tk(P11)) ) )) | ( ( ( (tk(P18)) <= (tk(P3)) ) & ( (tk(P6)) <= (tk(P16)) ) ) | ( (tk(P17)) <= (tk(P13)) ) ) ) | (! ( ( (tk(P4)) <= ( 37 ) ) & ( ( (tk(P18)) <= ( 81 ) ) & ( ( 43 ) <= (tk(P11)) ) ) )) ) )) | ( (! ( (tk(P8)) <= ( 13 ) )) | ( (tk(P18)) <= (tk(P13)) ) ) ) | (! ( ( 76 ) <= (tk(P11)) )) ) )))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-14 (reachable &!potential( (! ( ( ( 12 ) <= (tk(P13)) ) | (! ( (tk(P10)) <= ( 74 ) )) ))))
PROPERTY: LamportFastMutEx-COL-7-ReachabilityCardinality-15 (reachable &!potential( ( ( (tk(P18)) <= ( 48 ) ) & ( ( ( ( (! ( (! ( ( 85 ) <= (tk(P8)) )) | (! ( ( (tk(P1)) <= ( 51 ) ) | ( ( 66 ) <= (tk(P13)) ) )) )) | (! ( ( ( 41 ) <= (tk(P18)) ) | ( ( ( (tk(P7)) <= (tk(P15)) ) | ( (tk(P6)) <= (tk(P1)) ) ) & (! ( (tk(P15)) <= (tk(P11)) )) ) )) ) & ( (tk(P2)) <= ( 16 ) ) ) & ( (! ( (! ( ( ( 56 ) <= (tk(P12)) ) | ( (tk(P11)) <= ( 91 ) ) )) & (! ( ( 32 ) <= (tk(P1)) )) )) | ( (! ( (tk(P4)) <= ( 95 ) )) | ( (! ( ( ( ( 27 ) <= (tk(P18)) ) & ( ( 4 ) <= (tk(P7)) ) ) | ( ( ( 17 ) <= (tk(P14)) ) & ( (tk(P5)) <= ( 44 ) ) ) )) & (! ( (tk(P5)) <= ( 17 ) )) ) ) ) ) & ( ( ( (! ( (tk(P15)) <= ( 49 ) )) | (! ( (tk(P14)) <= ( 27 ) )) ) | ( ( ( (! ( ( (tk(P10)) <= (tk(P18)) ) & ( ( 16 ) <= (tk(P13)) ) )) | (! ( (tk(P16)) <= ( 6 ) )) ) | ( ( 16 ) <= (tk(P6)) ) ) | ( ( ( ( 47 ) <= (tk(P13)) ) & (! ( ( (tk(P10)) <= ( 52 ) ) & ( (tk(P17)) <= (tk(P3)) ) )) ) & ( ( (tk(P18)) <= (tk(P16)) ) | (! ( ( ( 49 ) <= (tk(P2)) ) & ( (tk(P14)) <= ( 68 ) ) )) ) ) ) ) | (! ( (tk(P17)) <= (tk(P1)) )) ) ) )))
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1678649911687

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
WARNING:
No initial marking given, assuming zero
within model automodel built in file model.sm near line 133

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is LamportFastMutEx-COL-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r235-tall-167856421700382"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-7.tgz
mv LamportFastMutEx-COL-7 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;