Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416700882.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is MultiCrashLeafsetExtension-PT-S24C12, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416700882
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 20M
-rw-r--r-- 1 mcc users 9.6K Feb 26 03:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 59K Feb 26 03:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 03:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 03:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.2K Feb 25 16:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 16:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 03:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 67K Feb 26 03:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 26 03:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 26 03:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 20M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-00
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-01
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-02
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-03
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-04
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-05
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-06
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-07
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-08
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-09
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-10
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-11
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-12
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-13
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-14
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679507271066

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MultiCrashLeafsetExtension-PT-S24C12
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 17:47:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 17:47:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 17:47:53] [INFO ] Load time of PNML (sax parser for PT used): 660 ms
[2023-03-22 17:47:53] [INFO ] Transformed 20612 places.
[2023-03-22 17:47:53] [INFO ] Transformed 29875 transitions.
[2023-03-22 17:47:53] [INFO ] Parsed PT model containing 20612 places and 29875 transitions and 109334 arcs in 871 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 30 ms.
Support contains 230 out of 20612 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 20612/20612 places, 29875/29875 transitions.
Reduce places removed 52 places and 0 transitions.
Iterating post reduction 0 with 52 rules applied. Total rules applied 52 place count 20560 transition count 29875
Applied a total of 52 rules in 855 ms. Remains 20560 /20612 variables (removed 52) and now considering 29875/29875 (removed 0) transitions.
[2023-03-22 17:47:54] [INFO ] Flow matrix only has 29275 transitions (discarded 600 similar events)
// Phase 1: matrix 29275 rows 20560 cols
[2023-03-22 17:47:57] [INFO ] Computed 1301 place invariants in 2918 ms
[2023-03-22 17:47:59] [INFO ] Implicit Places using invariants in 4749 ms returned []
Implicit Place search using SMT only with invariants took 4982 ms to find 0 implicit places.
[2023-03-22 17:47:59] [INFO ] Flow matrix only has 29275 transitions (discarded 600 similar events)
[2023-03-22 17:47:59] [INFO ] Invariant cache hit.
[2023-03-22 17:48:01] [INFO ] Dead Transitions using invariants and state equation in 1717 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 20560/20612 places, 29875/29875 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7563 ms. Remains : 20560/20612 places, 29875/29875 transitions.
Support contains 230 out of 20560 places after structural reductions.
[2023-03-22 17:48:02] [INFO ] Flatten gal took : 1043 ms
[2023-03-22 17:48:03] [INFO ] Flatten gal took : 759 ms
[2023-03-22 17:48:05] [INFO ] Input system was already deterministic with 29875 transitions.
Support contains 219 out of 20560 places (down from 230) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 81 resets, run finished after 984 ms. (steps per millisecond=10 ) properties (out of 101) seen :21
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 80) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 79) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 79) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=16 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 76) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 75) seen :0
Running SMT prover for 75 properties.
[2023-03-22 17:48:07] [INFO ] Flow matrix only has 29275 transitions (discarded 600 similar events)
[2023-03-22 17:48:07] [INFO ] Invariant cache hit.
[2023-03-22 17:48:27] [INFO ] [Real]Absence check using 47 positive place invariants in 268 ms returned sat
[2023-03-22 17:48:28] [INFO ] [Real]Absence check using 47 positive and 1254 generalized place invariants in 939 ms returned sat
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Error writing to Z3 solver: java.io.IOException: Stream closed...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:629)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 17:48:32] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 17:48:32] [INFO ] After 25101ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 75 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 159 out of 20560 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 6864 transitions
Trivial Post-agglo rules discarded 6864 transitions
Performed 6864 trivial Post agglomeration. Transition count delta: 6864
Iterating post reduction 0 with 6864 rules applied. Total rules applied 6864 place count 20560 transition count 23011
Reduce places removed 6864 places and 0 transitions.
Performed 312 Post agglomeration using F-continuation condition.Transition count delta: 312
Iterating post reduction 1 with 7176 rules applied. Total rules applied 14040 place count 13696 transition count 22699
Reduce places removed 312 places and 0 transitions.
Iterating post reduction 2 with 312 rules applied. Total rules applied 14352 place count 13384 transition count 22699
Performed 573 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 573 Pre rules applied. Total rules applied 14352 place count 13384 transition count 22126
Deduced a syphon composed of 573 places in 20 ms
Reduce places removed 573 places and 0 transitions.
Iterating global reduction 3 with 1146 rules applied. Total rules applied 15498 place count 12811 transition count 22126
Discarding 6550 places :
Symmetric choice reduction at 3 with 6550 rule applications. Total rules 22048 place count 6261 transition count 15576
Iterating global reduction 3 with 6550 rules applied. Total rules applied 28598 place count 6261 transition count 15576
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 28598 place count 6261 transition count 15573
Deduced a syphon composed of 3 places in 22 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 28604 place count 6258 transition count 15573
Discarding 486 places :
Symmetric choice reduction at 3 with 486 rule applications. Total rules 29090 place count 5772 transition count 9741
Iterating global reduction 3 with 486 rules applied. Total rules applied 29576 place count 5772 transition count 9741
Performed 21 Post agglomeration using F-continuation condition.Transition count delta: 21
Deduced a syphon composed of 21 places in 6 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 3 with 42 rules applied. Total rules applied 29618 place count 5751 transition count 9720
Free-agglomeration rule (complex) applied 332 times.
Iterating global reduction 3 with 332 rules applied. Total rules applied 29950 place count 5751 transition count 14635
Reduce places removed 332 places and 0 transitions.
Iterating post reduction 3 with 332 rules applied. Total rules applied 30282 place count 5419 transition count 14635
Partial Free-agglomeration rule applied 499 times.
Drop transitions removed 499 transitions
Iterating global reduction 4 with 499 rules applied. Total rules applied 30781 place count 5419 transition count 14635
Applied a total of 30781 rules in 6473 ms. Remains 5419 /20560 variables (removed 15141) and now considering 14635/29875 (removed 15240) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6474 ms. Remains : 5419/20560 places, 14635/29875 transitions.
Incomplete random walk after 10000 steps, including 132 resets, run finished after 964 ms. (steps per millisecond=10 ) properties (out of 72) seen :8
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 64) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 63) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 62) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 62) seen :0
Running SMT prover for 62 properties.
[2023-03-22 17:48:41] [INFO ] Flow matrix only has 13798 transitions (discarded 837 similar events)
// Phase 1: matrix 13798 rows 5419 cols
[2023-03-22 17:48:41] [INFO ] Computed 1301 place invariants in 437 ms
[2023-03-22 17:48:46] [INFO ] [Real]Absence check using 49 positive place invariants in 94 ms returned sat
[2023-03-22 17:48:46] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 301 ms returned sat
[2023-03-22 17:49:00] [INFO ] After 19029ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:61
[2023-03-22 17:49:05] [INFO ] [Nat]Absence check using 49 positive place invariants in 92 ms returned sat
[2023-03-22 17:49:05] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 355 ms returned sat
[2023-03-22 17:49:25] [INFO ] After 15673ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :54
[2023-03-22 17:49:25] [INFO ] State equation strengthened by 9103 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 17:49:25] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 17:49:25] [INFO ] After 25180ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :0 real:61
Fused 62 Parikh solutions to 10 different solutions.
Parikh walk visited 0 properties in 224 ms.
Support contains 108 out of 5419 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5419/5419 places, 14635/14635 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 5419 transition count 14626
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 18 place count 5410 transition count 14626
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 11 Pre rules applied. Total rules applied 18 place count 5410 transition count 14615
Deduced a syphon composed of 11 places in 11 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 40 place count 5399 transition count 14615
Discarding 13 places :
Symmetric choice reduction at 2 with 13 rule applications. Total rules 53 place count 5386 transition count 14580
Iterating global reduction 2 with 13 rules applied. Total rules applied 66 place count 5386 transition count 14580
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 66 place count 5386 transition count 14578
Deduced a syphon composed of 2 places in 8 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 70 place count 5384 transition count 14578
Free-agglomeration rule (complex) applied 7 times.
Iterating global reduction 2 with 7 rules applied. Total rules applied 77 place count 5384 transition count 14582
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 84 place count 5377 transition count 14582
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 88 place count 5373 transition count 14578
Iterating global reduction 3 with 4 rules applied. Total rules applied 92 place count 5373 transition count 14578
Partial Free-agglomeration rule applied 11 times.
Drop transitions removed 11 transitions
Iterating global reduction 3 with 11 rules applied. Total rules applied 103 place count 5373 transition count 14578
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 108 place count 5368 transition count 14573
Iterating global reduction 3 with 5 rules applied. Total rules applied 113 place count 5368 transition count 14573
Applied a total of 113 rules in 4019 ms. Remains 5368 /5419 variables (removed 51) and now considering 14573/14635 (removed 62) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 4019 ms. Remains : 5368/5419 places, 14573/14635 transitions.
Incomplete random walk after 10000 steps, including 133 resets, run finished after 939 ms. (steps per millisecond=10 ) properties (out of 55) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 51) seen :0
Interrupted probabilistic random walk after 17338 steps, run timeout after 3001 ms. (steps per millisecond=5 ) properties seen :{}
Probabilistic random walk after 17338 steps, saw 8248 distinct states, run finished after 3002 ms. (steps per millisecond=5 ) properties seen :0
Running SMT prover for 51 properties.
[2023-03-22 17:49:34] [INFO ] Flow matrix only has 13736 transitions (discarded 837 similar events)
// Phase 1: matrix 13736 rows 5368 cols
[2023-03-22 17:49:35] [INFO ] Computed 1301 place invariants in 405 ms
[2023-03-22 17:49:39] [INFO ] [Real]Absence check using 49 positive place invariants in 95 ms returned sat
[2023-03-22 17:49:39] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 343 ms returned sat
[2023-03-22 17:49:52] [INFO ] After 17454ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:51
[2023-03-22 17:49:56] [INFO ] [Nat]Absence check using 49 positive place invariants in 96 ms returned sat
[2023-03-22 17:49:56] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 310 ms returned sat
[2023-03-22 17:50:17] [INFO ] After 16988ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :50
[2023-03-22 17:50:17] [INFO ] State equation strengthened by 9092 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 17:50:17] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 17:50:17] [INFO ] After 25206ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:51
Fused 51 Parikh solutions to 9 different solutions.
Parikh walk visited 0 properties in 133 ms.
Support contains 102 out of 5368 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5368/5368 places, 14573/14573 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 5368 transition count 14571
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 5366 transition count 14571
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 4 place count 5366 transition count 14570
Deduced a syphon composed of 1 places in 8 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 6 place count 5365 transition count 14570
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 7 place count 5364 transition count 14569
Iterating global reduction 2 with 1 rules applied. Total rules applied 8 place count 5364 transition count 14569
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 8 place count 5364 transition count 14568
Deduced a syphon composed of 1 places in 8 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 10 place count 5363 transition count 14568
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 13 place count 5363 transition count 14565
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 16 place count 5360 transition count 14565
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 18 place count 5358 transition count 14563
Iterating global reduction 3 with 2 rules applied. Total rules applied 20 place count 5358 transition count 14563
Applied a total of 20 rules in 2661 ms. Remains 5358 /5368 variables (removed 10) and now considering 14563/14573 (removed 10) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2661 ms. Remains : 5358/5368 places, 14563/14573 transitions.
Successfully simplified 10 atomic propositions for a total of 16 simplifications.
[2023-03-22 17:50:21] [INFO ] Flatten gal took : 683 ms
[2023-03-22 17:50:22] [INFO ] Flatten gal took : 742 ms
[2023-03-22 17:50:23] [INFO ] Input system was already deterministic with 29875 transitions.
Support contains 146 out of 20560 places (down from 176) after GAL structural reductions.
FORMULA MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 17936 stabilizing places and 24674 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7188 transitions
Trivial Post-agglo rules discarded 7188 transitions
Performed 7188 trivial Post agglomeration. Transition count delta: 7188
Iterating post reduction 0 with 7188 rules applied. Total rules applied 7188 place count 20560 transition count 22687
Reduce places removed 7188 places and 0 transitions.
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Iterating post reduction 1 with 7200 rules applied. Total rules applied 14388 place count 13372 transition count 22675
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 14400 place count 13360 transition count 22675
Performed 599 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 599 Pre rules applied. Total rules applied 14400 place count 13360 transition count 22076
Deduced a syphon composed of 599 places in 22 ms
Reduce places removed 599 places and 0 transitions.
Iterating global reduction 3 with 1198 rules applied. Total rules applied 15598 place count 12761 transition count 22076
Discarding 6599 places :
Symmetric choice reduction at 3 with 6599 rule applications. Total rules 22197 place count 6162 transition count 15477
Iterating global reduction 3 with 6599 rules applied. Total rules applied 28796 place count 6162 transition count 15477
Performed 23 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 23 Pre rules applied. Total rules applied 28796 place count 6162 transition count 15454
Deduced a syphon composed of 23 places in 13 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 3 with 46 rules applied. Total rules applied 28842 place count 6139 transition count 15454
Discarding 549 places :
Symmetric choice reduction at 3 with 549 rule applications. Total rules 29391 place count 5590 transition count 8866
Iterating global reduction 3 with 549 rules applied. Total rules applied 29940 place count 5590 transition count 8866
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 29990 place count 5565 transition count 8841
Applied a total of 29990 rules in 4124 ms. Remains 5565 /20560 variables (removed 14995) and now considering 8841/29875 (removed 21034) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4126 ms. Remains : 5565/20560 places, 8841/29875 transitions.
[2023-03-22 17:50:28] [INFO ] Flatten gal took : 200 ms
[2023-03-22 17:50:28] [INFO ] Flatten gal took : 225 ms
[2023-03-22 17:50:28] [INFO ] Input system was already deterministic with 8841 transitions.
Finished random walk after 6307 steps, including 71 resets, run visited all 1 properties in 77 ms. (steps per millisecond=81 )
FORMULA MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 651 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 654 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:50:30] [INFO ] Flatten gal took : 653 ms
[2023-03-22 17:50:30] [INFO ] Flatten gal took : 735 ms
[2023-03-22 17:50:32] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7197 transitions
Trivial Post-agglo rules discarded 7197 transitions
Performed 7197 trivial Post agglomeration. Transition count delta: 7197
Iterating post reduction 0 with 7197 rules applied. Total rules applied 7197 place count 20560 transition count 22678
Reduce places removed 7197 places and 0 transitions.
Iterating post reduction 1 with 7197 rules applied. Total rules applied 14394 place count 13363 transition count 22678
Performed 600 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 600 Pre rules applied. Total rules applied 14394 place count 13363 transition count 22078
Deduced a syphon composed of 600 places in 22 ms
Reduce places removed 600 places and 0 transitions.
Iterating global reduction 2 with 1200 rules applied. Total rules applied 15594 place count 12763 transition count 22078
Discarding 6597 places :
Symmetric choice reduction at 2 with 6597 rule applications. Total rules 22191 place count 6166 transition count 15481
Iterating global reduction 2 with 6597 rules applied. Total rules applied 28788 place count 6166 transition count 15481
Performed 21 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 21 Pre rules applied. Total rules applied 28788 place count 6166 transition count 15460
Deduced a syphon composed of 21 places in 13 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 2 with 42 rules applied. Total rules applied 28830 place count 6145 transition count 15460
Discarding 546 places :
Symmetric choice reduction at 2 with 546 rule applications. Total rules 29376 place count 5599 transition count 8908
Iterating global reduction 2 with 546 rules applied. Total rules applied 29922 place count 5599 transition count 8908
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 2 with 50 rules applied. Total rules applied 29972 place count 5574 transition count 8883
Applied a total of 29972 rules in 3583 ms. Remains 5574 /20560 variables (removed 14986) and now considering 8883/29875 (removed 20992) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3583 ms. Remains : 5574/20560 places, 8883/29875 transitions.
[2023-03-22 17:50:35] [INFO ] Flatten gal took : 204 ms
[2023-03-22 17:50:36] [INFO ] Flatten gal took : 224 ms
[2023-03-22 17:50:36] [INFO ] Input system was already deterministic with 8883 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 626 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 627 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:50:37] [INFO ] Flatten gal took : 691 ms
[2023-03-22 17:50:38] [INFO ] Flatten gal took : 708 ms
[2023-03-22 17:50:39] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 613 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 614 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:50:41] [INFO ] Flatten gal took : 651 ms
[2023-03-22 17:50:42] [INFO ] Flatten gal took : 734 ms
[2023-03-22 17:50:43] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 612 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 612 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:50:44] [INFO ] Flatten gal took : 658 ms
[2023-03-22 17:50:45] [INFO ] Flatten gal took : 717 ms
[2023-03-22 17:50:46] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 620 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 621 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:50:47] [INFO ] Flatten gal took : 648 ms
[2023-03-22 17:50:48] [INFO ] Flatten gal took : 733 ms
[2023-03-22 17:50:49] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7185 transitions
Trivial Post-agglo rules discarded 7185 transitions
Performed 7185 trivial Post agglomeration. Transition count delta: 7185
Iterating post reduction 0 with 7185 rules applied. Total rules applied 7185 place count 20560 transition count 22690
Reduce places removed 7185 places and 0 transitions.
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Iterating post reduction 1 with 7197 rules applied. Total rules applied 14382 place count 13375 transition count 22678
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 14394 place count 13363 transition count 22678
Performed 596 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 596 Pre rules applied. Total rules applied 14394 place count 13363 transition count 22082
Deduced a syphon composed of 596 places in 22 ms
Reduce places removed 596 places and 0 transitions.
Iterating global reduction 3 with 1192 rules applied. Total rules applied 15586 place count 12767 transition count 22082
Discarding 6596 places :
Symmetric choice reduction at 3 with 6596 rule applications. Total rules 22182 place count 6171 transition count 15486
Iterating global reduction 3 with 6596 rules applied. Total rules applied 28778 place count 6171 transition count 15486
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 20 Pre rules applied. Total rules applied 28778 place count 6171 transition count 15466
Deduced a syphon composed of 20 places in 11 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 3 with 40 rules applied. Total rules applied 28818 place count 6151 transition count 15466
Discarding 543 places :
Symmetric choice reduction at 3 with 543 rule applications. Total rules 29361 place count 5608 transition count 8950
Iterating global reduction 3 with 543 rules applied. Total rules applied 29904 place count 5608 transition count 8950
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 29954 place count 5583 transition count 8925
Applied a total of 29954 rules in 3536 ms. Remains 5583 /20560 variables (removed 14977) and now considering 8925/29875 (removed 20950) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3537 ms. Remains : 5583/20560 places, 8925/29875 transitions.
[2023-03-22 17:50:53] [INFO ] Flatten gal took : 195 ms
[2023-03-22 17:50:53] [INFO ] Flatten gal took : 220 ms
[2023-03-22 17:50:54] [INFO ] Input system was already deterministic with 8925 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7188 transitions
Trivial Post-agglo rules discarded 7188 transitions
Performed 7188 trivial Post agglomeration. Transition count delta: 7188
Iterating post reduction 0 with 7188 rules applied. Total rules applied 7188 place count 20560 transition count 22687
Reduce places removed 7188 places and 0 transitions.
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Iterating post reduction 1 with 7200 rules applied. Total rules applied 14388 place count 13372 transition count 22675
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 14400 place count 13360 transition count 22675
Performed 599 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 599 Pre rules applied. Total rules applied 14400 place count 13360 transition count 22076
Deduced a syphon composed of 599 places in 22 ms
Reduce places removed 599 places and 0 transitions.
Iterating global reduction 3 with 1198 rules applied. Total rules applied 15598 place count 12761 transition count 22076
Discarding 6599 places :
Symmetric choice reduction at 3 with 6599 rule applications. Total rules 22197 place count 6162 transition count 15477
Iterating global reduction 3 with 6599 rules applied. Total rules applied 28796 place count 6162 transition count 15477
Performed 23 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 23 Pre rules applied. Total rules applied 28796 place count 6162 transition count 15454
Deduced a syphon composed of 23 places in 13 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 3 with 46 rules applied. Total rules applied 28842 place count 6139 transition count 15454
Discarding 549 places :
Symmetric choice reduction at 3 with 549 rule applications. Total rules 29391 place count 5590 transition count 8866
Iterating global reduction 3 with 549 rules applied. Total rules applied 29940 place count 5590 transition count 8866
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 29990 place count 5565 transition count 8841
Applied a total of 29990 rules in 3595 ms. Remains 5565 /20560 variables (removed 14995) and now considering 8841/29875 (removed 21034) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3595 ms. Remains : 5565/20560 places, 8841/29875 transitions.
[2023-03-22 17:50:58] [INFO ] Flatten gal took : 191 ms
[2023-03-22 17:50:58] [INFO ] Flatten gal took : 219 ms
[2023-03-22 17:50:58] [INFO ] Input system was already deterministic with 8841 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7200 transitions
Trivial Post-agglo rules discarded 7200 transitions
Performed 7200 trivial Post agglomeration. Transition count delta: 7200
Iterating post reduction 0 with 7200 rules applied. Total rules applied 7200 place count 20560 transition count 22675
Reduce places removed 7200 places and 0 transitions.
Iterating post reduction 1 with 7200 rules applied. Total rules applied 14400 place count 13360 transition count 22675
Performed 600 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 600 Pre rules applied. Total rules applied 14400 place count 13360 transition count 22075
Deduced a syphon composed of 600 places in 21 ms
Reduce places removed 600 places and 0 transitions.
Iterating global reduction 2 with 1200 rules applied. Total rules applied 15600 place count 12760 transition count 22075
Discarding 6600 places :
Symmetric choice reduction at 2 with 6600 rule applications. Total rules 22200 place count 6160 transition count 15475
Iterating global reduction 2 with 6600 rules applied. Total rules applied 28800 place count 6160 transition count 15475
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 28800 place count 6160 transition count 15451
Deduced a syphon composed of 24 places in 13 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 28848 place count 6136 transition count 15451
Discarding 549 places :
Symmetric choice reduction at 2 with 549 rule applications. Total rules 29397 place count 5587 transition count 8863
Iterating global reduction 2 with 549 rules applied. Total rules applied 29946 place count 5587 transition count 8863
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 2 with 50 rules applied. Total rules applied 29996 place count 5562 transition count 8838
Applied a total of 29996 rules in 3575 ms. Remains 5562 /20560 variables (removed 14998) and now considering 8838/29875 (removed 21037) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3575 ms. Remains : 5562/20560 places, 8838/29875 transitions.
[2023-03-22 17:51:02] [INFO ] Flatten gal took : 196 ms
[2023-03-22 17:51:02] [INFO ] Flatten gal took : 221 ms
[2023-03-22 17:51:03] [INFO ] Input system was already deterministic with 8838 transitions.
Incomplete random walk after 10000 steps, including 115 resets, run finished after 172 ms. (steps per millisecond=58 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 23311 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 23311 steps, saw 11147 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 17:51:06] [INFO ] Flow matrix only has 8238 transitions (discarded 600 similar events)
// Phase 1: matrix 8238 rows 5562 cols
[2023-03-22 17:51:06] [INFO ] Computed 1301 place invariants in 392 ms
[2023-03-22 17:51:07] [INFO ] [Real]Absence check using 49 positive place invariants in 86 ms returned sat
[2023-03-22 17:51:07] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 372 ms returned sat
[2023-03-22 17:51:16] [INFO ] After 9522ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:51:17] [INFO ] [Nat]Absence check using 49 positive place invariants in 84 ms returned sat
[2023-03-22 17:51:17] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 372 ms returned sat
[2023-03-22 17:51:25] [INFO ] After 8033ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 17:51:25] [INFO ] State equation strengthened by 3163 read => feed constraints.
[2023-03-22 17:51:28] [INFO ] After 2647ms SMT Verify possible using 3163 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 17:51:35] [INFO ] Deduced a trap composed of 826 places in 6462 ms of which 8 ms to minimize.
[2023-03-22 17:51:35] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 7214 ms
[2023-03-22 17:51:35] [INFO ] After 10281ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 459 ms.
[2023-03-22 17:51:36] [INFO ] After 19886ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 3 ms.
Support contains 2 out of 5562 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5562/5562 places, 8838/8838 transitions.
Free-agglomeration rule (complex) applied 336 times.
Iterating global reduction 0 with 336 rules applied. Total rules applied 336 place count 5562 transition count 14541
Reduce places removed 336 places and 0 transitions.
Iterating post reduction 0 with 336 rules applied. Total rules applied 672 place count 5226 transition count 14541
Applied a total of 672 rules in 1677 ms. Remains 5226 /5562 variables (removed 336) and now considering 14541/8838 (removed -5703) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1680 ms. Remains : 5226/5562 places, 14541/8838 transitions.
Finished random walk after 14960 steps, including 202 resets, run visited all 1 properties in 872 ms. (steps per millisecond=17 )
FORMULA MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 606 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 609 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:51:40] [INFO ] Flatten gal took : 648 ms
[2023-03-22 17:51:40] [INFO ] Flatten gal took : 723 ms
[2023-03-22 17:51:42] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in LTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Applied a total of 0 rules in 604 ms. Remains 20560 /20560 variables (removed 0) and now considering 29875/29875 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 606 ms. Remains : 20560/20560 places, 29875/29875 transitions.
[2023-03-22 17:51:43] [INFO ] Flatten gal took : 695 ms
[2023-03-22 17:51:44] [INFO ] Flatten gal took : 710 ms
[2023-03-22 17:51:45] [INFO ] Input system was already deterministic with 29875 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7163 transitions
Trivial Post-agglo rules discarded 7163 transitions
Performed 7163 trivial Post agglomeration. Transition count delta: 7163
Iterating post reduction 0 with 7163 rules applied. Total rules applied 7163 place count 20560 transition count 22712
Reduce places removed 7163 places and 0 transitions.
Performed 36 Post agglomeration using F-continuation condition.Transition count delta: 36
Iterating post reduction 1 with 7199 rules applied. Total rules applied 14362 place count 13397 transition count 22676
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 2 with 36 rules applied. Total rules applied 14398 place count 13361 transition count 22676
Performed 597 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 597 Pre rules applied. Total rules applied 14398 place count 13361 transition count 22079
Deduced a syphon composed of 597 places in 21 ms
Reduce places removed 597 places and 0 transitions.
Iterating global reduction 3 with 1194 rules applied. Total rules applied 15592 place count 12764 transition count 22079
Discarding 6596 places :
Symmetric choice reduction at 3 with 6596 rule applications. Total rules 22188 place count 6168 transition count 15483
Iterating global reduction 3 with 6596 rules applied. Total rules applied 28784 place count 6168 transition count 15483
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 20 Pre rules applied. Total rules applied 28784 place count 6168 transition count 15463
Deduced a syphon composed of 20 places in 13 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 3 with 40 rules applied. Total rules applied 28824 place count 6148 transition count 15463
Discarding 545 places :
Symmetric choice reduction at 3 with 545 rule applications. Total rules 29369 place count 5603 transition count 8923
Iterating global reduction 3 with 545 rules applied. Total rules applied 29914 place count 5603 transition count 8923
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 29964 place count 5578 transition count 8898
Applied a total of 29964 rules in 3637 ms. Remains 5578 /20560 variables (removed 14982) and now considering 8898/29875 (removed 20977) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3638 ms. Remains : 5578/20560 places, 8898/29875 transitions.
[2023-03-22 17:51:49] [INFO ] Flatten gal took : 194 ms
[2023-03-22 17:51:49] [INFO ] Flatten gal took : 219 ms
[2023-03-22 17:51:50] [INFO ] Input system was already deterministic with 8898 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7188 transitions
Trivial Post-agglo rules discarded 7188 transitions
Performed 7188 trivial Post agglomeration. Transition count delta: 7188
Iterating post reduction 0 with 7188 rules applied. Total rules applied 7188 place count 20560 transition count 22687
Reduce places removed 7188 places and 0 transitions.
Performed 12 Post agglomeration using F-continuation condition.Transition count delta: 12
Iterating post reduction 1 with 7200 rules applied. Total rules applied 14388 place count 13372 transition count 22675
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 14400 place count 13360 transition count 22675
Performed 599 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 599 Pre rules applied. Total rules applied 14400 place count 13360 transition count 22076
Deduced a syphon composed of 599 places in 22 ms
Reduce places removed 599 places and 0 transitions.
Iterating global reduction 3 with 1198 rules applied. Total rules applied 15598 place count 12761 transition count 22076
Discarding 6599 places :
Symmetric choice reduction at 3 with 6599 rule applications. Total rules 22197 place count 6162 transition count 15477
Iterating global reduction 3 with 6599 rules applied. Total rules applied 28796 place count 6162 transition count 15477
Performed 23 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 23 Pre rules applied. Total rules applied 28796 place count 6162 transition count 15454
Deduced a syphon composed of 23 places in 11 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 3 with 46 rules applied. Total rules applied 28842 place count 6139 transition count 15454
Discarding 548 places :
Symmetric choice reduction at 3 with 548 rule applications. Total rules 29390 place count 5591 transition count 8878
Iterating global reduction 3 with 548 rules applied. Total rules applied 29938 place count 5591 transition count 8878
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 29988 place count 5566 transition count 8853
Applied a total of 29988 rules in 3561 ms. Remains 5566 /20560 variables (removed 14994) and now considering 8853/29875 (removed 21022) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3561 ms. Remains : 5566/20560 places, 8853/29875 transitions.
[2023-03-22 17:51:53] [INFO ] Flatten gal took : 193 ms
[2023-03-22 17:51:54] [INFO ] Flatten gal took : 220 ms
[2023-03-22 17:51:54] [INFO ] Input system was already deterministic with 8853 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 20560/20560 places, 29875/29875 transitions.
Drop transitions removed 7200 transitions
Trivial Post-agglo rules discarded 7200 transitions
Performed 7200 trivial Post agglomeration. Transition count delta: 7200
Iterating post reduction 0 with 7200 rules applied. Total rules applied 7200 place count 20560 transition count 22675
Reduce places removed 7200 places and 0 transitions.
Iterating post reduction 1 with 7200 rules applied. Total rules applied 14400 place count 13360 transition count 22675
Performed 600 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 600 Pre rules applied. Total rules applied 14400 place count 13360 transition count 22075
Deduced a syphon composed of 600 places in 20 ms
Reduce places removed 600 places and 0 transitions.
Iterating global reduction 2 with 1200 rules applied. Total rules applied 15600 place count 12760 transition count 22075
Discarding 6600 places :
Symmetric choice reduction at 2 with 6600 rule applications. Total rules 22200 place count 6160 transition count 15475
Iterating global reduction 2 with 6600 rules applied. Total rules applied 28800 place count 6160 transition count 15475
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 28800 place count 6160 transition count 15451
Deduced a syphon composed of 24 places in 13 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 28848 place count 6136 transition count 15451
Discarding 550 places :
Symmetric choice reduction at 2 with 550 rule applications. Total rules 29398 place count 5586 transition count 8851
Iterating global reduction 2 with 550 rules applied. Total rules applied 29948 place count 5586 transition count 8851
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 2 with 50 rules applied. Total rules applied 29998 place count 5561 transition count 8826
Applied a total of 29998 rules in 3496 ms. Remains 5561 /20560 variables (removed 14999) and now considering 8826/29875 (removed 21049) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3496 ms. Remains : 5561/20560 places, 8826/29875 transitions.
[2023-03-22 17:51:58] [INFO ] Flatten gal took : 196 ms
[2023-03-22 17:51:58] [INFO ] Flatten gal took : 222 ms
[2023-03-22 17:51:58] [INFO ] Input system was already deterministic with 8826 transitions.
Incomplete random walk after 10000 steps, including 115 resets, run finished after 121 ms. (steps per millisecond=82 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 23603 steps, run timeout after 3001 ms. (steps per millisecond=7 ) properties seen :{}
Probabilistic random walk after 23603 steps, saw 11287 distinct states, run finished after 3001 ms. (steps per millisecond=7 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 17:52:02] [INFO ] Flow matrix only has 8226 transitions (discarded 600 similar events)
// Phase 1: matrix 8226 rows 5561 cols
[2023-03-22 17:52:02] [INFO ] Computed 1301 place invariants in 239 ms
[2023-03-22 17:52:02] [INFO ] [Real]Absence check using 49 positive place invariants in 85 ms returned sat
[2023-03-22 17:52:03] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 385 ms returned sat
[2023-03-22 17:52:09] [INFO ] After 6056ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 17:52:09] [INFO ] State equation strengthened by 3152 read => feed constraints.
[2023-03-22 17:52:10] [INFO ] After 770ms SMT Verify possible using 3152 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:52:10] [INFO ] After 7954ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:52:10] [INFO ] [Nat]Absence check using 49 positive place invariants in 84 ms returned sat
[2023-03-22 17:52:11] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 372 ms returned sat
[2023-03-22 17:52:18] [INFO ] After 6752ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 17:52:20] [INFO ] After 2378ms SMT Verify possible using 3152 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 17:52:27] [INFO ] Deduced a trap composed of 935 places in 6450 ms of which 8 ms to minimize.
[2023-03-22 17:52:28] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 7629 ms
[2023-03-22 17:52:28] [INFO ] After 10390ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 311 ms.
[2023-03-22 17:52:28] [INFO ] After 18514ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 96 ms.
Support contains 2 out of 5561 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5561/5561 places, 8826/8826 transitions.
Free-agglomeration rule (complex) applied 336 times.
Iterating global reduction 0 with 336 rules applied. Total rules applied 336 place count 5561 transition count 14540
Reduce places removed 336 places and 0 transitions.
Iterating post reduction 0 with 336 rules applied. Total rules applied 672 place count 5225 transition count 14540
Applied a total of 672 rules in 1645 ms. Remains 5225 /5561 variables (removed 336) and now considering 14540/8826 (removed -5714) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1645 ms. Remains : 5225/5561 places, 14540/8826 transitions.
Interrupted random walk after 500066 steps, including 6769 resets, run timeout after 30001 ms. (steps per millisecond=16 ) properties seen 0
Interrupted Best-First random walk after 533315 steps, including 1006 resets, run timeout after 5001 ms. (steps per millisecond=106 ) properties seen 0
Interrupted probabilistic random walk after 630667 steps, run timeout after 105001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 630667 steps, saw 273678 distinct states, run finished after 105001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 17:54:50] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
// Phase 1: matrix 13654 rows 5225 cols
[2023-03-22 17:54:50] [INFO ] Computed 1301 place invariants in 376 ms
[2023-03-22 17:54:51] [INFO ] [Real]Absence check using 49 positive place invariants in 83 ms returned sat
[2023-03-22 17:54:51] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 347 ms returned sat
[2023-03-22 17:55:00] [INFO ] After 8328ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 17:55:00] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 17:55:02] [INFO ] After 1971ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:55:02] [INFO ] After 11355ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:55:02] [INFO ] [Nat]Absence check using 49 positive place invariants in 84 ms returned sat
[2023-03-22 17:55:03] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 335 ms returned sat
[2023-03-22 17:55:11] [INFO ] After 7848ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 17:55:13] [INFO ] After 2722ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 17:55:21] [INFO ] Deduced a trap composed of 765 places in 6851 ms of which 4 ms to minimize.
[2023-03-22 17:55:32] [INFO ] Deduced a trap composed of 903 places in 7350 ms of which 6 ms to minimize.
[2023-03-22 17:55:45] [INFO ] Deduced a trap composed of 377 places in 7175 ms of which 5 ms to minimize.
[2023-03-22 17:55:46] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 32701 ms
[2023-03-22 17:55:46] [INFO ] After 35858ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 458 ms.
[2023-03-22 17:55:47] [INFO ] After 45142ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 335 ms.
Support contains 2 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 870 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 870 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 857 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
[2023-03-22 17:55:49] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 17:55:49] [INFO ] Invariant cache hit.
[2023-03-22 17:55:54] [INFO ] Implicit Places using invariants in 5221 ms returned []
Implicit Place search using SMT only with invariants took 5222 ms to find 0 implicit places.
[2023-03-22 17:55:54] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 17:55:54] [INFO ] Invariant cache hit.
[2023-03-22 17:56:03] [INFO ] Dead Transitions using invariants and state equation in 8496 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 14577 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Incomplete random walk after 100000 steps, including 1353 resets, run finished after 6666 ms. (steps per millisecond=15 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-22 17:56:09] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 17:56:09] [INFO ] Invariant cache hit.
[2023-03-22 17:56:10] [INFO ] [Real]Absence check using 49 positive place invariants in 96 ms returned sat
[2023-03-22 17:56:10] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 320 ms returned sat
[2023-03-22 17:56:17] [INFO ] After 7108ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2
[2023-03-22 17:56:17] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 17:56:19] [INFO ] After 1954ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :2
[2023-03-22 17:56:21] [INFO ] After 3623ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-22 17:56:21] [INFO ] After 11686ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-22 17:56:22] [INFO ] [Nat]Absence check using 49 positive place invariants in 78 ms returned sat
[2023-03-22 17:56:22] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 353 ms returned sat
[2023-03-22 17:56:29] [INFO ] After 6587ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-22 17:56:32] [INFO ] After 3788ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-22 17:56:40] [INFO ] Deduced a trap composed of 747 places in 7149 ms of which 6 ms to minimize.
[2023-03-22 17:56:50] [INFO ] Deduced a trap composed of 377 places in 7304 ms of which 8 ms to minimize.
[2023-03-22 17:56:52] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 18954 ms
[2023-03-22 17:56:53] [INFO ] After 24120ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 358 ms.
[2023-03-22 17:56:53] [INFO ] After 31929ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Interrupted random walk after 541213 steps, including 7326 resets, run timeout after 30001 ms. (steps per millisecond=18 ) properties seen 0
Interrupted Best-First random walk after 570618 steps, including 1076 resets, run timeout after 5001 ms. (steps per millisecond=114 ) properties seen 0
Interrupted probabilistic random walk after 634430 steps, run timeout after 105001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 634430 steps, saw 275295 distinct states, run finished after 105001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 17:59:13] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 17:59:13] [INFO ] Invariant cache hit.
[2023-03-22 17:59:14] [INFO ] [Real]Absence check using 49 positive place invariants in 78 ms returned sat
[2023-03-22 17:59:14] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 351 ms returned sat
[2023-03-22 17:59:23] [INFO ] After 9343ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 17:59:24] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 17:59:25] [INFO ] After 1962ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:59:25] [INFO ] After 12409ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 17:59:26] [INFO ] [Nat]Absence check using 49 positive place invariants in 80 ms returned sat
[2023-03-22 17:59:26] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 365 ms returned sat
[2023-03-22 17:59:34] [INFO ] After 7070ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 17:59:36] [INFO ] After 2163ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 17:59:44] [INFO ] Deduced a trap composed of 765 places in 7041 ms of which 5 ms to minimize.
[2023-03-22 17:59:53] [INFO ] Deduced a trap composed of 903 places in 7456 ms of which 6 ms to minimize.
[2023-03-22 18:00:02] [INFO ] Deduced a trap composed of 377 places in 7059 ms of which 4 ms to minimize.
[2023-03-22 18:00:09] [INFO ] Deduced a trap composed of 434 places in 6982 ms of which 5 ms to minimize.
[2023-03-22 18:00:10] [INFO ] Trap strengthening (SAT) tested/added 5/4 trap constraints in 33346 ms
[2023-03-22 18:00:10] [INFO ] After 36468ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 420 ms.
[2023-03-22 18:00:10] [INFO ] After 44955ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 281 ms.
Support contains 2 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 857 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 857 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 853 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
[2023-03-22 18:00:12] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:00:12] [INFO ] Invariant cache hit.
[2023-03-22 18:00:18] [INFO ] Implicit Places using invariants in 5090 ms returned []
Implicit Place search using SMT only with invariants took 5091 ms to find 0 implicit places.
[2023-03-22 18:00:18] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:00:18] [INFO ] Invariant cache hit.
[2023-03-22 18:00:25] [INFO ] Dead Transitions using invariants and state equation in 7847 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13794 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Incomplete random walk after 100000 steps, including 1354 resets, run finished after 6822 ms. (steps per millisecond=14 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-22 18:00:32] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:00:32] [INFO ] Invariant cache hit.
[2023-03-22 18:00:33] [INFO ] [Real]Absence check using 49 positive place invariants in 83 ms returned sat
[2023-03-22 18:00:33] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 343 ms returned sat
[2023-03-22 18:00:41] [INFO ] After 7497ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2
[2023-03-22 18:00:41] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 18:00:43] [INFO ] After 2001ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :2
[2023-03-22 18:00:44] [INFO ] After 3665ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-22 18:00:44] [INFO ] After 12133ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-22 18:00:45] [INFO ] [Nat]Absence check using 49 positive place invariants in 79 ms returned sat
[2023-03-22 18:00:45] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 361 ms returned sat
[2023-03-22 18:00:52] [INFO ] After 6591ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-22 18:00:56] [INFO ] After 3831ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-22 18:01:03] [INFO ] Deduced a trap composed of 747 places in 6893 ms of which 5 ms to minimize.
[2023-03-22 18:01:13] [INFO ] Deduced a trap composed of 377 places in 7238 ms of which 5 ms to minimize.
[2023-03-22 18:01:15] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 18553 ms
[2023-03-22 18:01:16] [INFO ] After 23773ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 362 ms.
[2023-03-22 18:01:16] [INFO ] After 31601ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Incomplete random walk after 10000 steps, including 135 resets, run finished after 535 ms. (steps per millisecond=18 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 20815 steps, run timeout after 3001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 20815 steps, saw 9807 distinct states, run finished after 3001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 18:01:20] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:01:20] [INFO ] Invariant cache hit.
[2023-03-22 18:01:20] [INFO ] [Real]Absence check using 49 positive place invariants in 81 ms returned sat
[2023-03-22 18:01:21] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 336 ms returned sat
[2023-03-22 18:01:30] [INFO ] After 8960ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 18:01:30] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 18:01:32] [INFO ] After 1991ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:01:32] [INFO ] After 12034ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:01:32] [INFO ] [Nat]Absence check using 49 positive place invariants in 82 ms returned sat
[2023-03-22 18:01:33] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 351 ms returned sat
[2023-03-22 18:01:39] [INFO ] After 6673ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:01:42] [INFO ] After 2897ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:01:50] [INFO ] Deduced a trap composed of 747 places in 6928 ms of which 5 ms to minimize.
[2023-03-22 18:01:59] [INFO ] Deduced a trap composed of 377 places in 7292 ms of which 6 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositions(AtomicReducerSR.java:365)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:253)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:669)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 18:01:59] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 18:01:59] [INFO ] After 27591ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 3 ms.
Support contains 1 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 848 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 848 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Incomplete random walk after 10000 steps, including 135 resets, run finished after 562 ms. (steps per millisecond=17 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 18 resets, run finished after 90 ms. (steps per millisecond=111 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 20420 steps, run timeout after 3001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 20420 steps, saw 9634 distinct states, run finished after 3001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 18:02:04] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:02:04] [INFO ] Invariant cache hit.
[2023-03-22 18:02:04] [INFO ] [Real]Absence check using 49 positive place invariants in 81 ms returned sat
[2023-03-22 18:02:05] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 339 ms returned sat
[2023-03-22 18:02:14] [INFO ] After 9548ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-22 18:02:14] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 18:02:16] [INFO ] After 2010ms SMT Verify possible using 9202 Read/Feed constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:02:16] [INFO ] After 12654ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:02:17] [INFO ] [Nat]Absence check using 49 positive place invariants in 78 ms returned sat
[2023-03-22 18:02:17] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 349 ms returned sat
[2023-03-22 18:02:25] [INFO ] After 7678ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:02:28] [INFO ] After 2888ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:02:35] [INFO ] Deduced a trap composed of 747 places in 6870 ms of which 6 ms to minimize.
[2023-03-22 18:02:45] [INFO ] Deduced a trap composed of 377 places in 7123 ms of which 5 ms to minimize.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineWithTraps(DeadlockTester.java:1255)
at fr.lip6.move.gal.structural.smt.DeadlockTester.refineResultsWithTraps(DeadlockTester.java:736)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:656)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositions(AtomicReducerSR.java:365)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:253)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:669)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 18:02:45] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 18:02:45] [INFO ] After 28367ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:1
Parikh walk visited 0 properties in 4 ms.
Support contains 1 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 849 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 849 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 874 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
[2023-03-22 18:02:47] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:02:47] [INFO ] Invariant cache hit.
[2023-03-22 18:02:52] [INFO ] Implicit Places using invariants in 5065 ms returned []
Implicit Place search using SMT only with invariants took 5066 ms to find 0 implicit places.
[2023-03-22 18:02:52] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:02:52] [INFO ] Invariant cache hit.
[2023-03-22 18:03:00] [INFO ] Dead Transitions using invariants and state equation in 8032 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13975 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Incomplete random walk after 10000 steps, including 135 resets, run finished after 566 ms. (steps per millisecond=17 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 18 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 20381 steps, run timeout after 3001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 20381 steps, saw 9611 distinct states, run finished after 3001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 18:03:03] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:03:03] [INFO ] Invariant cache hit.
[2023-03-22 18:03:04] [INFO ] [Real]Absence check using 49 positive place invariants in 87 ms returned sat
[2023-03-22 18:03:04] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 341 ms returned sat
[2023-03-22 18:03:04] [INFO ] After 987ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:03:05] [INFO ] [Nat]Absence check using 49 positive place invariants in 86 ms returned sat
[2023-03-22 18:03:05] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 342 ms returned sat
[2023-03-22 18:03:13] [INFO ] After 8076ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:03:13] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 18:03:16] [INFO ] After 2365ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:03:17] [INFO ] After 3323ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 715 ms.
[2023-03-22 18:03:18] [INFO ] After 13187ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 3 ms.
Support contains 1 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 857 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 857 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Incomplete random walk after 10000 steps, including 135 resets, run finished after 552 ms. (steps per millisecond=18 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 18 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 20444 steps, run timeout after 3001 ms. (steps per millisecond=6 ) properties seen :{}
Probabilistic random walk after 20444 steps, saw 9643 distinct states, run finished after 3001 ms. (steps per millisecond=6 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-22 18:03:22] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:03:22] [INFO ] Invariant cache hit.
[2023-03-22 18:03:23] [INFO ] [Real]Absence check using 49 positive place invariants in 86 ms returned sat
[2023-03-22 18:03:23] [INFO ] [Real]Absence check using 49 positive and 1252 generalized place invariants in 340 ms returned sat
[2023-03-22 18:03:23] [INFO ] After 986ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:03:24] [INFO ] [Nat]Absence check using 49 positive place invariants in 84 ms returned sat
[2023-03-22 18:03:24] [INFO ] [Nat]Absence check using 49 positive and 1252 generalized place invariants in 340 ms returned sat
[2023-03-22 18:03:33] [INFO ] After 8676ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:03:33] [INFO ] State equation strengthened by 9202 read => feed constraints.
[2023-03-22 18:03:35] [INFO ] After 2520ms SMT Verify possible using 9202 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:03:36] [INFO ] After 3541ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 750 ms.
[2023-03-22 18:03:37] [INFO ] After 14037ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 3 ms.
Support contains 1 out of 5225 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 868 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 869 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5225/5225 places, 14540/14540 transitions.
Applied a total of 0 rules in 870 ms. Remains 5225 /5225 variables (removed 0) and now considering 14540/14540 (removed 0) transitions.
[2023-03-22 18:03:39] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:03:39] [INFO ] Invariant cache hit.
[2023-03-22 18:03:44] [INFO ] Implicit Places using invariants in 5182 ms returned []
Implicit Place search using SMT only with invariants took 5193 ms to find 0 implicit places.
[2023-03-22 18:03:44] [INFO ] Flow matrix only has 13654 transitions (discarded 886 similar events)
[2023-03-22 18:03:44] [INFO ] Invariant cache hit.
[2023-03-22 18:03:52] [INFO ] Dead Transitions using invariants and state equation in 7701 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 13767 ms. Remains : 5225/5225 places, 14540/14540 transitions.
Graph (trivial) has 3629 edges and 5225 vertex of which 25 / 5225 are part of one of the 1 SCC in 7 ms
Free SCC test removed 24 places
Drop transitions removed 644 transitions
Ensure Unique test removed 842 transitions
Reduce isomorphic transitions removed 1486 transitions.
Graph (complete) has 55753 edges and 5201 vertex of which 5179 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.7 ms
Discarding 22 places :
Also discarding 0 output transitions
Ensure Unique test removed 385 places
Discarding 1 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Remove reverse transitions (loop back) rule discarded transition t7415 and 1 places that fell out of Prefix Of Interest.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 241 transitions
Trivial Post-agglo rules discarded 241 transitions
Performed 241 trivial Post agglomeration. Transition count delta: 241
Iterating post reduction 0 with 243 rules applied. Total rules applied 245 place count 4793 transition count 12811
Ensure Unique test removed 1 places
Reduce places removed 242 places and 0 transitions.
Drop transitions removed 1 transitions
Ensure Unique test removed 240 transitions
Reduce isomorphic transitions removed 241 transitions.
Drop transitions removed 240 transitions
Trivial Post-agglo rules discarded 240 transitions
Performed 240 trivial Post agglomeration. Transition count delta: 240
Iterating post reduction 1 with 723 rules applied. Total rules applied 968 place count 4551 transition count 12330
Ensure Unique test removed 1 places
Reduce places removed 241 places and 0 transitions.
Drop transitions removed 40 transitions
Ensure Unique test removed 200 transitions
Reduce isomorphic transitions removed 240 transitions.
Drop transitions removed 200 transitions
Trivial Post-agglo rules discarded 200 transitions
Performed 200 trivial Post agglomeration. Transition count delta: 200
Iterating post reduction 2 with 681 rules applied. Total rules applied 1649 place count 4310 transition count 11890
Ensure Unique test removed 40 places
Reduce places removed 240 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 198 transitions
Reduce isomorphic transitions removed 200 transitions.
Drop transitions removed 198 transitions
Trivial Post-agglo rules discarded 198 transitions
Performed 198 trivial Post agglomeration. Transition count delta: 198
Iterating post reduction 3 with 638 rules applied. Total rules applied 2287 place count 4070 transition count 11492
Ensure Unique test removed 2 places
Reduce places removed 200 places and 0 transitions.
Drop transitions removed 36 transitions
Ensure Unique test removed 162 transitions
Reduce isomorphic transitions removed 198 transitions.
Drop transitions removed 162 transitions
Trivial Post-agglo rules discarded 162 transitions
Performed 162 trivial Post agglomeration. Transition count delta: 162
Iterating post reduction 4 with 560 rules applied. Total rules applied 2847 place count 3870 transition count 11132
Ensure Unique test removed 36 places
Reduce places removed 198 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 160 transitions
Reduce isomorphic transitions removed 162 transitions.
Drop transitions removed 160 transitions
Trivial Post-agglo rules discarded 160 transitions
Performed 160 trivial Post agglomeration. Transition count delta: 160
Iterating post reduction 5 with 520 rules applied. Total rules applied 3367 place count 3672 transition count 10810
Ensure Unique test removed 2 places
Reduce places removed 162 places and 0 transitions.
Drop transitions removed 32 transitions
Ensure Unique test removed 128 transitions
Reduce isomorphic transitions removed 160 transitions.
Drop transitions removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 6 with 450 rules applied. Total rules applied 3817 place count 3510 transition count 10522
Ensure Unique test removed 32 places
Reduce places removed 160 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 126 transitions
Reduce isomorphic transitions removed 128 transitions.
Drop transitions removed 126 transitions
Trivial Post-agglo rules discarded 126 transitions
Performed 126 trivial Post agglomeration. Transition count delta: 126
Iterating post reduction 7 with 414 rules applied. Total rules applied 4231 place count 3350 transition count 10268
Ensure Unique test removed 2 places
Reduce places removed 128 places and 0 transitions.
Drop transitions removed 28 transitions
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 126 transitions.
Drop transitions removed 98 transitions
Trivial Post-agglo rules discarded 98 transitions
Performed 98 trivial Post agglomeration. Transition count delta: 98
Iterating post reduction 8 with 352 rules applied. Total rules applied 4583 place count 3222 transition count 10044
Ensure Unique test removed 28 places
Reduce places removed 126 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 96 transitions
Reduce isomorphic transitions removed 98 transitions.
Drop transitions removed 96 transitions
Trivial Post-agglo rules discarded 96 transitions
Performed 96 trivial Post agglomeration. Transition count delta: 96
Iterating post reduction 9 with 320 rules applied. Total rules applied 4903 place count 3096 transition count 9850
Ensure Unique test removed 2 places
Reduce places removed 98 places and 0 transitions.
Drop transitions removed 24 transitions
Ensure Unique test removed 72 transitions
Reduce isomorphic transitions removed 96 transitions.
Drop transitions removed 72 transitions
Trivial Post-agglo rules discarded 72 transitions
Performed 72 trivial Post agglomeration. Transition count delta: 72
Iterating post reduction 10 with 266 rules applied. Total rules applied 5169 place count 2998 transition count 9682
Ensure Unique test removed 24 places
Reduce places removed 96 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 70 transitions
Reduce isomorphic transitions removed 72 transitions.
Drop transitions removed 70 transitions
Trivial Post-agglo rules discarded 70 transitions
Performed 70 trivial Post agglomeration. Transition count delta: 70
Iterating post reduction 11 with 238 rules applied. Total rules applied 5407 place count 2902 transition count 9540
Ensure Unique test removed 2 places
Reduce places removed 72 places and 0 transitions.
Drop transitions removed 20 transitions
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 70 transitions.
Drop transitions removed 50 transitions
Trivial Post-agglo rules discarded 50 transitions
Performed 50 trivial Post agglomeration. Transition count delta: 50
Iterating post reduction 12 with 192 rules applied. Total rules applied 5599 place count 2830 transition count 9420
Ensure Unique test removed 20 places
Reduce places removed 70 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 48 transitions
Reduce isomorphic transitions removed 50 transitions.
Drop transitions removed 48 transitions
Trivial Post-agglo rules discarded 48 transitions
Performed 48 trivial Post agglomeration. Transition count delta: 48
Iterating post reduction 13 with 168 rules applied. Total rules applied 5767 place count 2760 transition count 9322
Ensure Unique test removed 2 places
Reduce places removed 50 places and 0 transitions.
Drop transitions removed 16 transitions
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 48 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 14 with 130 rules applied. Total rules applied 5897 place count 2710 transition count 9242
Ensure Unique test removed 16 places
Reduce places removed 48 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 32 transitions.
Drop transitions removed 30 transitions
Trivial Post-agglo rules discarded 30 transitions
Performed 30 trivial Post agglomeration. Transition count delta: 30
Iterating post reduction 15 with 110 rules applied. Total rules applied 6007 place count 2662 transition count 9180
Ensure Unique test removed 2 places
Reduce places removed 32 places and 0 transitions.
Drop transitions removed 12 transitions
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 30 transitions.
Drop transitions removed 18 transitions
Trivial Post-agglo rules discarded 18 transitions
Performed 18 trivial Post agglomeration. Transition count delta: 18
Iterating post reduction 16 with 80 rules applied. Total rules applied 6087 place count 2630 transition count 9132
Ensure Unique test removed 12 places
Reduce places removed 30 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 18 transitions.
Drop transitions removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 17 with 64 rules applied. Total rules applied 6151 place count 2600 transition count 9098
Ensure Unique test removed 2 places
Reduce places removed 18 places and 0 transitions.
Drop transitions removed 8 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 18 with 42 rules applied. Total rules applied 6193 place count 2582 transition count 9074
Ensure Unique test removed 8 places
Reduce places removed 16 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 19 with 30 rules applied. Total rules applied 6223 place count 2566 transition count 9060
Ensure Unique test removed 2 places
Reduce places removed 8 places and 0 transitions.
Drop transitions removed 4 transitions
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 6 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 20 with 16 rules applied. Total rules applied 6239 place count 2558 transition count 9052
Ensure Unique test removed 4 places
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 21 with 9 rules applied. Total rules applied 6248 place count 2551 transition count 9050
Ensure Unique test removed 2 places
Iterating post reduction 22 with 2 rules applied. Total rules applied 6250 place count 2549 transition count 9050
Performed 600 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 23 with 600 Pre rules applied. Total rules applied 6250 place count 2549 transition count 8450
Deduced a syphon composed of 600 places in 3 ms
Ensure Unique test removed 600 places
Reduce places removed 1200 places and 0 transitions.
Iterating global reduction 23 with 1800 rules applied. Total rules applied 8050 place count 1349 transition count 8450
Discarding 600 places :
Symmetric choice reduction at 23 with 600 rule applications. Total rules 8650 place count 749 transition count 7850
Iterating global reduction 23 with 600 rules applied. Total rules applied 9250 place count 749 transition count 7850
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 23 with 1 Pre rules applied. Total rules applied 9250 place count 749 transition count 7849
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 23 with 2 rules applied. Total rules applied 9252 place count 748 transition count 7849
Discarding 552 places :
Symmetric choice reduction at 23 with 552 rule applications. Total rules 9804 place count 196 transition count 1225
Iterating global reduction 23 with 552 rules applied. Total rules applied 10356 place count 196 transition count 1225
Ensure Unique test removed 552 transitions
Reduce isomorphic transitions removed 552 transitions.
Iterating post reduction 23 with 552 rules applied. Total rules applied 10908 place count 196 transition count 673
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 27 places and 0 transitions.
Iterating global reduction 24 with 52 rules applied. Total rules applied 10960 place count 169 transition count 648
Free-agglomeration rule (complex) applied 24 times.
Iterating global reduction 24 with 24 rules applied. Total rules applied 10984 place count 169 transition count 624
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 24 with 24 rules applied. Total rules applied 11008 place count 145 transition count 624
Discarding 22 places :
Symmetric choice reduction at 25 with 22 rule applications. Total rules 11030 place count 123 transition count 360
Ensure Unique test removed 22 places
Iterating global reduction 25 with 44 rules applied. Total rules applied 11074 place count 101 transition count 360
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 25 with 22 rules applied. Total rules applied 11096 place count 101 transition count 338
Discarding 22 places :
Symmetric choice reduction at 26 with 22 rule applications. Total rules 11118 place count 79 transition count 74
Iterating global reduction 26 with 22 rules applied. Total rules applied 11140 place count 79 transition count 74
Discarding 22 places :
Symmetric choice reduction at 26 with 22 rule applications. Total rules 11162 place count 57 transition count 52
Iterating global reduction 26 with 22 rules applied. Total rules applied 11184 place count 57 transition count 52
Applied a total of 11184 rules in 10447 ms. Remains 57 /5225 variables (removed 5168) and now considering 52/14540 (removed 14488) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 52 rows 57 cols
[2023-03-22 18:04:02] [INFO ] Computed 27 place invariants in 7 ms
[2023-03-22 18:04:02] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-22 18:04:02] [INFO ] [Real]Absence check using 3 positive and 24 generalized place invariants in 5 ms returned sat
[2023-03-22 18:04:02] [INFO ] After 36ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:04:02] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-22 18:04:02] [INFO ] [Nat]Absence check using 3 positive and 24 generalized place invariants in 4 ms returned sat
[2023-03-22 18:04:02] [INFO ] After 18ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:04:02] [INFO ] After 22ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-22 18:04:02] [INFO ] After 56ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Graph (trivial) has 3628 edges and 5225 vertex of which 25 / 5225 are part of one of the 1 SCC in 1 ms
Free SCC test removed 24 places
Drop transitions removed 644 transitions
Ensure Unique test removed 842 transitions
Reduce isomorphic transitions removed 1486 transitions.
Graph (complete) has 55753 edges and 5201 vertex of which 5179 are kept as prefixes of interest. Removing 22 places using SCC suffix rule.6 ms
Discarding 22 places :
Also discarding 0 output transitions
Ensure Unique test removed 385 places
Discarding 1 places :
Also discarding 1 output transitions
Drop transitions removed 1 transitions
Remove reverse transitions (loop back) rule discarded transition t7415 and 1 places that fell out of Prefix Of Interest.
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 241 transitions
Trivial Post-agglo rules discarded 241 transitions
Performed 241 trivial Post agglomeration. Transition count delta: 241
Iterating post reduction 0 with 243 rules applied. Total rules applied 245 place count 4793 transition count 12811
Ensure Unique test removed 1 places
Reduce places removed 242 places and 0 transitions.
Drop transitions removed 1 transitions
Ensure Unique test removed 240 transitions
Reduce isomorphic transitions removed 241 transitions.
Drop transitions removed 240 transitions
Trivial Post-agglo rules discarded 240 transitions
Performed 240 trivial Post agglomeration. Transition count delta: 240
Iterating post reduction 1 with 723 rules applied. Total rules applied 968 place count 4551 transition count 12330
Ensure Unique test removed 1 places
Reduce places removed 241 places and 0 transitions.
Drop transitions removed 40 transitions
Ensure Unique test removed 200 transitions
Reduce isomorphic transitions removed 240 transitions.
Drop transitions removed 200 transitions
Trivial Post-agglo rules discarded 200 transitions
Performed 200 trivial Post agglomeration. Transition count delta: 200
Iterating post reduction 2 with 681 rules applied. Total rules applied 1649 place count 4310 transition count 11890
Ensure Unique test removed 40 places
Reduce places removed 240 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 198 transitions
Reduce isomorphic transitions removed 200 transitions.
Drop transitions removed 198 transitions
Trivial Post-agglo rules discarded 198 transitions
Performed 198 trivial Post agglomeration. Transition count delta: 198
Iterating post reduction 3 with 638 rules applied. Total rules applied 2287 place count 4070 transition count 11492
Ensure Unique test removed 2 places
Reduce places removed 200 places and 0 transitions.
Drop transitions removed 36 transitions
Ensure Unique test removed 162 transitions
Reduce isomorphic transitions removed 198 transitions.
Drop transitions removed 162 transitions
Trivial Post-agglo rules discarded 162 transitions
Performed 162 trivial Post agglomeration. Transition count delta: 162
Iterating post reduction 4 with 560 rules applied. Total rules applied 2847 place count 3870 transition count 11132
Ensure Unique test removed 36 places
Reduce places removed 198 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 160 transitions
Reduce isomorphic transitions removed 162 transitions.
Drop transitions removed 160 transitions
Trivial Post-agglo rules discarded 160 transitions
Performed 160 trivial Post agglomeration. Transition count delta: 160
Iterating post reduction 5 with 520 rules applied. Total rules applied 3367 place count 3672 transition count 10810
Ensure Unique test removed 2 places
Reduce places removed 162 places and 0 transitions.
Drop transitions removed 32 transitions
Ensure Unique test removed 128 transitions
Reduce isomorphic transitions removed 160 transitions.
Drop transitions removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 6 with 450 rules applied. Total rules applied 3817 place count 3510 transition count 10522
Ensure Unique test removed 32 places
Reduce places removed 160 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 126 transitions
Reduce isomorphic transitions removed 128 transitions.
Drop transitions removed 126 transitions
Trivial Post-agglo rules discarded 126 transitions
Performed 126 trivial Post agglomeration. Transition count delta: 126
Iterating post reduction 7 with 414 rules applied. Total rules applied 4231 place count 3350 transition count 10268
Ensure Unique test removed 2 places
Reduce places removed 128 places and 0 transitions.
Drop transitions removed 28 transitions
Ensure Unique test removed 98 transitions
Reduce isomorphic transitions removed 126 transitions.
Drop transitions removed 98 transitions
Trivial Post-agglo rules discarded 98 transitions
Performed 98 trivial Post agglomeration. Transition count delta: 98
Iterating post reduction 8 with 352 rules applied. Total rules applied 4583 place count 3222 transition count 10044
Ensure Unique test removed 28 places
Reduce places removed 126 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 96 transitions
Reduce isomorphic transitions removed 98 transitions.
Drop transitions removed 96 transitions
Trivial Post-agglo rules discarded 96 transitions
Performed 96 trivial Post agglomeration. Transition count delta: 96
Iterating post reduction 9 with 320 rules applied. Total rules applied 4903 place count 3096 transition count 9850
Ensure Unique test removed 2 places
Reduce places removed 98 places and 0 transitions.
Drop transitions removed 24 transitions
Ensure Unique test removed 72 transitions
Reduce isomorphic transitions removed 96 transitions.
Drop transitions removed 72 transitions
Trivial Post-agglo rules discarded 72 transitions
Performed 72 trivial Post agglomeration. Transition count delta: 72
Iterating post reduction 10 with 266 rules applied. Total rules applied 5169 place count 2998 transition count 9682
Ensure Unique test removed 24 places
Reduce places removed 96 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 70 transitions
Reduce isomorphic transitions removed 72 transitions.
Drop transitions removed 70 transitions
Trivial Post-agglo rules discarded 70 transitions
Performed 70 trivial Post agglomeration. Transition count delta: 70
Iterating post reduction 11 with 238 rules applied. Total rules applied 5407 place count 2902 transition count 9540
Ensure Unique test removed 2 places
Reduce places removed 72 places and 0 transitions.
Drop transitions removed 20 transitions
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 70 transitions.
Drop transitions removed 50 transitions
Trivial Post-agglo rules discarded 50 transitions
Performed 50 trivial Post agglomeration. Transition count delta: 50
Iterating post reduction 12 with 192 rules applied. Total rules applied 5599 place count 2830 transition count 9420
Ensure Unique test removed 20 places
Reduce places removed 70 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 48 transitions
Reduce isomorphic transitions removed 50 transitions.
Drop transitions removed 48 transitions
Trivial Post-agglo rules discarded 48 transitions
Performed 48 trivial Post agglomeration. Transition count delta: 48
Iterating post reduction 13 with 168 rules applied. Total rules applied 5767 place count 2760 transition count 9322
Ensure Unique test removed 2 places
Reduce places removed 50 places and 0 transitions.
Drop transitions removed 16 transitions
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 48 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 14 with 130 rules applied. Total rules applied 5897 place count 2710 transition count 9242
Ensure Unique test removed 16 places
Reduce places removed 48 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 32 transitions.
Drop transitions removed 30 transitions
Trivial Post-agglo rules discarded 30 transitions
Performed 30 trivial Post agglomeration. Transition count delta: 30
Iterating post reduction 15 with 110 rules applied. Total rules applied 6007 place count 2662 transition count 9180
Ensure Unique test removed 2 places
Reduce places removed 32 places and 0 transitions.
Drop transitions removed 12 transitions
Ensure Unique test removed 18 transitions
Reduce isomorphic transitions removed 30 transitions.
Drop transitions removed 18 transitions
Trivial Post-agglo rules discarded 18 transitions
Performed 18 trivial Post agglomeration. Transition count delta: 18
Iterating post reduction 16 with 80 rules applied. Total rules applied 6087 place count 2630 transition count 9132
Ensure Unique test removed 12 places
Reduce places removed 30 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 18 transitions.
Drop transitions removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 17 with 64 rules applied. Total rules applied 6151 place count 2600 transition count 9098
Ensure Unique test removed 2 places
Reduce places removed 18 places and 0 transitions.
Drop transitions removed 8 transitions
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 18 with 42 rules applied. Total rules applied 6193 place count 2582 transition count 9074
Ensure Unique test removed 8 places
Reduce places removed 16 places and 0 transitions.
Drop transitions removed 2 transitions
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 19 with 30 rules applied. Total rules applied 6223 place count 2566 transition count 9060
Ensure Unique test removed 2 places
Reduce places removed 8 places and 0 transitions.
Drop transitions removed 4 transitions
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 6 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 20 with 16 rules applied. Total rules applied 6239 place count 2558 transition count 9052
Ensure Unique test removed 4 places
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 21 with 9 rules applied. Total rules applied 6248 place count 2551 transition count 9050
Ensure Unique test removed 2 places
Iterating post reduction 22 with 2 rules applied. Total rules applied 6250 place count 2549 transition count 9050
Performed 599 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 23 with 599 Pre rules applied. Total rules applied 6250 place count 2549 transition count 8451
Deduced a syphon composed of 599 places in 2 ms
Ensure Unique test removed 599 places
Reduce places removed 1198 places and 0 transitions.
Iterating global reduction 23 with 1797 rules applied. Total rules applied 8047 place count 1351 transition count 8451
Discarding 599 places :
Symmetric choice reduction at 23 with 599 rule applications. Total rules 8646 place count 752 transition count 7852
Iterating global reduction 23 with 599 rules applied. Total rules applied 9245 place count 752 transition count 7852
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 23 with 1 Pre rules applied. Total rules applied 9245 place count 752 transition count 7851
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 23 with 2 rules applied. Total rules applied 9247 place count 751 transition count 7851
Discarding 540 places :
Symmetric choice reduction at 23 with 540 rule applications. Total rules 9787 place count 211 transition count 1371
Iterating global reduction 23 with 540 rules applied. Total rules applied 10327 place count 211 transition count 1371
Ensure Unique test removed 540 transitions
Reduce isomorphic transitions removed 540 transitions.
Iterating post reduction 23 with 540 rules applied. Total rules applied 10867 place count 211 transition count 831
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 26 places and 0 transitions.
Iterating global reduction 24 with 51 rules applied. Total rules applied 10918 place count 185 transition count 806
Free-agglomeration rule (complex) applied 24 times.
Iterating global reduction 24 with 24 rules applied. Total rules applied 10942 place count 185 transition count 782
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 24 with 24 rules applied. Total rules applied 10966 place count 161 transition count 782
Discarding 22 places :
Symmetric choice reduction at 25 with 22 rule applications. Total rules 10988 place count 139 transition count 518
Ensure Unique test removed 12 places
Iterating global reduction 25 with 34 rules applied. Total rules applied 11022 place count 127 transition count 518
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 25 with 22 rules applied. Total rules applied 11044 place count 127 transition count 496
Discarding 11 places :
Symmetric choice reduction at 26 with 11 rule applications. Total rules 11055 place count 116 transition count 364
Iterating global reduction 26 with 11 rules applied. Total rules applied 11066 place count 116 transition count 364
Discarding 11 places :
Symmetric choice reduction at 26 with 11 rule applications. Total rules 11077 place count 105 transition count 353
Iterating global reduction 26 with 11 rules applied. Total rules applied 11088 place count 105 transition count 353
Applied a total of 11088 rules in 10041 ms. Remains 105 /5225 variables (removed 5120) and now considering 353/14540 (removed 14187) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 353 rows 105 cols
[2023-03-22 18:04:12] [INFO ] Computed 39 place invariants in 13 ms
[2023-03-22 18:04:12] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-22 18:04:12] [INFO ] [Real]Absence check using 3 positive and 36 generalized place invariants in 5 ms returned sat
[2023-03-22 18:04:12] [INFO ] After 52ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-22 18:04:12] [INFO ] [Nat]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-22 18:04:12] [INFO ] [Nat]Absence check using 3 positive and 36 generalized place invariants in 6 ms returned sat
[2023-03-22 18:04:13] [INFO ] After 68ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-22 18:04:13] [INFO ] After 83ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-22 18:04:13] [INFO ] After 144ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
[2023-03-22 18:04:13] [INFO ] Flatten gal took : 744 ms
[2023-03-22 18:04:14] [INFO ] Flatten gal took : 725 ms
[2023-03-22 18:04:14] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-22 18:04:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 20560 places, 29875 transitions and 109282 arcs took 96 ms.
Total runtime 982220 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S24C12
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

BK_STOP 1679509288506

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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MultiCrashLeafsetExtension-PT-S24C12-CTLFireability-15: EF 0 0 0 0 0 0 0 0

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 695 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S24C12"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is MultiCrashLeafsetExtension-PT-S24C12, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416700882"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S24C12.tgz
mv MultiCrashLeafsetExtension-PT-S24C12 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;