fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r231-tall-167856416700866
Last Updated
May 14, 2023

About the Execution of LoLa+red for MultiCrashLeafsetExtension-PT-S24C10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16224.203 1092633.00 1894307.00 16971.50 T????????T?????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416700866.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is MultiCrashLeafsetExtension-PT-S24C10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416700866
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 18M
-rw-r--r-- 1 mcc users 11K Feb 26 02:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 26 02:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 02:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 26 02:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 16:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 02:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Feb 26 02:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 26 02:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 26 02:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 18M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-00
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-09
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679503255063

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MultiCrashLeafsetExtension-PT-S24C10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 16:40:56] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 16:40:56] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 16:40:57] [INFO ] Load time of PNML (sax parser for PT used): 557 ms
[2023-03-22 16:40:57] [INFO ] Transformed 17896 places.
[2023-03-22 16:40:57] [INFO ] Transformed 26071 transitions.
[2023-03-22 16:40:57] [INFO ] Parsed PT model containing 17896 places and 26071 transitions and 96710 arcs in 728 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 37 ms.
Support contains 242 out of 17896 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 17896/17896 places, 26071/26071 transitions.
Reduce places removed 48 places and 0 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 17848 transition count 26071
Applied a total of 48 rules in 791 ms. Remains 17848 /17896 variables (removed 48) and now considering 26071/26071 (removed 0) transitions.
[2023-03-22 16:40:58] [INFO ] Flow matrix only has 25471 transitions (discarded 600 similar events)
// Phase 1: matrix 25471 rows 17848 cols
[2023-03-22 16:41:00] [INFO ] Computed 1197 place invariants in 2356 ms
[2023-03-22 16:41:02] [INFO ] Implicit Places using invariants in 4040 ms returned []
Implicit Place search using SMT only with invariants took 4071 ms to find 0 implicit places.
[2023-03-22 16:41:02] [INFO ] Flow matrix only has 25471 transitions (discarded 600 similar events)
[2023-03-22 16:41:02] [INFO ] Invariant cache hit.
[2023-03-22 16:41:04] [INFO ] Dead Transitions using invariants and state equation in 1599 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 17848/17896 places, 26071/26071 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6477 ms. Remains : 17848/17896 places, 26071/26071 transitions.
Support contains 242 out of 17848 places after structural reductions.
[2023-03-22 16:41:05] [INFO ] Flatten gal took : 981 ms
[2023-03-22 16:41:06] [INFO ] Flatten gal took : 734 ms
[2023-03-22 16:41:07] [INFO ] Input system was already deterministic with 26071 transitions.
Incomplete random walk after 10000 steps, including 97 resets, run finished after 986 ms. (steps per millisecond=10 ) properties (out of 108) seen :24
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 84) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 84) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 83) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 83) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 83) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 82) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 81) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 81) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 80) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 79) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 79) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 79) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=10 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 77) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 76) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 76) seen :0
Running SMT prover for 76 properties.
[2023-03-22 16:41:10] [INFO ] Flow matrix only has 25471 transitions (discarded 600 similar events)
[2023-03-22 16:41:10] [INFO ] Invariant cache hit.
[2023-03-22 16:41:27] [INFO ] [Real]Absence check using 47 positive place invariants in 266 ms returned sat
[2023-03-22 16:41:28] [INFO ] [Real]Absence check using 47 positive and 1150 generalized place invariants in 634 ms returned sat
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Error writing to Z3 solver: java.io.IOException: Stream closed...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:629)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 16:41:35] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 16:41:35] [INFO ] After 25149ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 76 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 156 out of 17848 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Drop transitions removed 5681 transitions
Trivial Post-agglo rules discarded 5681 transitions
Performed 5681 trivial Post agglomeration. Transition count delta: 5681
Iterating post reduction 0 with 5681 rules applied. Total rules applied 5681 place count 17848 transition count 20390
Reduce places removed 5681 places and 0 transitions.
Performed 295 Post agglomeration using F-continuation condition.Transition count delta: 295
Iterating post reduction 1 with 5976 rules applied. Total rules applied 11657 place count 12167 transition count 20095
Reduce places removed 295 places and 0 transitions.
Iterating post reduction 2 with 295 rules applied. Total rules applied 11952 place count 11872 transition count 20095
Performed 474 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 474 Pre rules applied. Total rules applied 11952 place count 11872 transition count 19621
Deduced a syphon composed of 474 places in 23 ms
Reduce places removed 474 places and 0 transitions.
Iterating global reduction 3 with 948 rules applied. Total rules applied 12900 place count 11398 transition count 19621
Discarding 5451 places :
Symmetric choice reduction at 3 with 5451 rule applications. Total rules 18351 place count 5947 transition count 14170
Iterating global reduction 3 with 5451 rules applied. Total rules applied 23802 place count 5947 transition count 14170
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 23802 place count 5947 transition count 14167
Deduced a syphon composed of 3 places in 13 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 23808 place count 5944 transition count 14167
Discarding 490 places :
Symmetric choice reduction at 3 with 490 rule applications. Total rules 24298 place count 5454 transition count 9267
Iterating global reduction 3 with 490 rules applied. Total rules applied 24788 place count 5454 transition count 9267
Performed 19 Post agglomeration using F-continuation condition.Transition count delta: 19
Deduced a syphon composed of 19 places in 6 ms
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 3 with 38 rules applied. Total rules applied 24826 place count 5435 transition count 9248
Free-agglomeration rule (complex) applied 333 times.
Iterating global reduction 3 with 333 rules applied. Total rules applied 25159 place count 5435 transition count 12947
Reduce places removed 333 places and 0 transitions.
Iterating post reduction 3 with 333 rules applied. Total rules applied 25492 place count 5102 transition count 12947
Partial Free-agglomeration rule applied 400 times.
Drop transitions removed 400 transitions
Iterating global reduction 4 with 400 rules applied. Total rules applied 25892 place count 5102 transition count 12947
Applied a total of 25892 rules in 6105 ms. Remains 5102 /17848 variables (removed 12746) and now considering 12947/26071 (removed 13124) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6108 ms. Remains : 5102/17848 places, 12947/26071 transitions.
Incomplete random walk after 10000 steps, including 156 resets, run finished after 835 ms. (steps per millisecond=11 ) properties (out of 72) seen :5
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 67) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 66) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 66) seen :0
Interrupted probabilistic random walk after 18141 steps, run timeout after 3001 ms. (steps per millisecond=6 ) properties seen :{50=1, 60=1}
Probabilistic random walk after 18141 steps, saw 8556 distinct states, run finished after 3003 ms. (steps per millisecond=6 ) properties seen :2
Running SMT prover for 64 properties.
[2023-03-22 16:41:46] [INFO ] Flow matrix only has 12107 transitions (discarded 840 similar events)
// Phase 1: matrix 12107 rows 5102 cols
[2023-03-22 16:41:46] [INFO ] Computed 1197 place invariants in 334 ms
[2023-03-22 16:41:51] [INFO ] [Real]Absence check using 47 positive place invariants in 56 ms returned sat
[2023-03-22 16:41:51] [INFO ] [Real]Absence check using 47 positive and 1150 generalized place invariants in 328 ms returned sat
[2023-03-22 16:42:04] [INFO ] After 8215ms SMT Verify possible using state equation in real domain returned unsat :5 sat :2 real:57
[2023-03-22 16:42:04] [INFO ] State equation strengthened by 7624 read => feed constraints.
[2023-03-22 16:42:07] [INFO ] After 2528ms SMT Verify possible using 7624 Read/Feed constraints in real domain returned unsat :5 sat :0 real:59
[2023-03-22 16:42:07] [INFO ] After 20472ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:59
[2023-03-22 16:42:11] [INFO ] [Nat]Absence check using 47 positive place invariants in 72 ms returned sat
[2023-03-22 16:42:11] [INFO ] [Nat]Absence check using 47 positive and 1150 generalized place invariants in 339 ms returned sat
[2023-03-22 16:42:32] [INFO ] After 16266ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :59
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 16:42:32] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 16:42:32] [INFO ] After 25058ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0 real:59
Fused 64 Parikh solutions to 20 different solutions.
Parikh walk visited 0 properties in 188 ms.
Support contains 113 out of 5102 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5102/5102 places, 12947/12947 transitions.
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 5102 transition count 12940
Reduce places removed 7 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 8 rules applied. Total rules applied 15 place count 5095 transition count 12939
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 16 place count 5094 transition count 12939
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 9 Pre rules applied. Total rules applied 16 place count 5094 transition count 12930
Deduced a syphon composed of 9 places in 7 ms
Reduce places removed 9 places and 0 transitions.
Iterating global reduction 3 with 18 rules applied. Total rules applied 34 place count 5085 transition count 12930
Discarding 10 places :
Symmetric choice reduction at 3 with 10 rule applications. Total rules 44 place count 5075 transition count 12920
Iterating global reduction 3 with 10 rules applied. Total rules applied 54 place count 5075 transition count 12920
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 54 place count 5075 transition count 12919
Deduced a syphon composed of 1 places in 6 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 56 place count 5074 transition count 12919
Free-agglomeration rule (complex) applied 7 times.
Iterating global reduction 3 with 7 rules applied. Total rules applied 63 place count 5074 transition count 12912
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 3 with 7 rules applied. Total rules applied 70 place count 5067 transition count 12912
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 73 place count 5064 transition count 12909
Iterating global reduction 4 with 3 rules applied. Total rules applied 76 place count 5064 transition count 12909
Partial Free-agglomeration rule applied 11 times.
Drop transitions removed 11 transitions
Iterating global reduction 4 with 11 rules applied. Total rules applied 87 place count 5064 transition count 12909
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 91 place count 5060 transition count 12905
Iterating global reduction 4 with 4 rules applied. Total rules applied 95 place count 5060 transition count 12905
Applied a total of 95 rules in 3245 ms. Remains 5060 /5102 variables (removed 42) and now considering 12905/12947 (removed 42) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3247 ms. Remains : 5060/5102 places, 12905/12947 transitions.
Incomplete random walk after 10000 steps, including 158 resets, run finished after 906 ms. (steps per millisecond=11 ) properties (out of 59) seen :5
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 54) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 54) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 53) seen :0
Running SMT prover for 53 properties.
[2023-03-22 16:42:37] [INFO ] Flow matrix only has 12065 transitions (discarded 840 similar events)
// Phase 1: matrix 12065 rows 5060 cols
[2023-03-22 16:42:37] [INFO ] Computed 1197 place invariants in 417 ms
[2023-03-22 16:42:41] [INFO ] [Real]Absence check using 49 positive place invariants in 98 ms returned sat
[2023-03-22 16:42:41] [INFO ] [Real]Absence check using 49 positive and 1148 generalized place invariants in 304 ms returned sat
[2023-03-22 16:43:02] [INFO ] After 16707ms SMT Verify possible using state equation in real domain returned unsat :0 sat :20 real:33
[2023-03-22 16:43:02] [INFO ] State equation strengthened by 7624 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 16:43:02] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 16:43:02] [INFO ] After 25169ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 53 Parikh solutions to 13 different solutions.
Parikh walk visited 0 properties in 95 ms.
Support contains 105 out of 5060 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 5060/5060 places, 12905/12905 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 5060 transition count 12903
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 5058 transition count 12903
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 5058 transition count 12901
Deduced a syphon composed of 2 places in 7 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 5056 transition count 12901
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 10 place count 5054 transition count 12899
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 5054 transition count 12899
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 15 place count 5054 transition count 12896
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 18 place count 5051 transition count 12896
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 19 place count 5050 transition count 12895
Iterating global reduction 3 with 1 rules applied. Total rules applied 20 place count 5050 transition count 12895
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 23 place count 5050 transition count 12895
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 24 place count 5049 transition count 12894
Iterating global reduction 3 with 1 rules applied. Total rules applied 25 place count 5049 transition count 12894
Applied a total of 25 rules in 3176 ms. Remains 5049 /5060 variables (removed 11) and now considering 12894/12905 (removed 11) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3177 ms. Remains : 5049/5060 places, 12894/12905 transitions.
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
FORMULA MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-22 16:43:06] [INFO ] Flatten gal took : 616 ms
[2023-03-22 16:43:07] [INFO ] Flatten gal took : 666 ms
[2023-03-22 16:43:08] [INFO ] Input system was already deterministic with 26071 transitions.
Support contains 165 out of 17848 places (down from 176) after GAL structural reductions.
FORMULA MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 15224 stabilizing places and 20870 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 462 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 463 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:09] [INFO ] Flatten gal took : 574 ms
[2023-03-22 16:43:10] [INFO ] Flatten gal took : 632 ms
[2023-03-22 16:43:11] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Drop transitions removed 5975 transitions
Trivial Post-agglo rules discarded 5975 transitions
Performed 5975 trivial Post agglomeration. Transition count delta: 5975
Iterating post reduction 0 with 5975 rules applied. Total rules applied 5975 place count 17848 transition count 20096
Reduce places removed 5975 places and 0 transitions.
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Iterating post reduction 1 with 5999 rules applied. Total rules applied 11974 place count 11873 transition count 20072
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 2 with 24 rules applied. Total rules applied 11998 place count 11849 transition count 20072
Performed 498 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 498 Pre rules applied. Total rules applied 11998 place count 11849 transition count 19574
Deduced a syphon composed of 498 places in 19 ms
Reduce places removed 498 places and 0 transitions.
Iterating global reduction 3 with 996 rules applied. Total rules applied 12994 place count 11351 transition count 19574
Discarding 5497 places :
Symmetric choice reduction at 3 with 5497 rule applications. Total rules 18491 place count 5854 transition count 14077
Iterating global reduction 3 with 5497 rules applied. Total rules applied 23988 place count 5854 transition count 14077
Performed 17 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 17 Pre rules applied. Total rules applied 23988 place count 5854 transition count 14060
Deduced a syphon composed of 17 places in 10 ms
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 3 with 34 rules applied. Total rules applied 24022 place count 5837 transition count 14060
Discarding 547 places :
Symmetric choice reduction at 3 with 547 rule applications. Total rules 24569 place count 5290 transition count 8590
Iterating global reduction 3 with 547 rules applied. Total rules applied 25116 place count 5290 transition count 8590
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 25166 place count 5265 transition count 8565
Applied a total of 25166 rules in 3384 ms. Remains 5265 /17848 variables (removed 12583) and now considering 8565/26071 (removed 17506) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3385 ms. Remains : 5265/17848 places, 8565/26071 transitions.
[2023-03-22 16:43:15] [INFO ] Flatten gal took : 190 ms
[2023-03-22 16:43:15] [INFO ] Flatten gal took : 202 ms
[2023-03-22 16:43:15] [INFO ] Input system was already deterministic with 8565 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 454 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 455 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:16] [INFO ] Flatten gal took : 562 ms
[2023-03-22 16:43:17] [INFO ] Flatten gal took : 623 ms
[2023-03-22 16:43:18] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 439 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 440 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:19] [INFO ] Flatten gal took : 559 ms
[2023-03-22 16:43:20] [INFO ] Flatten gal took : 615 ms
[2023-03-22 16:43:21] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 429 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 430 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:22] [INFO ] Flatten gal took : 549 ms
[2023-03-22 16:43:23] [INFO ] Flatten gal took : 618 ms
[2023-03-22 16:43:24] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 518 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 520 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:25] [INFO ] Flatten gal took : 556 ms
[2023-03-22 16:43:26] [INFO ] Flatten gal took : 616 ms
[2023-03-22 16:43:27] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 443 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 443 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:28] [INFO ] Flatten gal took : 598 ms
[2023-03-22 16:43:29] [INFO ] Flatten gal took : 597 ms
[2023-03-22 16:43:30] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 481 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 481 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:31] [INFO ] Flatten gal took : 596 ms
[2023-03-22 16:43:31] [INFO ] Flatten gal took : 625 ms
[2023-03-22 16:43:33] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Drop transitions removed 5976 transitions
Trivial Post-agglo rules discarded 5976 transitions
Performed 5976 trivial Post agglomeration. Transition count delta: 5976
Iterating post reduction 0 with 5976 rules applied. Total rules applied 5976 place count 17848 transition count 20095
Reduce places removed 5976 places and 0 transitions.
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Iterating post reduction 1 with 6000 rules applied. Total rules applied 11976 place count 11872 transition count 20071
Reduce places removed 24 places and 0 transitions.
Iterating post reduction 2 with 24 rules applied. Total rules applied 12000 place count 11848 transition count 20071
Performed 498 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 498 Pre rules applied. Total rules applied 12000 place count 11848 transition count 19573
Deduced a syphon composed of 498 places in 18 ms
Reduce places removed 498 places and 0 transitions.
Iterating global reduction 3 with 996 rules applied. Total rules applied 12996 place count 11350 transition count 19573
Discarding 5498 places :
Symmetric choice reduction at 3 with 5498 rule applications. Total rules 18494 place count 5852 transition count 14075
Iterating global reduction 3 with 5498 rules applied. Total rules applied 23992 place count 5852 transition count 14075
Performed 18 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 18 Pre rules applied. Total rules applied 23992 place count 5852 transition count 14057
Deduced a syphon composed of 18 places in 11 ms
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 3 with 36 rules applied. Total rules applied 24028 place count 5834 transition count 14057
Discarding 548 places :
Symmetric choice reduction at 3 with 548 rule applications. Total rules 24576 place count 5286 transition count 8577
Iterating global reduction 3 with 548 rules applied. Total rules applied 25124 place count 5286 transition count 8577
Performed 25 Post agglomeration using F-continuation condition.Transition count delta: 25
Deduced a syphon composed of 25 places in 6 ms
Reduce places removed 25 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 25174 place count 5261 transition count 8552
Applied a total of 25174 rules in 3096 ms. Remains 5261 /17848 variables (removed 12587) and now considering 8552/26071 (removed 17519) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3096 ms. Remains : 5261/17848 places, 8552/26071 transitions.
[2023-03-22 16:43:36] [INFO ] Flatten gal took : 182 ms
[2023-03-22 16:43:36] [INFO ] Flatten gal took : 208 ms
[2023-03-22 16:43:37] [INFO ] Input system was already deterministic with 8552 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 454 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 455 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:38] [INFO ] Flatten gal took : 659 ms
[2023-03-22 16:43:38] [INFO ] Flatten gal took : 704 ms
[2023-03-22 16:43:40] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 443 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 443 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:41] [INFO ] Flatten gal took : 573 ms
[2023-03-22 16:43:41] [INFO ] Flatten gal took : 635 ms
[2023-03-22 16:43:42] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 438 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 439 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:43] [INFO ] Flatten gal took : 564 ms
[2023-03-22 16:43:44] [INFO ] Flatten gal took : 630 ms
[2023-03-22 16:43:45] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 435 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 436 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:46] [INFO ] Flatten gal took : 564 ms
[2023-03-22 16:43:47] [INFO ] Flatten gal took : 628 ms
[2023-03-22 16:43:48] [INFO ] Input system was already deterministic with 26071 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17848/17848 places, 26071/26071 transitions.
Applied a total of 0 rules in 439 ms. Remains 17848 /17848 variables (removed 0) and now considering 26071/26071 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 440 ms. Remains : 17848/17848 places, 26071/26071 transitions.
[2023-03-22 16:43:49] [INFO ] Flatten gal took : 565 ms
[2023-03-22 16:43:50] [INFO ] Flatten gal took : 625 ms
[2023-03-22 16:43:51] [INFO ] Input system was already deterministic with 26071 transitions.
[2023-03-22 16:43:51] [INFO ] Flatten gal took : 609 ms
[2023-03-22 16:43:52] [INFO ] Flatten gal took : 649 ms
[2023-03-22 16:43:52] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-22 16:43:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 17848 places, 26071 transitions and 96662 arcs took 89 ms.
Total runtime 176243 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S24C10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

BK_STOP 1679504347696

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 531 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 536 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 541 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 546 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 551 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 556 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 561 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 566 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 571 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 576 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 581 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 586 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 591 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 596 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 8.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 601 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 606 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 9.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 611 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 616 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 621 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 626 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 631 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 636 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 641 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 646 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 651 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 656 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 661 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 57.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 666 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 671 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 676 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 681 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 686 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 691 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 696 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 701 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 706 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 711 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 46.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 716 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 721 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 726 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 731 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 736 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 741 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 746 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 751 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 756 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 48.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 761 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 766 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 771 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 776 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 781 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 786 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 791 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 36.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 796 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 801 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 806 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 811 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 816 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 821 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 826 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 31.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 831 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 836 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 841 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 846 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 851 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 28.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 856 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 861 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
lola: Created skeleton in 9.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 866 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 871 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 876 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 882 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 887 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 893 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 901 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 906 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-02: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C10-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 911 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 14
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 501 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S24C10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is MultiCrashLeafsetExtension-PT-S24C10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416700866"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S24C10.tgz
mv MultiCrashLeafsetExtension-PT-S24C10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;