fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r231-tall-167856416600818
Last Updated
May 14, 2023

About the Execution of LoLa+red for MultiCrashLeafsetExtension-PT-S24C04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16226.403 747110.00 862108.00 27645.00 ?F????????????F? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416600818.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is MultiCrashLeafsetExtension-PT-S24C04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416600818
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 11M
-rw-r--r-- 1 mcc users 15K Feb 26 03:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 26 03:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 03:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 67K Feb 26 03:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 16:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 03:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 26 03:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 03:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 03:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 10M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-01
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14
FORMULA_NAME MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679494330902

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MultiCrashLeafsetExtension-PT-S24C04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 14:12:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 14:12:12] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 14:12:12] [INFO ] Load time of PNML (sax parser for PT used): 409 ms
[2023-03-22 14:12:12] [INFO ] Transformed 9748 places.
[2023-03-22 14:12:12] [INFO ] Transformed 14659 transitions.
[2023-03-22 14:12:12] [INFO ] Parsed PT model containing 9748 places and 14659 transitions and 58838 arcs in 594 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 211 out of 9748 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9748/9748 places, 14659/14659 transitions.
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 9712 transition count 14659
Discarding 2359 places :
Symmetric choice reduction at 1 with 2359 rule applications. Total rules 2395 place count 7353 transition count 12300
Iterating global reduction 1 with 2359 rules applied. Total rules applied 4754 place count 7353 transition count 12300
Discarding 2149 places :
Symmetric choice reduction at 1 with 2149 rule applications. Total rules 6903 place count 5204 transition count 10151
Iterating global reduction 1 with 2149 rules applied. Total rules applied 9052 place count 5204 transition count 10151
Discarding 480 places :
Symmetric choice reduction at 1 with 480 rule applications. Total rules 9532 place count 4724 transition count 8231
Iterating global reduction 1 with 480 rules applied. Total rules applied 10012 place count 4724 transition count 8231
Applied a total of 10012 rules in 2756 ms. Remains 4724 /9748 variables (removed 5024) and now considering 8231/14659 (removed 6428) transitions.
[2023-03-22 14:12:15] [INFO ] Flow matrix only has 7631 transitions (discarded 600 similar events)
// Phase 1: matrix 7631 rows 4724 cols
[2023-03-22 14:12:16] [INFO ] Computed 885 place invariants in 493 ms
[2023-03-22 14:12:19] [INFO ] Implicit Places using invariants in 3492 ms returned []
[2023-03-22 14:12:19] [INFO ] Flow matrix only has 7631 transitions (discarded 600 similar events)
[2023-03-22 14:12:19] [INFO ] Invariant cache hit.
[2023-03-22 14:12:22] [INFO ] Implicit Places using invariants and state equation in 2829 ms returned []
Implicit Place search using SMT with State Equation took 6346 ms to find 0 implicit places.
[2023-03-22 14:12:22] [INFO ] Flow matrix only has 7631 transitions (discarded 600 similar events)
[2023-03-22 14:12:22] [INFO ] Invariant cache hit.
[2023-03-22 14:12:26] [INFO ] Dead Transitions using invariants and state equation in 4335 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 4724/9748 places, 8231/14659 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13442 ms. Remains : 4724/9748 places, 8231/14659 transitions.
Support contains 211 out of 4724 places after structural reductions.
[2023-03-22 14:12:27] [INFO ] Flatten gal took : 460 ms
[2023-03-22 14:12:27] [INFO ] Flatten gal took : 347 ms
[2023-03-22 14:12:28] [INFO ] Input system was already deterministic with 8231 transitions.
Support contains 207 out of 4724 places (down from 211) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 241 resets, run finished after 842 ms. (steps per millisecond=11 ) properties (out of 105) seen :24
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 81) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 80) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 80) seen :2
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 78) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 77) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 77) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 76) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 75) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 74) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 73) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 73) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 72) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 72) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 71) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 71) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 70) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 70) seen :0
Running SMT prover for 70 properties.
[2023-03-22 14:12:29] [INFO ] Flow matrix only has 7631 transitions (discarded 600 similar events)
[2023-03-22 14:12:29] [INFO ] Invariant cache hit.
[2023-03-22 14:12:34] [INFO ] [Real]Absence check using 47 positive place invariants in 41 ms returned sat
[2023-03-22 14:12:35] [INFO ] [Real]Absence check using 47 positive and 838 generalized place invariants in 256 ms returned sat
[2023-03-22 14:12:54] [INFO ] After 16109ms SMT Verify possible using state equation in real domain returned unsat :10 sat :13 real:47
[2023-03-22 14:12:54] [INFO ] State equation strengthened by 2962 read => feed constraints.
[2023-03-22 14:12:55] [INFO ] After 647ms SMT Verify possible using 2962 Read/Feed constraints in real domain returned unsat :10 sat :12 real:48
[2023-03-22 14:12:55] [INFO ] After 649ms SMT Verify possible using trap constraints in real domain returned unsat :10 sat :12 real:48
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-03-22 14:12:55] [INFO ] After 25037ms SMT Verify possible using all constraints in real domain returned unsat :10 sat :12 real:48
[2023-03-22 14:12:59] [INFO ] [Nat]Absence check using 47 positive place invariants in 43 ms returned sat
[2023-03-22 14:12:59] [INFO ] [Nat]Absence check using 47 positive and 838 generalized place invariants in 287 ms returned sat
[2023-03-22 14:13:20] [INFO ] After 17050ms SMT Verify possible using state equation in natural domain returned unsat :13 sat :57
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 14:13:20] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 14:13:20] [INFO ] After 25047ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :12 real:48
Fused 70 Parikh solutions to 49 different solutions.
Parikh walk visited 0 properties in 344 ms.
Support contains 97 out of 4724 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Drop transitions removed 19 transitions
Trivial Post-agglo rules discarded 19 transitions
Performed 19 trivial Post agglomeration. Transition count delta: 19
Iterating post reduction 0 with 19 rules applied. Total rules applied 19 place count 4724 transition count 8212
Reduce places removed 19 places and 0 transitions.
Iterating post reduction 1 with 19 rules applied. Total rules applied 38 place count 4705 transition count 8212
Performed 196 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 196 Pre rules applied. Total rules applied 38 place count 4705 transition count 8016
Deduced a syphon composed of 196 places in 6 ms
Reduce places removed 196 places and 0 transitions.
Iterating global reduction 2 with 392 rules applied. Total rules applied 430 place count 4509 transition count 8016
Discarding 25 places :
Symmetric choice reduction at 2 with 25 rule applications. Total rules 455 place count 4484 transition count 7955
Iterating global reduction 2 with 25 rules applied. Total rules applied 480 place count 4484 transition count 7955
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 480 place count 4484 transition count 7954
Deduced a syphon composed of 1 places in 15 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 482 place count 4483 transition count 7954
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 494 place count 4471 transition count 7906
Iterating global reduction 2 with 12 rules applied. Total rules applied 506 place count 4471 transition count 7906
Performed 28 Post agglomeration using F-continuation condition.Transition count delta: 28
Deduced a syphon composed of 28 places in 6 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 2 with 56 rules applied. Total rules applied 562 place count 4443 transition count 7878
Discarding 19 places :
Symmetric choice reduction at 2 with 19 rule applications. Total rules 581 place count 4424 transition count 7859
Iterating global reduction 2 with 19 rules applied. Total rules applied 600 place count 4424 transition count 7859
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 600 place count 4424 transition count 7858
Deduced a syphon composed of 1 places in 5 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 602 place count 4423 transition count 7858
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 619 place count 4406 transition count 7790
Iterating global reduction 2 with 17 rules applied. Total rules applied 636 place count 4406 transition count 7790
Free-agglomeration rule (complex) applied 318 times.
Iterating global reduction 2 with 318 rules applied. Total rules applied 954 place count 4406 transition count 8942
Reduce places removed 318 places and 0 transitions.
Iterating post reduction 2 with 318 rules applied. Total rules applied 1272 place count 4088 transition count 8942
Partial Free-agglomeration rule applied 145 times.
Drop transitions removed 145 transitions
Iterating global reduction 3 with 145 rules applied. Total rules applied 1417 place count 4088 transition count 8942
Applied a total of 1417 rules in 3582 ms. Remains 4088 /4724 variables (removed 636) and now considering 8942/8231 (removed -711) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3586 ms. Remains : 4088/4724 places, 8942/8231 transitions.
Incomplete random walk after 10000 steps, including 391 resets, run finished after 624 ms. (steps per millisecond=16 ) properties (out of 57) seen :6
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1000 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 51) seen :0
Running SMT prover for 51 properties.
[2023-03-22 14:13:25] [INFO ] Flow matrix only has 8090 transitions (discarded 852 similar events)
// Phase 1: matrix 8090 rows 4088 cols
[2023-03-22 14:13:25] [INFO ] Computed 885 place invariants in 203 ms
[2023-03-22 14:13:28] [INFO ] [Real]Absence check using 49 positive place invariants in 56 ms returned sat
[2023-03-22 14:13:28] [INFO ] [Real]Absence check using 49 positive and 836 generalized place invariants in 220 ms returned sat
[2023-03-22 14:13:46] [INFO ] After 14519ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:49
[2023-03-22 14:13:46] [INFO ] State equation strengthened by 4309 read => feed constraints.
[2023-03-22 14:13:47] [INFO ] After 1343ms SMT Verify possible using 4309 Read/Feed constraints in real domain returned unsat :0 sat :0 real:51
[2023-03-22 14:13:47] [INFO ] After 21946ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:51
[2023-03-22 14:13:50] [INFO ] [Nat]Absence check using 49 positive place invariants in 62 ms returned sat
[2023-03-22 14:13:50] [INFO ] [Nat]Absence check using 49 positive and 836 generalized place invariants in 204 ms returned sat
[2023-03-22 14:14:11] [INFO ] After 17804ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :51
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.checkResults(DeadlockTester.java:797)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:644)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:350)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:626)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-22 14:14:12] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-22 14:14:12] [INFO ] After 25033ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0 real:51
Parikh walk visited 0 properties in 150 ms.
Support contains 89 out of 4088 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 4088/4088 places, 8942/8942 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 4088 transition count 8937
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 4083 transition count 8937
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 10 place count 4083 transition count 8936
Deduced a syphon composed of 1 places in 3 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 4082 transition count 8936
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 14 place count 4080 transition count 8931
Iterating global reduction 2 with 2 rules applied. Total rules applied 16 place count 4080 transition count 8931
Free-agglomeration rule (complex) applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 18 place count 4080 transition count 8929
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 20 place count 4078 transition count 8929
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 23 place count 4075 transition count 8926
Iterating global reduction 3 with 3 rules applied. Total rules applied 26 place count 4075 transition count 8926
Partial Free-agglomeration rule applied 3 times.
Drop transitions removed 3 transitions
Iterating global reduction 3 with 3 rules applied. Total rules applied 29 place count 4075 transition count 8926
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 31 place count 4073 transition count 8924
Iterating global reduction 3 with 2 rules applied. Total rules applied 33 place count 4073 transition count 8924
Applied a total of 33 rules in 1783 ms. Remains 4073 /4088 variables (removed 15) and now considering 8924/8942 (removed 18) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1783 ms. Remains : 4073/4088 places, 8924/8942 transitions.
Successfully simplified 13 atomic propositions for a total of 16 simplifications.
[2023-03-22 14:14:14] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-22 14:14:14] [INFO ] Flatten gal took : 221 ms
FORMULA MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-22 14:14:14] [INFO ] Flatten gal took : 238 ms
[2023-03-22 14:14:15] [INFO ] Input system was already deterministic with 8231 transitions.
Support contains 120 out of 4724 places (down from 124) after GAL structural reductions.
Computed a total of 2100 stabilizing places and 3030 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 69 places :
Symmetric choice reduction at 0 with 69 rule applications. Total rules 69 place count 4655 transition count 8102
Iterating global reduction 0 with 69 rules applied. Total rules applied 138 place count 4655 transition count 8102
Discarding 49 places :
Symmetric choice reduction at 0 with 49 rule applications. Total rules 187 place count 4606 transition count 8002
Iterating global reduction 0 with 49 rules applied. Total rules applied 236 place count 4606 transition count 8002
Discarding 30 places :
Symmetric choice reduction at 0 with 30 rule applications. Total rules 266 place count 4576 transition count 7882
Iterating global reduction 0 with 30 rules applied. Total rules applied 296 place count 4576 transition count 7882
Applied a total of 296 rules in 1223 ms. Remains 4576 /4724 variables (removed 148) and now considering 7882/8231 (removed 349) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1224 ms. Remains : 4576/4724 places, 7882/8231 transitions.
[2023-03-22 14:14:16] [INFO ] Flatten gal took : 190 ms
[2023-03-22 14:14:17] [INFO ] Flatten gal took : 216 ms
[2023-03-22 14:14:17] [INFO ] Input system was already deterministic with 7882 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 67 places :
Symmetric choice reduction at 0 with 67 rule applications. Total rules 67 place count 4657 transition count 8107
Iterating global reduction 0 with 67 rules applied. Total rules applied 134 place count 4657 transition count 8107
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 182 place count 4609 transition count 8008
Iterating global reduction 0 with 48 rules applied. Total rules applied 230 place count 4609 transition count 8008
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 259 place count 4580 transition count 7892
Iterating global reduction 0 with 29 rules applied. Total rules applied 288 place count 4580 transition count 7892
Applied a total of 288 rules in 1191 ms. Remains 4580 /4724 variables (removed 144) and now considering 7892/8231 (removed 339) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1191 ms. Remains : 4580/4724 places, 7892/8231 transitions.
[2023-03-22 14:14:18] [INFO ] Flatten gal took : 180 ms
[2023-03-22 14:14:19] [INFO ] Flatten gal took : 204 ms
[2023-03-22 14:14:19] [INFO ] Input system was already deterministic with 7892 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 71 places :
Symmetric choice reduction at 0 with 71 rule applications. Total rules 71 place count 4653 transition count 8097
Iterating global reduction 0 with 71 rules applied. Total rules applied 142 place count 4653 transition count 8097
Discarding 50 places :
Symmetric choice reduction at 0 with 50 rule applications. Total rules 192 place count 4603 transition count 7996
Iterating global reduction 0 with 50 rules applied. Total rules applied 242 place count 4603 transition count 7996
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 273 place count 4572 transition count 7872
Iterating global reduction 0 with 31 rules applied. Total rules applied 304 place count 4572 transition count 7872
Applied a total of 304 rules in 1287 ms. Remains 4572 /4724 variables (removed 152) and now considering 7872/8231 (removed 359) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1288 ms. Remains : 4572/4724 places, 7872/8231 transitions.
[2023-03-22 14:14:20] [INFO ] Flatten gal took : 179 ms
[2023-03-22 14:14:21] [INFO ] Flatten gal took : 200 ms
[2023-03-22 14:14:21] [INFO ] Input system was already deterministic with 7872 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 70 places :
Symmetric choice reduction at 0 with 70 rule applications. Total rules 70 place count 4654 transition count 8104
Iterating global reduction 0 with 70 rules applied. Total rules applied 140 place count 4654 transition count 8104
Discarding 51 places :
Symmetric choice reduction at 0 with 51 rule applications. Total rules 191 place count 4603 transition count 7999
Iterating global reduction 0 with 51 rules applied. Total rules applied 242 place count 4603 transition count 7999
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 273 place count 4572 transition count 7875
Iterating global reduction 0 with 31 rules applied. Total rules applied 304 place count 4572 transition count 7875
Applied a total of 304 rules in 1188 ms. Remains 4572 /4724 variables (removed 152) and now considering 7875/8231 (removed 356) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1189 ms. Remains : 4572/4724 places, 7875/8231 transitions.
[2023-03-22 14:14:22] [INFO ] Flatten gal took : 176 ms
[2023-03-22 14:14:23] [INFO ] Flatten gal took : 199 ms
[2023-03-22 14:14:23] [INFO ] Input system was already deterministic with 7875 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 4652 transition count 8096
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 4652 transition count 8096
Discarding 51 places :
Symmetric choice reduction at 0 with 51 rule applications. Total rules 195 place count 4601 transition count 7991
Iterating global reduction 0 with 51 rules applied. Total rules applied 246 place count 4601 transition count 7991
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 277 place count 4570 transition count 7867
Iterating global reduction 0 with 31 rules applied. Total rules applied 308 place count 4570 transition count 7867
Applied a total of 308 rules in 1215 ms. Remains 4570 /4724 variables (removed 154) and now considering 7867/8231 (removed 364) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1217 ms. Remains : 4570/4724 places, 7867/8231 transitions.
[2023-03-22 14:14:24] [INFO ] Flatten gal took : 177 ms
[2023-03-22 14:14:25] [INFO ] Flatten gal took : 201 ms
[2023-03-22 14:14:25] [INFO ] Input system was already deterministic with 7867 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Drop transitions removed 31 transitions
Trivial Post-agglo rules discarded 31 transitions
Performed 31 trivial Post agglomeration. Transition count delta: 31
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 4724 transition count 8200
Reduce places removed 31 places and 0 transitions.
Iterating post reduction 1 with 31 rules applied. Total rules applied 62 place count 4693 transition count 8200
Performed 201 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 201 Pre rules applied. Total rules applied 62 place count 4693 transition count 7999
Deduced a syphon composed of 201 places in 5 ms
Reduce places removed 201 places and 0 transitions.
Iterating global reduction 2 with 402 rules applied. Total rules applied 464 place count 4492 transition count 7999
Discarding 39 places :
Symmetric choice reduction at 2 with 39 rule applications. Total rules 503 place count 4453 transition count 7897
Iterating global reduction 2 with 39 rules applied. Total rules applied 542 place count 4453 transition count 7897
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 542 place count 4453 transition count 7896
Deduced a syphon composed of 1 places in 5 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 544 place count 4452 transition count 7896
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 562 place count 4434 transition count 7824
Iterating global reduction 2 with 18 rules applied. Total rules applied 580 place count 4434 transition count 7824
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Deduced a syphon composed of 32 places in 5 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 644 place count 4402 transition count 7792
Discarding 31 places :
Symmetric choice reduction at 2 with 31 rule applications. Total rules 675 place count 4371 transition count 7761
Iterating global reduction 2 with 31 rules applied. Total rules applied 706 place count 4371 transition count 7761
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 706 place count 4371 transition count 7756
Deduced a syphon composed of 5 places in 5 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 716 place count 4366 transition count 7756
Discarding 29 places :
Symmetric choice reduction at 2 with 29 rule applications. Total rules 745 place count 4337 transition count 7640
Iterating global reduction 2 with 29 rules applied. Total rules applied 774 place count 4337 transition count 7640
Applied a total of 774 rules in 2279 ms. Remains 4337 /4724 variables (removed 387) and now considering 7640/8231 (removed 591) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2281 ms. Remains : 4337/4724 places, 7640/8231 transitions.
[2023-03-22 14:14:27] [INFO ] Flatten gal took : 180 ms
[2023-03-22 14:14:28] [INFO ] Flatten gal took : 202 ms
[2023-03-22 14:14:28] [INFO ] Input system was already deterministic with 7640 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 69 places :
Symmetric choice reduction at 0 with 69 rule applications. Total rules 69 place count 4655 transition count 8105
Iterating global reduction 0 with 69 rules applied. Total rules applied 138 place count 4655 transition count 8105
Discarding 50 places :
Symmetric choice reduction at 0 with 50 rule applications. Total rules 188 place count 4605 transition count 8004
Iterating global reduction 0 with 50 rules applied. Total rules applied 238 place count 4605 transition count 8004
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 269 place count 4574 transition count 7880
Iterating global reduction 0 with 31 rules applied. Total rules applied 300 place count 4574 transition count 7880
Applied a total of 300 rules in 1199 ms. Remains 4574 /4724 variables (removed 150) and now considering 7880/8231 (removed 351) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1201 ms. Remains : 4574/4724 places, 7880/8231 transitions.
[2023-03-22 14:14:30] [INFO ] Flatten gal took : 182 ms
[2023-03-22 14:14:30] [INFO ] Flatten gal took : 202 ms
[2023-03-22 14:14:30] [INFO ] Input system was already deterministic with 7880 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 4652 transition count 8096
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 4652 transition count 8096
Discarding 51 places :
Symmetric choice reduction at 0 with 51 rule applications. Total rules 195 place count 4601 transition count 7991
Iterating global reduction 0 with 51 rules applied. Total rules applied 246 place count 4601 transition count 7991
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 277 place count 4570 transition count 7867
Iterating global reduction 0 with 31 rules applied. Total rules applied 308 place count 4570 transition count 7867
Applied a total of 308 rules in 1210 ms. Remains 4570 /4724 variables (removed 154) and now considering 7867/8231 (removed 364) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1210 ms. Remains : 4570/4724 places, 7867/8231 transitions.
[2023-03-22 14:14:32] [INFO ] Flatten gal took : 173 ms
[2023-03-22 14:14:32] [INFO ] Flatten gal took : 197 ms
[2023-03-22 14:14:32] [INFO ] Input system was already deterministic with 7867 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Drop transitions removed 33 transitions
Trivial Post-agglo rules discarded 33 transitions
Performed 33 trivial Post agglomeration. Transition count delta: 33
Iterating post reduction 0 with 33 rules applied. Total rules applied 33 place count 4724 transition count 8198
Reduce places removed 33 places and 0 transitions.
Iterating post reduction 1 with 33 rules applied. Total rules applied 66 place count 4691 transition count 8198
Performed 200 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 200 Pre rules applied. Total rules applied 66 place count 4691 transition count 7998
Deduced a syphon composed of 200 places in 5 ms
Reduce places removed 200 places and 0 transitions.
Iterating global reduction 2 with 400 rules applied. Total rules applied 466 place count 4491 transition count 7998
Discarding 38 places :
Symmetric choice reduction at 2 with 38 rule applications. Total rules 504 place count 4453 transition count 7897
Iterating global reduction 2 with 38 rules applied. Total rules applied 542 place count 4453 transition count 7897
Discarding 17 places :
Symmetric choice reduction at 2 with 17 rule applications. Total rules 559 place count 4436 transition count 7829
Iterating global reduction 2 with 17 rules applied. Total rules applied 576 place count 4436 transition count 7829
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Deduced a syphon composed of 32 places in 4 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 640 place count 4404 transition count 7797
Discarding 33 places :
Symmetric choice reduction at 2 with 33 rule applications. Total rules 673 place count 4371 transition count 7764
Iterating global reduction 2 with 33 rules applied. Total rules applied 706 place count 4371 transition count 7764
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 7 Pre rules applied. Total rules applied 706 place count 4371 transition count 7757
Deduced a syphon composed of 7 places in 4 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 14 rules applied. Total rules applied 720 place count 4364 transition count 7757
Discarding 31 places :
Symmetric choice reduction at 2 with 31 rule applications. Total rules 751 place count 4333 transition count 7633
Iterating global reduction 2 with 31 rules applied. Total rules applied 782 place count 4333 transition count 7633
Applied a total of 782 rules in 2141 ms. Remains 4333 /4724 variables (removed 391) and now considering 7633/8231 (removed 598) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2141 ms. Remains : 4333/4724 places, 7633/8231 transitions.
[2023-03-22 14:14:34] [INFO ] Flatten gal took : 173 ms
[2023-03-22 14:14:35] [INFO ] Flatten gal took : 225 ms
[2023-03-22 14:14:35] [INFO ] Input system was already deterministic with 7633 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 68 places :
Symmetric choice reduction at 0 with 68 rule applications. Total rules 68 place count 4656 transition count 8100
Iterating global reduction 0 with 68 rules applied. Total rules applied 136 place count 4656 transition count 8100
Discarding 47 places :
Symmetric choice reduction at 0 with 47 rule applications. Total rules 183 place count 4609 transition count 8008
Iterating global reduction 0 with 47 rules applied. Total rules applied 230 place count 4609 transition count 8008
Discarding 30 places :
Symmetric choice reduction at 0 with 30 rule applications. Total rules 260 place count 4579 transition count 7888
Iterating global reduction 0 with 30 rules applied. Total rules applied 290 place count 4579 transition count 7888
Applied a total of 290 rules in 1228 ms. Remains 4579 /4724 variables (removed 145) and now considering 7888/8231 (removed 343) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1228 ms. Remains : 4579/4724 places, 7888/8231 transitions.
[2023-03-22 14:14:36] [INFO ] Flatten gal took : 177 ms
[2023-03-22 14:14:37] [INFO ] Flatten gal took : 200 ms
[2023-03-22 14:14:37] [INFO ] Input system was already deterministic with 7888 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 70 places :
Symmetric choice reduction at 0 with 70 rule applications. Total rules 70 place count 4654 transition count 8098
Iterating global reduction 0 with 70 rules applied. Total rules applied 140 place count 4654 transition count 8098
Discarding 49 places :
Symmetric choice reduction at 0 with 49 rule applications. Total rules 189 place count 4605 transition count 7995
Iterating global reduction 0 with 49 rules applied. Total rules applied 238 place count 4605 transition count 7995
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 267 place count 4576 transition count 7879
Iterating global reduction 0 with 29 rules applied. Total rules applied 296 place count 4576 transition count 7879
Applied a total of 296 rules in 1267 ms. Remains 4576 /4724 variables (removed 148) and now considering 7879/8231 (removed 352) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1267 ms. Remains : 4576/4724 places, 7879/8231 transitions.
[2023-03-22 14:14:38] [INFO ] Flatten gal took : 176 ms
[2023-03-22 14:14:39] [INFO ] Flatten gal took : 200 ms
[2023-03-22 14:14:39] [INFO ] Input system was already deterministic with 7879 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 70 places :
Symmetric choice reduction at 0 with 70 rule applications. Total rules 70 place count 4654 transition count 8098
Iterating global reduction 0 with 70 rules applied. Total rules applied 140 place count 4654 transition count 8098
Discarding 49 places :
Symmetric choice reduction at 0 with 49 rule applications. Total rules 189 place count 4605 transition count 7995
Iterating global reduction 0 with 49 rules applied. Total rules applied 238 place count 4605 transition count 7995
Discarding 29 places :
Symmetric choice reduction at 0 with 29 rule applications. Total rules 267 place count 4576 transition count 7879
Iterating global reduction 0 with 29 rules applied. Total rules applied 296 place count 4576 transition count 7879
Applied a total of 296 rules in 1192 ms. Remains 4576 /4724 variables (removed 148) and now considering 7879/8231 (removed 352) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1192 ms. Remains : 4576/4724 places, 7879/8231 transitions.
[2023-03-22 14:14:40] [INFO ] Flatten gal took : 177 ms
[2023-03-22 14:14:41] [INFO ] Flatten gal took : 196 ms
[2023-03-22 14:14:41] [INFO ] Input system was already deterministic with 7879 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 4724 transition count 8199
Reduce places removed 32 places and 0 transitions.
Iterating post reduction 1 with 32 rules applied. Total rules applied 64 place count 4692 transition count 8199
Performed 201 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 201 Pre rules applied. Total rules applied 64 place count 4692 transition count 7998
Deduced a syphon composed of 201 places in 5 ms
Reduce places removed 201 places and 0 transitions.
Iterating global reduction 2 with 402 rules applied. Total rules applied 466 place count 4491 transition count 7998
Discarding 37 places :
Symmetric choice reduction at 2 with 37 rule applications. Total rules 503 place count 4454 transition count 7904
Iterating global reduction 2 with 37 rules applied. Total rules applied 540 place count 4454 transition count 7904
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 540 place count 4454 transition count 7903
Deduced a syphon composed of 1 places in 4 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 542 place count 4453 transition count 7903
Discarding 18 places :
Symmetric choice reduction at 2 with 18 rule applications. Total rules 560 place count 4435 transition count 7831
Iterating global reduction 2 with 18 rules applied. Total rules applied 578 place count 4435 transition count 7831
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Deduced a syphon composed of 32 places in 5 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 642 place count 4403 transition count 7799
Discarding 32 places :
Symmetric choice reduction at 2 with 32 rule applications. Total rules 674 place count 4371 transition count 7767
Iterating global reduction 2 with 32 rules applied. Total rules applied 706 place count 4371 transition count 7767
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 706 place count 4371 transition count 7761
Deduced a syphon composed of 6 places in 4 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 718 place count 4365 transition count 7761
Discarding 30 places :
Symmetric choice reduction at 2 with 30 rule applications. Total rules 748 place count 4335 transition count 7641
Iterating global reduction 2 with 30 rules applied. Total rules applied 778 place count 4335 transition count 7641
Applied a total of 778 rules in 2159 ms. Remains 4335 /4724 variables (removed 389) and now considering 7641/8231 (removed 590) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2160 ms. Remains : 4335/4724 places, 7641/8231 transitions.
[2023-03-22 14:14:43] [INFO ] Flatten gal took : 172 ms
[2023-03-22 14:14:44] [INFO ] Flatten gal took : 195 ms
[2023-03-22 14:14:44] [INFO ] Input system was already deterministic with 7641 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 62 places :
Symmetric choice reduction at 0 with 62 rule applications. Total rules 62 place count 4662 transition count 8115
Iterating global reduction 0 with 62 rules applied. Total rules applied 124 place count 4662 transition count 8115
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 168 place count 4618 transition count 8023
Iterating global reduction 0 with 44 rules applied. Total rules applied 212 place count 4618 transition count 8023
Discarding 26 places :
Symmetric choice reduction at 0 with 26 rule applications. Total rules 238 place count 4592 transition count 7919
Iterating global reduction 0 with 26 rules applied. Total rules applied 264 place count 4592 transition count 7919
Applied a total of 264 rules in 1190 ms. Remains 4592 /4724 variables (removed 132) and now considering 7919/8231 (removed 312) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1190 ms. Remains : 4592/4724 places, 7919/8231 transitions.
[2023-03-22 14:14:45] [INFO ] Flatten gal took : 179 ms
[2023-03-22 14:14:46] [INFO ] Flatten gal took : 207 ms
[2023-03-22 14:14:46] [INFO ] Input system was already deterministic with 7919 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4724/4724 places, 8231/8231 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 4652 transition count 8096
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 4652 transition count 8096
Discarding 51 places :
Symmetric choice reduction at 0 with 51 rule applications. Total rules 195 place count 4601 transition count 7991
Iterating global reduction 0 with 51 rules applied. Total rules applied 246 place count 4601 transition count 7991
Discarding 31 places :
Symmetric choice reduction at 0 with 31 rule applications. Total rules 277 place count 4570 transition count 7867
Iterating global reduction 0 with 31 rules applied. Total rules applied 308 place count 4570 transition count 7867
Applied a total of 308 rules in 1212 ms. Remains 4570 /4724 variables (removed 154) and now considering 7867/8231 (removed 364) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1212 ms. Remains : 4570/4724 places, 7867/8231 transitions.
[2023-03-22 14:14:47] [INFO ] Flatten gal took : 176 ms
[2023-03-22 14:14:47] [INFO ] Flatten gal took : 200 ms
[2023-03-22 14:14:48] [INFO ] Input system was already deterministic with 7867 transitions.
[2023-03-22 14:14:48] [INFO ] Flatten gal took : 200 ms
[2023-03-22 14:14:48] [INFO ] Flatten gal took : 210 ms
[2023-03-22 14:14:48] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-22 14:14:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 4724 places, 8231 transitions and 38037 arcs took 46 ms.
Total runtime 156550 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S24C04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/366
CTLFireability

FORMULA MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679495078012

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/366/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/366/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/366/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 37 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 42 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 0 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 47 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
lola: Created skeleton in 4.000000 secs.
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 52 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 57 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 62 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 67 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 72 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 77 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 82 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 15
lola: LAUNCH task # 53 (type EXCL) for 50 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15
lola: time limit : 195 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EG EXCL 4/195 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 --

Time elapsed: 87 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EG EXCL 11/195 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 --

Time elapsed: 94 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EG EXCL 16/195 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 --

Time elapsed: 99 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EG EXCL 23/195 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 --

Time elapsed: 106 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 2 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 EG EXCL 28/195 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 --

Time elapsed: 111 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 53 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15
lola: result : false
lola: markings : 1
lola: time used : 28.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 45 (type EXCL) for 44 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13
lola: time limit : 205 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 4/205 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 21630 m, 4326 m/sec, 47413 t fired, .

Time elapsed: 116 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 15
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 1 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 9/205 2/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 41012 m, 3876 m/sec, 90420 t fired, .

Time elapsed: 121 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 1 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 14/205 2/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 54288 m, 2655 m/sec, 120019 t fired, .

Time elapsed: 126 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 1 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 1 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 1 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 22/205 3/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 84492 m, 6040 m/sec, 186516 t fired, .

Time elapsed: 134 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 15
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 27/205 5/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 149694 m, 13040 m/sec, 331075 t fired, .

Time elapsed: 139 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 32/205 7/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 195850 m, 9231 m/sec, 433463 t fired, .

Time elapsed: 144 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 37/205 8/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 271353 m, 15100 m/sec, 601296 t fired, .

Time elapsed: 149 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 42/205 10/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 343070 m, 14343 m/sec, 761490 t fired, .

Time elapsed: 154 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 47/205 12/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 416935 m, 14773 m/sec, 926489 t fired, .

Time elapsed: 159 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 52/205 14/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 482302 m, 13073 m/sec, 1073260 t fired, .

Time elapsed: 164 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 57/205 16/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 545456 m, 12630 m/sec, 1215775 t fired, .

Time elapsed: 169 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 62/205 17/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 614378 m, 13784 m/sec, 1372075 t fired, .

Time elapsed: 174 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 67/205 20/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 685550 m, 14234 m/sec, 1530597 t fired, .

Time elapsed: 179 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 72/205 22/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 762770 m, 15444 m/sec, 1701765 t fired, .

Time elapsed: 184 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 77/205 24/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 836579 m, 14761 m/sec, 1866208 t fired, .

Time elapsed: 189 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 82/205 26/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 907975 m, 14279 m/sec, 2025652 t fired, .

Time elapsed: 194 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 87/205 28/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 978891 m, 14183 m/sec, 2184082 t fired, .

Time elapsed: 199 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 92/205 30/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 1055729 m, 15367 m/sec, 2356652 t fired, .

Time elapsed: 204 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 97/205 32/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 1125645 m, 13983 m/sec, 2514405 t fired, .

Time elapsed: 209 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 45 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 1 0 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 214 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 55 (type EXCL) for 50 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 5/211 2/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 45114 m, 9022 m/sec, 142694 t fired, .

Time elapsed: 219 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 10/211 4/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 95732 m, 10123 m/sec, 303278 t fired, .

Time elapsed: 224 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 15/211 5/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 143490 m, 9551 m/sec, 455083 t fired, .

Time elapsed: 229 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 20/211 6/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 182007 m, 7703 m/sec, 577714 t fired, .

Time elapsed: 234 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 25/211 8/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 234133 m, 10425 m/sec, 743437 t fired, .

Time elapsed: 239 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 30/211 10/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 285009 m, 10175 m/sec, 905481 t fired, .

Time elapsed: 244 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 35/211 10/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 336602 m, 10318 m/sec, 1069904 t fired, .

Time elapsed: 249 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 40/211 12/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 388559 m, 10391 m/sec, 1235705 t fired, .

Time elapsed: 254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 45/211 13/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 439579 m, 10204 m/sec, 1398654 t fired, .

Time elapsed: 259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 50/211 14/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 481230 m, 8330 m/sec, 1531840 t fired, .

Time elapsed: 264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 55/211 15/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 503710 m, 4496 m/sec, 1604096 t fired, .

Time elapsed: 269 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 60/211 16/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 553918 m, 10041 m/sec, 1765002 t fired, .

Time elapsed: 274 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 65/211 18/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 605172 m, 10250 m/sec, 1929855 t fired, .

Time elapsed: 279 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 70/211 19/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 656363 m, 10238 m/sec, 2094852 t fired, .

Time elapsed: 284 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 75/211 21/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 706499 m, 10027 m/sec, 2256983 t fired, .

Time elapsed: 289 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 80/211 22/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 757031 m, 10106 m/sec, 2419430 t fired, .

Time elapsed: 294 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 85/211 24/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 808349 m, 10263 m/sec, 2582387 t fired, .

Time elapsed: 299 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 90/211 26/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 858700 m, 10070 m/sec, 2742343 t fired, .

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 95/211 27/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 909086 m, 10077 m/sec, 2902750 t fired, .

Time elapsed: 309 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 100/211 28/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 925820 m, 3346 m/sec, 2956201 t fired, .

Time elapsed: 314 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 105/211 29/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 964288 m, 7693 m/sec, 3078824 t fired, .

Time elapsed: 319 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 110/211 30/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 1009045 m, 8951 m/sec, 3221372 t fired, .

Time elapsed: 324 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 1 0 3 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 115/211 31/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 1060377 m, 10266 m/sec, 3385468 t fired, .

Time elapsed: 329 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 55 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 334 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 48 (type EXCL) for 47 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14
lola: time limit : 217 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14
lola: result : false
lola: markings : 41
lola: fired transitions : 163
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 37 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12
lola: time limit : 233 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 37 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12
lola: time limit : 251 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 8/251 1/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 22384 m, 4476 m/sec, 26079 t fired, .

Time elapsed: 342 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 13/251 2/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 38225 m, 3168 m/sec, 44719 t fired, .

Time elapsed: 347 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 18/251 2/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 53902 m, 3135 m/sec, 63050 t fired, .

Time elapsed: 352 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 23/251 3/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 69708 m, 3161 m/sec, 81853 t fired, .

Time elapsed: 357 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 28/251 3/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 85227 m, 3103 m/sec, 100079 t fired, .

Time elapsed: 362 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 33/251 3/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 100940 m, 3142 m/sec, 118595 t fired, .

Time elapsed: 367 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 38/251 4/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 116664 m, 3144 m/sec, 137118 t fired, .

Time elapsed: 372 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 43/251 4/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 132412 m, 3149 m/sec, 155870 t fired, .

Time elapsed: 377 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 48/251 4/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 148179 m, 3153 m/sec, 174459 t fired, .

Time elapsed: 382 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 53/251 5/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 163962 m, 3156 m/sec, 193118 t fired, .

Time elapsed: 387 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 58/251 5/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 179821 m, 3171 m/sec, 212160 t fired, .

Time elapsed: 392 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 63/251 6/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 195614 m, 3158 m/sec, 230881 t fired, .

Time elapsed: 397 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 68/251 6/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 211449 m, 3167 m/sec, 249610 t fired, .

Time elapsed: 402 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 73/251 6/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 227411 m, 3192 m/sec, 268663 t fired, .

Time elapsed: 407 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 78/251 7/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 243345 m, 3186 m/sec, 287800 t fired, .

Time elapsed: 412 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 83/251 7/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 259177 m, 3166 m/sec, 306572 t fired, .

Time elapsed: 417 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 88/251 8/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 275233 m, 3211 m/sec, 325831 t fired, .

Time elapsed: 422 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 93/251 8/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 291359 m, 3225 m/sec, 345231 t fired, .

Time elapsed: 427 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 98/251 9/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 307475 m, 3223 m/sec, 364374 t fired, .

Time elapsed: 432 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 103/251 9/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 323587 m, 3222 m/sec, 383532 t fired, .

Time elapsed: 437 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 108/251 10/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 340020 m, 3286 m/sec, 403159 t fired, .

Time elapsed: 442 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 113/251 10/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 356138 m, 3223 m/sec, 422209 t fired, .

Time elapsed: 447 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 118/251 11/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 371948 m, 3162 m/sec, 440813 t fired, .

Time elapsed: 452 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 123/251 11/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 387800 m, 3170 m/sec, 459726 t fired, .

Time elapsed: 457 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 128/251 12/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 403646 m, 3169 m/sec, 478655 t fired, .

Time elapsed: 462 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 133/251 12/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 419782 m, 3227 m/sec, 498482 t fired, .

Time elapsed: 467 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 138/251 13/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 435582 m, 3160 m/sec, 517438 t fired, .

Time elapsed: 472 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 143/251 13/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 451805 m, 3244 m/sec, 537221 t fired, .

Time elapsed: 477 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 148/251 14/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 467819 m, 3202 m/sec, 556757 t fired, .

Time elapsed: 482 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 153/251 14/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 484033 m, 3242 m/sec, 576743 t fired, .

Time elapsed: 487 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 158/251 15/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 500137 m, 3220 m/sec, 596459 t fired, .

Time elapsed: 492 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 163/251 15/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 516384 m, 3249 m/sec, 616724 t fired, .

Time elapsed: 497 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 168/251 16/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 532516 m, 3226 m/sec, 636587 t fired, .

Time elapsed: 502 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 173/251 16/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 548834 m, 3263 m/sec, 657220 t fired, .

Time elapsed: 507 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 178/251 16/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 565388 m, 3310 m/sec, 678160 t fired, .

Time elapsed: 512 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 183/251 17/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 581883 m, 3299 m/sec, 699019 t fired, .

Time elapsed: 517 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 188/251 17/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 597794 m, 3182 m/sec, 718244 t fired, .

Time elapsed: 522 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 193/251 18/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 613488 m, 3138 m/sec, 736847 t fired, .

Time elapsed: 527 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 198/251 18/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 629071 m, 3116 m/sec, 755143 t fired, .

Time elapsed: 532 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 203/251 19/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 644723 m, 3130 m/sec, 773774 t fired, .

Time elapsed: 537 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 208/251 19/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 660305 m, 3116 m/sec, 792164 t fired, .

Time elapsed: 542 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 213/251 19/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 676078 m, 3154 m/sec, 810912 t fired, .

Time elapsed: 547 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 218/251 20/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 691674 m, 3119 m/sec, 829461 t fired, .

Time elapsed: 552 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 223/251 20/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 707367 m, 3138 m/sec, 848246 t fired, .

Time elapsed: 557 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 228/251 21/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 722969 m, 3120 m/sec, 866893 t fired, .

Time elapsed: 562 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 233/251 21/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 738679 m, 3142 m/sec, 885850 t fired, .

Time elapsed: 567 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 238/251 22/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 754277 m, 3119 m/sec, 904510 t fired, .

Time elapsed: 572 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 243/251 22/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 769698 m, 3084 m/sec, 922511 t fired, .

Time elapsed: 577 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 1 0 3 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 EXEF EXCL 248/251 23/32 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 785322 m, 3124 m/sec, 941141 t fired, .

Time elapsed: 582 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 40 (type EXCL) for MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-08: EG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-09: EFEG 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12: DISJ 0 0 0 0 3 1 0 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-15: DISJ 0 0 0 0 3 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 587 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 15
lola: LAUNCH task # 35 (type EXCL) for 34 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-11
lola: time limit : 251 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 40 (type EXCL) for 37 MultiCrashLeafsetExtension-PT-S24C04-CTLFireability-12
lola: time limit : 3013 sec
lola: memory limit: 5 pages
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 489 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S24C04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is MultiCrashLeafsetExtension-PT-S24C04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416600818"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S24C04.tgz
mv MultiCrashLeafsetExtension-PT-S24C04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;