Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856416300586.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is MAPK-PT-00320, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856416300586
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 7.7K Feb 26 10:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 10:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 26 10:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 10:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.5K Feb 26 10:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 26 10:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 10:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 10:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 25K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME MAPK-PT-00320-CTLFireability-00
FORMULA_NAME MAPK-PT-00320-CTLFireability-01
FORMULA_NAME MAPK-PT-00320-CTLFireability-02
FORMULA_NAME MAPK-PT-00320-CTLFireability-03
FORMULA_NAME MAPK-PT-00320-CTLFireability-04
FORMULA_NAME MAPK-PT-00320-CTLFireability-05
FORMULA_NAME MAPK-PT-00320-CTLFireability-06
FORMULA_NAME MAPK-PT-00320-CTLFireability-07
FORMULA_NAME MAPK-PT-00320-CTLFireability-08
FORMULA_NAME MAPK-PT-00320-CTLFireability-09
FORMULA_NAME MAPK-PT-00320-CTLFireability-10
FORMULA_NAME MAPK-PT-00320-CTLFireability-11
FORMULA_NAME MAPK-PT-00320-CTLFireability-12
FORMULA_NAME MAPK-PT-00320-CTLFireability-13
FORMULA_NAME MAPK-PT-00320-CTLFireability-14
FORMULA_NAME MAPK-PT-00320-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679465941829

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=MAPK-PT-00320
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 06:19:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 06:19:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 06:19:03] [INFO ] Load time of PNML (sax parser for PT used): 23 ms
[2023-03-22 06:19:03] [INFO ] Transformed 22 places.
[2023-03-22 06:19:03] [INFO ] Transformed 30 transitions.
[2023-03-22 06:19:03] [INFO ] Parsed PT model containing 22 places and 30 transitions and 90 arcs in 81 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 3 formulas.
FORMULA MAPK-PT-00320-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA MAPK-PT-00320-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA MAPK-PT-00320-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 22 out of 22 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 9 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
// Phase 1: matrix 30 rows 22 cols
[2023-03-22 06:19:03] [INFO ] Computed 7 place invariants in 9 ms
[2023-03-22 06:19:03] [INFO ] Implicit Places using invariants in 141 ms returned []
[2023-03-22 06:19:03] [INFO ] Invariant cache hit.
[2023-03-22 06:19:03] [INFO ] Implicit Places using invariants and state equation in 47 ms returned []
Implicit Place search using SMT with State Equation took 211 ms to find 0 implicit places.
[2023-03-22 06:19:03] [INFO ] Invariant cache hit.
[2023-03-22 06:19:03] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 259 ms. Remains : 22/22 places, 30/30 transitions.
Support contains 22 out of 22 places after structural reductions.
[2023-03-22 06:19:03] [INFO ] Flatten gal took : 15 ms
[2023-03-22 06:19:03] [INFO ] Flatten gal took : 5 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Incomplete random walk after 10096 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=142 ) properties (out of 37) seen :18
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 19) seen :5
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 14) seen :2
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :7
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-22 06:19:04] [INFO ] Invariant cache hit.
[2023-03-22 06:19:04] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2023-03-22 06:19:04] [INFO ] After 22ms SMT Verify possible using state equation in real domain returned unsat :0 sat :4 real:1
[2023-03-22 06:19:04] [INFO ] After 37ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-22 06:19:04] [INFO ] After 96ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-22 06:19:04] [INFO ] [Nat]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-22 06:19:04] [INFO ] After 24ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-22 06:19:04] [INFO ] After 42ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 13 ms.
[2023-03-22 06:19:04] [INFO ] After 93ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Fused 5 Parikh solutions to 2 different solutions.
Finished Parikh walk after 47 steps, including 0 resets, run visited all 5 properties in 3 ms. (steps per millisecond=15 )
Parikh walk visited 5 properties in 4 ms.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 3 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 5 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 22 transition count 29
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 20 transition count 29
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 20 transition count 28
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 5 place count 20 transition count 27
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 3 edges and 18 vertex of which 2 / 18 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 3 rules applied. Total rules applied 8 place count 17 transition count 27
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 10 place count 17 transition count 25
Partial Post-agglomeration rule applied 4 times.
Drop transitions removed 4 transitions
Iterating global reduction 3 with 4 rules applied. Total rules applied 14 place count 17 transition count 25
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 15 place count 16 transition count 24
Iterating global reduction 3 with 1 rules applied. Total rules applied 16 place count 16 transition count 24
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 17 place count 16 transition count 23
Applied a total of 17 rules in 14 ms. Remains 16 /22 variables (removed 6) and now considering 23/30 (removed 7) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 16/22 places, 23/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 22 transition count 30
Applied a total of 1 rules in 2 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 0 place count 22 transition count 29
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 20 transition count 29
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 20 transition count 28
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 5 place count 20 transition count 27
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 3 edges and 18 vertex of which 2 / 18 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 3 rules applied. Total rules applied 8 place count 17 transition count 27
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 10 place count 17 transition count 25
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 12 place count 17 transition count 25
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 13 place count 17 transition count 24
Applied a total of 13 rules in 5 ms. Remains 17 /22 variables (removed 5) and now considering 24/30 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 17/22 places, 24/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 1 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in LTL mode, iteration 0 : 22/22 places, 30/30 transitions.
Applied a total of 0 rules in 0 ms. Remains 22 /22 variables (removed 0) and now considering 30/30 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 22/22 places, 30/30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 1 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Input system was already deterministic with 30 transitions.
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Flatten gal took : 2 ms
[2023-03-22 06:19:04] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-22 06:19:04] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 22 places, 30 transitions and 90 arcs took 0 ms.
Total runtime 1338 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT MAPK-PT-00320
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA MAPK-PT-00320-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA MAPK-PT-00320-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679466140903

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 19 (type EXCL) for 18 MAPK-PT-00320-CTLFireability-06
lola: time limit : 180 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 19 (type EXCL) for MAPK-PT-00320-CTLFireability-06
lola: result : true
lola: markings : 81
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 51 (type SRCH) for MAPK-PT-00320-CTLFireability-09
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: FINISHED task # 4 (type EXCL) for MAPK-PT-00320-CTLFireability-01
lola: result : false
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lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 49 (type EQUN) for MAPK-PT-00320-CTLFireability-09
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
MAPK-PT-00320-CTLFireability-01: CTL false CTL model checker
MAPK-PT-00320-CTLFireability-06: CTL true CTL model checker
MAPK-PT-00320-CTLFireability-09: DISJ false DISJ
MAPK-PT-00320-CTLFireability-11: CTL false CTL model checker
MAPK-PT-00320-CTLFireability-13: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/450 6/32 MAPK-PT-00320-CTLFireability-05 1267099 m, 253419 m/sec, 8774973 t fired, .

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16 CTL EXCL 10/450 10/32 MAPK-PT-00320-CTLFireability-05 2418588 m, 230297 m/sec, 15893548 t fired, .

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16 CTL EXCL 15/450 15/32 MAPK-PT-00320-CTLFireability-05 3696734 m, 255629 m/sec, 22298300 t fired, .

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16 CTL EXCL 20/450 21/32 MAPK-PT-00320-CTLFireability-05 4990055 m, 258664 m/sec, 30164583 t fired, .

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16 CTL EXCL 25/450 26/32 MAPK-PT-00320-CTLFireability-05 6217395 m, 245468 m/sec, 37769093 t fired, .

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16 CTL EXCL 30/450 30/32 MAPK-PT-00320-CTLFireability-05 7359240 m, 228369 m/sec, 44953197 t fired, .

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MAPK-PT-00320-CTLFireability-11: CTL false CTL model checker
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MAPK-PT-00320-CTLFireability-00: AGEF unknown AGGR
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MAPK-PT-00320"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is MAPK-PT-00320, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856416300586"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/MAPK-PT-00320.tgz
mv MAPK-PT-00320 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;