Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415900338.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is LamportFastMutEx-COL-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415900338
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 8.5K Feb 25 13:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K Feb 25 13:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 25 13:41 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 13:41 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:20 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:20 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 25 13:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 13:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 13:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:20 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:20 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 38K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679445105898

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=LamportFastMutEx-COL-2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-22 00:31:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-22 00:31:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-22 00:31:47] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-22 00:31:47] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-22 00:31:48] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 601 ms
[2023-03-22 00:31:48] [INFO ] Imported 18 HL places and 17 HL transitions for a total of 69 PT places and 117.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
[2023-03-22 00:31:48] [INFO ] Built PT skeleton of HLPN with 18 places and 17 transitions 68 arcs in 4 ms.
[2023-03-22 00:31:48] [INFO ] Skeletonized 5 HLPN properties in 2 ms. Removed 11 properties that had guard overlaps.
Initial state reduction rules removed 2 formulas.
FORMULA LamportFastMutEx-COL-2-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-COL-2-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 3 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 92 steps, including 0 resets, run visited all 6 properties in 9 ms. (steps per millisecond=10 )
[2023-03-22 00:31:48] [INFO ] Flatten gal took : 13 ms
[2023-03-22 00:31:48] [INFO ] Flatten gal took : 2 ms
Domain [pid(3), pid(3)] of place P_wait breaks symmetries in sort pid
Symmetric sort wr.t. initial and guards and successors and join/free detected :P_bool
Arc [3:1*[$i, 1]] contains constants of sort P_bool
Transition T_setbi_2 : constants on arcs in [[3:1*[$i, 1]]] introduces in P_bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2023-03-22 00:31:48] [INFO ] Unfolded HLPN to a Petri net with 69 places and 96 transitions 402 arcs in 11 ms.
[2023-03-22 00:31:48] [INFO ] Unfolded 14 HLPN properties in 1 ms.
Initial state reduction rules removed 3 formulas.
Deduced a syphon composed of 25 places in 1 ms
Reduce places removed 25 places and 34 transitions.
FORMULA LamportFastMutEx-COL-2-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-COL-2-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-COL-2-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 44 out of 44 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 6 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
[2023-03-22 00:31:48] [INFO ] Flow matrix only has 56 transitions (discarded 6 similar events)
// Phase 1: matrix 56 rows 44 cols
[2023-03-22 00:31:48] [INFO ] Computed 10 place invariants in 7 ms
[2023-03-22 00:31:48] [INFO ] Implicit Places using invariants in 158 ms returned []
[2023-03-22 00:31:48] [INFO ] Flow matrix only has 56 transitions (discarded 6 similar events)
[2023-03-22 00:31:48] [INFO ] Invariant cache hit.
[2023-03-22 00:31:48] [INFO ] State equation strengthened by 16 read => feed constraints.
[2023-03-22 00:31:48] [INFO ] Implicit Places using invariants and state equation in 76 ms returned []
Implicit Place search using SMT with State Equation took 258 ms to find 0 implicit places.
[2023-03-22 00:31:48] [INFO ] Flow matrix only has 56 transitions (discarded 6 similar events)
[2023-03-22 00:31:48] [INFO ] Invariant cache hit.
[2023-03-22 00:31:48] [INFO ] Dead Transitions using invariants and state equation in 105 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 371 ms. Remains : 44/44 places, 62/62 transitions.
Support contains 44 out of 44 places after structural reductions.
[2023-03-22 00:31:48] [INFO ] Flatten gal took : 12 ms
[2023-03-22 00:31:48] [INFO ] Flatten gal took : 12 ms
[2023-03-22 00:31:48] [INFO ] Input system was already deterministic with 62 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 471 ms. (steps per millisecond=21 ) properties (out of 42) seen :37
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 110 ms. (steps per millisecond=90 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 131 ms. (steps per millisecond=76 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 112 ms. (steps per millisecond=89 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-22 00:31:49] [INFO ] Flow matrix only has 56 transitions (discarded 6 similar events)
[2023-03-22 00:31:49] [INFO ] Invariant cache hit.
[2023-03-22 00:31:49] [INFO ] [Real]Absence check using 10 positive place invariants in 3 ms returned sat
[2023-03-22 00:31:49] [INFO ] After 75ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:4
[2023-03-22 00:31:49] [INFO ] [Nat]Absence check using 10 positive place invariants in 2 ms returned sat
[2023-03-22 00:31:49] [INFO ] After 40ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :4
[2023-03-22 00:31:49] [INFO ] State equation strengthened by 16 read => feed constraints.
[2023-03-22 00:31:49] [INFO ] After 27ms SMT Verify possible using 16 Read/Feed constraints in natural domain returned unsat :1 sat :4
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 18 places in 37 ms of which 3 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 14 places in 30 ms of which 0 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 9 places in 27 ms of which 0 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 14 places in 28 ms of which 1 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 4 trap constraints in 144 ms
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 11 places in 26 ms of which 1 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 11 places in 24 ms of which 0 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 4 places in 25 ms of which 1 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 9 places in 25 ms of which 1 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 10 places in 23 ms of which 1 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 9 places in 22 ms of which 0 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Deduced a trap composed of 13 places in 25 ms of which 0 ms to minimize.
[2023-03-22 00:31:50] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 7 trap constraints in 206 ms
[2023-03-22 00:31:50] [INFO ] After 395ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :0
[2023-03-22 00:31:50] [INFO ] After 491ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 11 simplifications.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 14 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 10 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Computed a total of 1 stabilizing places and 2 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 10 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 5 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 10 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 42 transition count 60
Applied a total of 4 rules in 9 ms. Remains 42 /44 variables (removed 2) and now considering 60/62 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 42/44 places, 60/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 3 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 62/62 transitions.
Applied a total of 0 rules in 1 ms. Remains 44 /44 variables (removed 0) and now considering 62/62 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 44/44 places, 62/62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 4 ms
[2023-03-22 00:31:50] [INFO ] Input system was already deterministic with 62 transitions.
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 6 ms
[2023-03-22 00:31:50] [INFO ] Flatten gal took : 6 ms
[2023-03-22 00:31:50] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-22 00:31:50] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 44 places, 62 transitions and 256 arcs took 0 ms.
Total runtime 3305 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT LamportFastMutEx-COL-2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA LamportFastMutEx-COL-2-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LamportFastMutEx-COL-2-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679445111934

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 6 (type EXCL) for 3 LamportFastMutEx-COL-2-CTLFireability-04
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 6 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 21 (type EXCL) for 20 LamportFastMutEx-COL-2-CTLFireability-09
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 61 (type FNDP) for 13 LamportFastMutEx-COL-2-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 13 LamportFastMutEx-COL-2-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 13 LamportFastMutEx-COL-2-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 21 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-09
lola: result : true
lola: markings : 11
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 53 (type EXCL) for 52 LamportFastMutEx-COL-2-CTLFireability-13
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type FNDP) for LamportFastMutEx-COL-2-CTLFireability-07
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 62 (type EQUN) for LamportFastMutEx-COL-2-CTLFireability-07 (obsolete)
lola: CANCELED task # 64 (type SRCH) for LamportFastMutEx-COL-2-CTLFireability-07 (obsolete)
lola: LAUNCH task # 65 (type FNDP) for 23 LamportFastMutEx-COL-2-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 23 LamportFastMutEx-COL-2-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SRCH) for 23 LamportFastMutEx-COL-2-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SRCH) for LamportFastMutEx-COL-2-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-13
lola: result : false
lola: markings : 380
lola: fired transitions : 1674
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 LamportFastMutEx-COL-2-CTLFireability-11
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 68 (type SRCH) for LamportFastMutEx-COL-2-CTLFireability-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 65 (type FNDP) for LamportFastMutEx-COL-2-CTLFireability-10
lola: result : true
lola: fired transitions : 13
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 66 (type EQUN) for LamportFastMutEx-COL-2-CTLFireability-10 (obsolete)
lola: FINISHED task # 66 (type EQUN) for LamportFastMutEx-COL-2-CTLFireability-10
lola: result : unknown
lola: FINISHED task # 35 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-11
lola: result : false
lola: markings : 21
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 13 LamportFastMutEx-COL-2-CTLFireability-07
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 8 (type EXCL) for 3 LamportFastMutEx-COL-2-CTLFireability-04
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
sara: try reading problem file /home/mcc/execution/375/CTLFireability-62.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 8 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-04
lola: result : false
lola: markings : 68
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 70 (type EXCL) for 37 LamportFastMutEx-COL-2-CTLFireability-12
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 70 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type EXCL) for 58 LamportFastMutEx-COL-2-CTLFireability-15
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-15
lola: result : false
lola: markings : 86
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 LamportFastMutEx-COL-2-CTLFireability-05
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-05
lola: result : false
lola: markings : 7
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 LamportFastMutEx-COL-2-CTLFireability-00
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-00
lola: result : false
lola: markings : 31
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 LamportFastMutEx-COL-2-CTLFireability-14
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for LamportFastMutEx-COL-2-CTLFireability-14
lola: result : false
lola: markings : 8
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LamportFastMutEx-COL-2-CTLFireability-00: CTL false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-04: CONJ false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-05: CTL false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-07: CONJ false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-09: CTL true CTL model checker
LamportFastMutEx-COL-2-CTLFireability-10: DISJ true findpath
LamportFastMutEx-COL-2-CTLFireability-11: CTL false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-12: CONJ false state space /EXEF
LamportFastMutEx-COL-2-CTLFireability-13: CTL false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-14: CTL false CTL model checker
LamportFastMutEx-COL-2-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is LamportFastMutEx-COL-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415900338"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-2.tgz
mv LamportFastMutEx-COL-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;