About the Execution of LoLa+red for JoinFreeModules-PT-0050
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
12383.031 | 171663.00 | 166382.00 | 592.40 | FTF?F?FTFT?F?TTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415700178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is JoinFreeModules-PT-0050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415700178
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 652K
-rw-r--r-- 1 mcc users 8.6K Feb 25 11:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 25 11:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 11:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 25 11:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:18 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:18 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:18 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:18 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 11:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 145K Feb 25 11:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Feb 25 11:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 11:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 152K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-00
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-01
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-02
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-03
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-04
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-05
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-06
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-07
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-08
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-09
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-10
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-11
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-12
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-13
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-14
FORMULA_NAME JoinFreeModules-PT-0050-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679435743984
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=JoinFreeModules-PT-0050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 21:55:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 21:55:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 21:55:45] [INFO ] Load time of PNML (sax parser for PT used): 66 ms
[2023-03-21 21:55:45] [INFO ] Transformed 251 places.
[2023-03-21 21:55:45] [INFO ] Transformed 401 transitions.
[2023-03-21 21:55:45] [INFO ] Parsed PT model containing 251 places and 401 transitions and 1152 arcs in 124 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Initial state reduction rules removed 7 formulas.
Reduce places removed 1 places and 0 transitions.
FORMULA JoinFreeModules-PT-0050-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA JoinFreeModules-PT-0050-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 58 out of 250 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 19 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
// Phase 1: matrix 401 rows 250 cols
[2023-03-21 21:55:45] [INFO ] Computed 50 place invariants in 17 ms
[2023-03-21 21:55:45] [INFO ] Dead Transitions using invariants and state equation in 358 ms found 0 transitions.
[2023-03-21 21:55:45] [INFO ] Invariant cache hit.
[2023-03-21 21:55:46] [INFO ] Implicit Places using invariants in 70 ms returned []
[2023-03-21 21:55:46] [INFO ] Invariant cache hit.
[2023-03-21 21:55:46] [INFO ] State equation strengthened by 50 read => feed constraints.
[2023-03-21 21:55:46] [INFO ] Implicit Places using invariants and state equation in 156 ms returned []
Implicit Place search using SMT with State Equation took 229 ms to find 0 implicit places.
[2023-03-21 21:55:46] [INFO ] Invariant cache hit.
[2023-03-21 21:55:46] [INFO ] Dead Transitions using invariants and state equation in 161 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 792 ms. Remains : 250/250 places, 401/401 transitions.
Support contains 58 out of 250 places after structural reductions.
[2023-03-21 21:55:46] [INFO ] Flatten gal took : 61 ms
[2023-03-21 21:55:46] [INFO ] Flatten gal took : 22 ms
[2023-03-21 21:55:46] [INFO ] Input system was already deterministic with 401 transitions.
Incomplete random walk after 10007 steps, including 2 resets, run finished after 141 ms. (steps per millisecond=70 ) properties (out of 41) seen :40
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-21 21:55:46] [INFO ] Invariant cache hit.
[2023-03-21 21:55:46] [INFO ] After 44ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 9 simplifications.
[2023-03-21 21:55:46] [INFO ] Flatten gal took : 16 ms
[2023-03-21 21:55:46] [INFO ] Flatten gal took : 15 ms
[2023-03-21 21:55:46] [INFO ] Input system was already deterministic with 401 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 30 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:46] [INFO ] Invariant cache hit.
[2023-03-21 21:55:47] [INFO ] Dead Transitions using invariants and state equation in 159 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 191 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 14 ms
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 13 ms
[2023-03-21 21:55:47] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 30 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:47] [INFO ] Invariant cache hit.
[2023-03-21 21:55:47] [INFO ] Dead Transitions using invariants and state equation in 165 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 196 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 21 ms
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 13 ms
[2023-03-21 21:55:47] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in LTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 4 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:47] [INFO ] Invariant cache hit.
[2023-03-21 21:55:47] [INFO ] Dead Transitions using invariants and state equation in 141 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 148 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 11 ms
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 12 ms
[2023-03-21 21:55:47] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 13 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:47] [INFO ] Invariant cache hit.
[2023-03-21 21:55:47] [INFO ] Dead Transitions using invariants and state equation in 136 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 150 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 11 ms
[2023-03-21 21:55:47] [INFO ] Flatten gal took : 10 ms
[2023-03-21 21:55:47] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 11 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:47] [INFO ] Invariant cache hit.
[2023-03-21 21:55:48] [INFO ] Dead Transitions using invariants and state equation in 218 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 231 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 10 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 10 ms
[2023-03-21 21:55:48] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 9 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:48] [INFO ] Invariant cache hit.
[2023-03-21 21:55:48] [INFO ] Dead Transitions using invariants and state equation in 148 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 158 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 10 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 14 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:48] [INFO ] Invariant cache hit.
[2023-03-21 21:55:48] [INFO ] Dead Transitions using invariants and state equation in 141 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 156 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 8 ms
[2023-03-21 21:55:48] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in LTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 2 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:48] [INFO ] Invariant cache hit.
[2023-03-21 21:55:48] [INFO ] Dead Transitions using invariants and state equation in 155 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 158 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 8 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Input system was already deterministic with 401 transitions.
Starting structural reductions in LTL mode, iteration 0 : 250/250 places, 401/401 transitions.
Applied a total of 0 rules in 2 ms. Remains 250 /250 variables (removed 0) and now considering 401/401 (removed 0) transitions.
[2023-03-21 21:55:48] [INFO ] Invariant cache hit.
[2023-03-21 21:55:48] [INFO ] Dead Transitions using invariants and state equation in 148 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 151 ms. Remains : 250/250 places, 401/401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Input system was already deterministic with 401 transitions.
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:55:48] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLFireability.sr.xml took 1 ms.
[2023-03-21 21:55:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 250 places, 401 transitions and 1150 arcs took 3 ms.
Total runtime 3616 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT JoinFreeModules-PT-0050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability
FORMULA JoinFreeModules-PT-0050-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA JoinFreeModules-PT-0050-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA JoinFreeModules-PT-0050-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA JoinFreeModules-PT-0050-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA JoinFreeModules-PT-0050-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679435915647
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: LAUNCH task # 37 (type SKEL/SRCH) for 15 JoinFreeModules-PT-0050-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: FINISHED task # 37 (type SKEL/SRCH) for JoinFreeModules-PT-0050-CTLFireability-09
lola: result : false
lola: markings : 4561
lola: fired transitions : 5306
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 39 (type SKEL/FNDP) for 25 JoinFreeModules-PT-0050-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 40 (type SKEL/EQUN) for 25 JoinFreeModules-PT-0050-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 41 (type SKEL/SRCH) for 25 JoinFreeModules-PT-0050-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 42 (type SKEL/SRCH) for 25 JoinFreeModules-PT-0050-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: FINISHED task # 42 (type SKEL/SRCH) for JoinFreeModules-PT-0050-CTLFireability-11
lola: result : unknown
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 39 (type SKEL/FNDP) for JoinFreeModules-PT-0050-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 41 (type SKEL/SRCH) for JoinFreeModules-PT-0050-CTLFireability-11
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 40 (type EQUN) for JoinFreeModules-PT-0050-CTLFireability-11 (obsolete)
lola: LAUNCH task # 43 (type SKEL/SRCH) for 25 JoinFreeModules-PT-0050-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 44 (type EXCL) for 0 JoinFreeModules-PT-0050-CTLFireability-02
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type SKEL/SRCH) for JoinFreeModules-PT-0050-CTLFireability-11
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 40 (type SKEL/EQUN) for JoinFreeModules-PT-0050-CTLFireability-11
lola: result : unknown
lola: FINISHED task # 44 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-02
lola: result : true
lola: markings : 150
lola: fired transitions : 150
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 10 (type EXCL) for 9 JoinFreeModules-PT-0050-CTLFireability-06
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-06
lola: result : false
lola: markings : 5
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 JoinFreeModules-PT-0050-CTLFireability-03
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/514 11/32 JoinFreeModules-PT-0050-CTLFireability-03 1692243 m, 338448 m/sec, 2239580 t fired, .
Time elapsed: 6 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/514 21/32 JoinFreeModules-PT-0050-CTLFireability-03 3415310 m, 344613 m/sec, 4521077 t fired, .
Time elapsed: 11 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/514 32/32 JoinFreeModules-PT-0050-CTLFireability-03 5155233 m, 347984 m/sec, 6817333 t fired, .
Time elapsed: 16 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: CANCELED task # 4 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 21 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: LAUNCH task # 33 (type EXCL) for 32 JoinFreeModules-PT-0050-CTLFireability-12
lola: time limit : 596 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 5/596 2/32 JoinFreeModules-PT-0050-CTLFireability-12 281651 m, 56330 m/sec, 657334 t fired, .
Time elapsed: 26 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 10/596 4/32 JoinFreeModules-PT-0050-CTLFireability-12 550938 m, 53857 m/sec, 1286303 t fired, .
Time elapsed: 31 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 15/596 6/32 JoinFreeModules-PT-0050-CTLFireability-12 818706 m, 53553 m/sec, 1913252 t fired, .
Time elapsed: 36 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 20/596 7/32 JoinFreeModules-PT-0050-CTLFireability-12 1091654 m, 54589 m/sec, 2550446 t fired, .
Time elapsed: 41 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 25/596 9/32 JoinFreeModules-PT-0050-CTLFireability-12 1361770 m, 54023 m/sec, 3181448 t fired, .
Time elapsed: 46 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 30/596 10/32 JoinFreeModules-PT-0050-CTLFireability-12 1632112 m, 54068 m/sec, 3813828 t fired, .
Time elapsed: 51 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 35/596 12/32 JoinFreeModules-PT-0050-CTLFireability-12 1904329 m, 54443 m/sec, 4450534 t fired, .
Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 40/596 14/32 JoinFreeModules-PT-0050-CTLFireability-12 2170436 m, 53221 m/sec, 5071913 t fired, .
Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 45/596 15/32 JoinFreeModules-PT-0050-CTLFireability-12 2435580 m, 53028 m/sec, 5691662 t fired, .
Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 50/596 17/32 JoinFreeModules-PT-0050-CTLFireability-12 2700648 m, 53013 m/sec, 6311535 t fired, .
Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 55/596 19/32 JoinFreeModules-PT-0050-CTLFireability-12 2962129 m, 52296 m/sec, 6923255 t fired, .
Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 60/596 20/32 JoinFreeModules-PT-0050-CTLFireability-12 3226790 m, 52932 m/sec, 7541404 t fired, .
Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 65/596 22/32 JoinFreeModules-PT-0050-CTLFireability-12 3489588 m, 52559 m/sec, 8155386 t fired, .
Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 70/596 23/32 JoinFreeModules-PT-0050-CTLFireability-12 3753175 m, 52717 m/sec, 8771993 t fired, .
Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 75/596 25/32 JoinFreeModules-PT-0050-CTLFireability-12 4016341 m, 52633 m/sec, 9387400 t fired, .
Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 80/596 27/32 JoinFreeModules-PT-0050-CTLFireability-12 4281946 m, 53121 m/sec, 10007854 t fired, .
Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 85/596 28/32 JoinFreeModules-PT-0050-CTLFireability-12 4546411 m, 52893 m/sec, 10625607 t fired, .
Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 90/596 30/32 JoinFreeModules-PT-0050-CTLFireability-12 4811807 m, 53079 m/sec, 11246551 t fired, .
Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
33 CTL EXCL 95/596 32/32 JoinFreeModules-PT-0050-CTLFireability-12 5076192 m, 52877 m/sec, 11864693 t fired, .
Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: CANCELED task # 33 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: LAUNCH task # 7 (type EXCL) for 6 JoinFreeModules-PT-0050-CTLFireability-05
lola: time limit : 695 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/695 11/32 JoinFreeModules-PT-0050-CTLFireability-05 1792768 m, 358553 m/sec, 2372623 t fired, .
Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/695 22/32 JoinFreeModules-PT-0050-CTLFireability-05 3508894 m, 343225 m/sec, 4644549 t fired, .
Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/695 32/32 JoinFreeModules-PT-0050-CTLFireability-05 5221428 m, 342506 m/sec, 6904525 t fired, .
Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: CANCELED task # 7 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: LAUNCH task # 46 (type EXCL) for 15 JoinFreeModules-PT-0050-CTLFireability-09
lola: time limit : 864 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-09
lola: result : false
lola: markings : 8092
lola: fired transitions : 8575
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 JoinFreeModules-PT-0050-CTLFireability-08
lola: time limit : 1729 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-08
lola: result : false
lola: markings : 5
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 JoinFreeModules-PT-0050-CTLFireability-10
lola: time limit : 3459 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/3459 8/32 JoinFreeModules-PT-0050-CTLFireability-10 1201837 m, 240367 m/sec, 2792344 t fired, .
Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/3459 15/32 JoinFreeModules-PT-0050-CTLFireability-10 2352519 m, 230136 m/sec, 5466492 t fired, .
Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 15/3459 22/32 JoinFreeModules-PT-0050-CTLFireability-10 3499908 m, 229477 m/sec, 8132608 t fired, .
Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 20/3459 29/32 JoinFreeModules-PT-0050-CTLFireability-10 4644765 m, 228971 m/sec, 10788298 t fired, .
Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: CANCELED task # 23 (type EXCL) for JoinFreeModules-PT-0050-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
JoinFreeModules-PT-0050-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
JoinFreeModules-PT-0050-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 9
lola: Portfolio finished: no open tasks 9
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
JoinFreeModules-PT-0050-CTLFireability-02: F false state space / EG
JoinFreeModules-PT-0050-CTLFireability-03: CTL unknown AGGR
JoinFreeModules-PT-0050-CTLFireability-05: CTL unknown AGGR
JoinFreeModules-PT-0050-CTLFireability-06: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-08: CTL false CTL model checker
JoinFreeModules-PT-0050-CTLFireability-09: DISJ true LTL model checker
JoinFreeModules-PT-0050-CTLFireability-10: CTL unknown AGGR
JoinFreeModules-PT-0050-CTLFireability-11: CONJ false skeleton: CTL model checker
JoinFreeModules-PT-0050-CTLFireability-12: CTL unknown AGGR
Time elapsed: 166 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="JoinFreeModules-PT-0050"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is JoinFreeModules-PT-0050, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415700178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/JoinFreeModules-PT-0050.tgz
mv JoinFreeModules-PT-0050 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;