fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r231-tall-167856415600122
Last Updated
May 14, 2023

About the Execution of LoLa+red for IOTPpurchase-PT-C05M04P03D02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3072.239 179501.00 180249.00 795.40 F?TT?FFFFTT?TTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415600122.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is IOTPpurchase-PT-C05M04P03D02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415600122
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 9.7K Feb 25 15:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 25 15:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 25 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 25 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 15:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Feb 25 15:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 25 15:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 25 15:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rwxr-xr-x 1 mcc users 60K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-00
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-01
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-02
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-03
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-04
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-05
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-06
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-07
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-08
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-09
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-10
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-11
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-12
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-14
FORMULA_NAME IOTPpurchase-PT-C05M04P03D02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679434638172

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=IOTPpurchase-PT-C05M04P03D02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 21:37:19] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 21:37:19] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 21:37:19] [INFO ] Load time of PNML (sax parser for PT used): 141 ms
[2023-03-21 21:37:19] [INFO ] Transformed 111 places.
[2023-03-21 21:37:19] [INFO ] Transformed 45 transitions.
[2023-03-21 21:37:20] [INFO ] Parsed PT model containing 111 places and 45 transitions and 224 arcs in 308 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Support contains 99 out of 111 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 111/111 places, 45/45 transitions.
Ensure Unique test removed 7 places
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 104 transition count 45
Applied a total of 7 rules in 11 ms. Remains 104 /111 variables (removed 7) and now considering 45/45 (removed 0) transitions.
// Phase 1: matrix 45 rows 104 cols
[2023-03-21 21:37:20] [INFO ] Computed 60 place invariants in 19 ms
[2023-03-21 21:37:20] [INFO ] Implicit Places using invariants in 194 ms returned []
[2023-03-21 21:37:20] [INFO ] Invariant cache hit.
[2023-03-21 21:37:20] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-21 21:37:20] [INFO ] Implicit Places using invariants and state equation in 88 ms returned []
Implicit Place search using SMT with State Equation took 307 ms to find 0 implicit places.
[2023-03-21 21:37:20] [INFO ] Invariant cache hit.
[2023-03-21 21:37:20] [INFO ] Dead Transitions using invariants and state equation in 66 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 104/111 places, 45/45 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 386 ms. Remains : 104/111 places, 45/45 transitions.
Support contains 99 out of 104 places after structural reductions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 24 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 10 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Finished random walk after 442 steps, including 0 resets, run visited all 62 properties in 56 ms. (steps per millisecond=7 )
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 29 places
Discarding 7 places :
Implicit places reduction removed 7 places
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 68 transition count 45
Applied a total of 36 rules in 3 ms. Remains 68 /104 variables (removed 36) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 68/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 26 places
Discarding 8 places :
Implicit places reduction removed 8 places
Iterating post reduction 0 with 34 rules applied. Total rules applied 34 place count 70 transition count 45
Applied a total of 34 rules in 3 ms. Remains 70 /104 variables (removed 34) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 70/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 19 places
Discarding 5 places :
Implicit places reduction removed 5 places
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 80 transition count 45
Applied a total of 24 rules in 2 ms. Remains 80 /104 variables (removed 24) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 26 places
Discarding 7 places :
Implicit places reduction removed 7 places
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 71 transition count 39
Reduce places removed 9 places and 0 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 14 rules applied. Total rules applied 27 place count 62 transition count 34
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 6 rules applied. Total rules applied 33 place count 57 transition count 33
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 34 place count 56 transition count 33
Performed 10 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 10 Pre rules applied. Total rules applied 34 place count 56 transition count 23
Deduced a syphon composed of 10 places in 1 ms
Ensure Unique test removed 2 places
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 4 with 26 rules applied. Total rules applied 60 place count 40 transition count 23
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 4 with 1 rules applied. Total rules applied 61 place count 39 transition count 23
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 3 Pre rules applied. Total rules applied 61 place count 39 transition count 20
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 5 with 7 rules applied. Total rules applied 68 place count 35 transition count 20
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 5 with 12 rules applied. Total rules applied 80 place count 28 transition count 15
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 82 place count 27 transition count 14
Applied a total of 82 rules in 14 ms. Remains 27 /104 variables (removed 77) and now considering 14/45 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 27/104 places, 14/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 24 places
Discarding 8 places :
Implicit places reduction removed 8 places
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 72 transition count 45
Applied a total of 32 rules in 2 ms. Remains 72 /104 variables (removed 32) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 72/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 18 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 22 rules applied. Total rules applied 22 place count 82 transition count 45
Applied a total of 22 rules in 2 ms. Remains 82 /104 variables (removed 22) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 82/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 29 places
Discarding 8 places :
Implicit places reduction removed 8 places
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 67 transition count 39
Reduce places removed 9 places and 0 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 1 with 14 rules applied. Total rules applied 28 place count 58 transition count 34
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 33 place count 53 transition count 34
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 12 Pre rules applied. Total rules applied 33 place count 53 transition count 22
Deduced a syphon composed of 12 places in 0 ms
Ensure Unique test removed 3 places
Reduce places removed 19 places and 0 transitions.
Iterating global reduction 3 with 31 rules applied. Total rules applied 64 place count 34 transition count 22
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 64 place count 34 transition count 19
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 70 place count 31 transition count 19
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 3 with 20 rules applied. Total rules applied 90 place count 19 transition count 11
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 3 with 2 rules applied. Total rules applied 92 place count 17 transition count 11
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 92 place count 17 transition count 9
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 4 with 5 rules applied. Total rules applied 97 place count 14 transition count 9
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 4 with 1 rules applied. Total rules applied 98 place count 14 transition count 8
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 5 with 3 rules applied. Total rules applied 101 place count 12 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 102 place count 11 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 7 with 2 rules applied. Total rules applied 104 place count 10 transition count 6
Applied a total of 104 rules in 7 ms. Remains 10 /104 variables (removed 94) and now considering 6/45 (removed 39) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 10/104 places, 6/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 0 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 0 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 26 places
Discarding 8 places :
Implicit places reduction removed 8 places
Iterating post reduction 0 with 34 rules applied. Total rules applied 34 place count 70 transition count 45
Applied a total of 34 rules in 3 ms. Remains 70 /104 variables (removed 34) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 70/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:20] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 26 places
Discarding 6 places :
Implicit places reduction removed 6 places
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 72 transition count 45
Applied a total of 32 rules in 1 ms. Remains 72 /104 variables (removed 32) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 72/104 places, 45/45 transitions.
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:20] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 20 places
Discarding 4 places :
Implicit places reduction removed 4 places
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 80 transition count 45
Applied a total of 24 rules in 2 ms. Remains 80 /104 variables (removed 24) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/104 places, 45/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 18 places
Discarding 7 places :
Implicit places reduction removed 7 places
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 79 transition count 42
Reduce places removed 6 places and 0 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 10 rules applied. Total rules applied 20 place count 73 transition count 38
Reduce places removed 4 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 2 with 6 rules applied. Total rules applied 26 place count 69 transition count 36
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 28 place count 67 transition count 36
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 7 Pre rules applied. Total rules applied 28 place count 67 transition count 29
Deduced a syphon composed of 7 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 4 with 19 rules applied. Total rules applied 47 place count 55 transition count 29
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 47 place count 55 transition count 27
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 51 place count 53 transition count 27
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 4 with 9 rules applied. Total rules applied 60 place count 48 transition count 23
Applied a total of 60 rules in 7 ms. Remains 48 /104 variables (removed 56) and now considering 23/45 (removed 22) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 48/104 places, 23/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 11 places
Discarding 5 places :
Implicit places reduction removed 5 places
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 88 transition count 45
Applied a total of 16 rules in 1 ms. Remains 88 /104 variables (removed 16) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 88/104 places, 45/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 29 places
Discarding 8 places :
Implicit places reduction removed 8 places
Iterating post reduction 0 with 37 rules applied. Total rules applied 37 place count 67 transition count 45
Applied a total of 37 rules in 2 ms. Remains 67 /104 variables (removed 37) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 67/104 places, 45/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 3 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 29 places
Discarding 7 places :
Implicit places reduction removed 7 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 12 rules applied. Total rules applied 12 place count 68 transition count 40
Reduce places removed 8 places and 0 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 12 rules applied. Total rules applied 24 place count 60 transition count 36
Reduce places removed 4 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 5 rules applied. Total rules applied 29 place count 56 transition count 35
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 30 place count 55 transition count 35
Performed 9 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 9 Pre rules applied. Total rules applied 30 place count 55 transition count 26
Deduced a syphon composed of 9 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 4 with 22 rules applied. Total rules applied 52 place count 42 transition count 26
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 1 Pre rules applied. Total rules applied 52 place count 42 transition count 25
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 54 place count 41 transition count 25
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 4 with 10 rules applied. Total rules applied 64 place count 35 transition count 21
Applied a total of 64 rules in 6 ms. Remains 35 /104 variables (removed 69) and now considering 21/45 (removed 24) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 35/104 places, 21/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 22 places
Discarding 6 places :
Implicit places reduction removed 6 places
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 76 transition count 45
Applied a total of 28 rules in 2 ms. Remains 76 /104 variables (removed 28) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 76/104 places, 45/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 104/104 places, 45/45 transitions.
Ensure Unique test removed 24 places
Discarding 8 places :
Implicit places reduction removed 8 places
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 72 transition count 40
Reduce places removed 7 places and 0 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 10 rules applied. Total rules applied 23 place count 65 transition count 37
Reduce places removed 3 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 2 with 4 rules applied. Total rules applied 27 place count 62 transition count 36
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 28 place count 61 transition count 36
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 12 Pre rules applied. Total rules applied 28 place count 61 transition count 24
Deduced a syphon composed of 12 places in 1 ms
Ensure Unique test removed 3 places
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 4 with 32 rules applied. Total rules applied 60 place count 41 transition count 24
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 3 Pre rules applied. Total rules applied 60 place count 41 transition count 21
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 4 with 6 rules applied. Total rules applied 66 place count 38 transition count 21
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 4 with 20 rules applied. Total rules applied 86 place count 26 transition count 13
Discarding 2 places :
Implicit places reduction removed 2 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 3 rules applied. Total rules applied 89 place count 24 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 90 place count 23 transition count 12
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 90 place count 23 transition count 11
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 6 with 3 rules applied. Total rules applied 93 place count 21 transition count 11
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 6 with 1 rules applied. Total rules applied 94 place count 21 transition count 10
Reduce places removed 2 places and 0 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 7 with 3 rules applied. Total rules applied 97 place count 19 transition count 9
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 8 with 2 rules applied. Total rules applied 99 place count 18 transition count 8
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 9 with 1 rules applied. Total rules applied 100 place count 17 transition count 8
Applied a total of 100 rules in 13 ms. Remains 17 /104 variables (removed 87) and now considering 8/45 (removed 37) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 17/104 places, 8/45 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 0 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 0 ms
[2023-03-21 21:37:21] [INFO ] Input system was already deterministic with 8 transitions.
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:37:21] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:37:21] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-21 21:37:21] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 104 places, 45 transitions and 210 arcs took 1 ms.
Total runtime 1476 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT IOTPpurchase-PT-C05M04P03D02
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IOTPpurchase-PT-C05M04P03D02-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679434817673

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 13 (type EXCL) for 12 IOTPpurchase-PT-C05M04P03D02-CTLFireability-04
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type FNDP) for 39 IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 39 IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SRCH) for 39 IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type SRCH) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: result : true
lola: markings : 18
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-13 (obsolete)
lola: CANCELED task # 53 (type EQUN) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-13 (obsolete)
lola: FINISHED task # 52 (type FNDP) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: result : true
lola: fired transitions : 16
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/374/CTLFireability-53.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 53 (type EQUN) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-13
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 4/436 7/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-05 1497487 m, 299497 m/sec, 5568850 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 9/436 12/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-05 2832035 m, 266909 m/sec, 11287477 t fired, .

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lola: FINISHED task # 16 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-05
lola: result : false
lola: markings : 3612076
lola: fired transitions : 14876043
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lola: LAUNCH task # 7 (type EXCL) for 6 IOTPpurchase-PT-C05M04P03D02-CTLFireability-02
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lola: FINISHED task # 7 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-02
lola: result : true
lola: markings : 138265
lola: fired transitions : 487655
lola: time used : 1.000000
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lola: LAUNCH task # 4 (type EXCL) for 3 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 1/579 3/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 500682 m, 100136 m/sec, 1449668 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 6/579 10/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 2184856 m, 336834 m/sec, 6818115 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 11/579 14/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 3282826 m, 219594 m/sec, 11480749 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 16/579 17/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 3914381 m, 126311 m/sec, 15366026 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 21/579 19/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 4488649 m, 114853 m/sec, 18956324 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 26/579 22/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 5070620 m, 116394 m/sec, 22605955 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 31/579 24/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 5664907 m, 118857 m/sec, 26380349 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 36/579 27/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 6253108 m, 117640 m/sec, 30148609 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 41/579 29/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 6821435 m, 113665 m/sec, 33800046 t fired, .

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
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IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

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IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 46/579 32/32 IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 7416336 m, 118980 m/sec, 37671188 t fired, .

Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 175 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 IOTPpurchase-PT-C05M04P03D02-CTLFireability-00
lola: time limit : 685 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-00
lola: result : false
lola: markings : 257
lola: fired transitions : 261
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 IOTPpurchase-PT-C05M04P03D02-CTLFireability-06
lola: time limit : 856 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-06
lola: result : false
lola: markings : 57
lola: fired transitions : 141
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 IOTPpurchase-PT-C05M04P03D02-CTLFireability-15
lola: time limit : 1141 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-15
lola: result : false
lola: markings : 3679
lola: fired transitions : 14029
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 IOTPpurchase-PT-C05M04P03D02-CTLFireability-10
lola: time limit : 1712 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-10
lola: result : true
lola: markings : 4147
lola: fired transitions : 7879
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 IOTPpurchase-PT-C05M04P03D02-CTLFireability-03
lola: time limit : 3425 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for IOTPpurchase-PT-C05M04P03D02-CTLFireability-03
lola: result : true
lola: markings : 70
lola: fired transitions : 118
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IOTPpurchase-PT-C05M04P03D02-CTLFireability-00: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-01: CTL unknown AGGR
IOTPpurchase-PT-C05M04P03D02-CTLFireability-02: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-03: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-04: CTL unknown AGGR
IOTPpurchase-PT-C05M04P03D02-CTLFireability-05: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-06: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-07: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-08: CTL false CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-09: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-10: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-11: CTL unknown AGGR
IOTPpurchase-PT-C05M04P03D02-CTLFireability-12: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-13: DISJ true search / frozen tokens
IOTPpurchase-PT-C05M04P03D02-CTLFireability-14: CTL true CTL model checker
IOTPpurchase-PT-C05M04P03D02-CTLFireability-15: CTL false CTL model checker


Time elapsed: 175 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="IOTPpurchase-PT-C05M04P03D02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is IOTPpurchase-PT-C05M04P03D02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415600122"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/IOTPpurchase-PT-C05M04P03D02.tgz
mv IOTPpurchase-PT-C05M04P03D02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;