Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415600098.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is IBMB2S565S3960-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415600098
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 9.3K Feb 26 05:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 26 05:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 26 05:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 05:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 16:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 05:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 05:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 05:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 26 05:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 127K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-00
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-01
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-02
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-03
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-04
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-05
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-06
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-07
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-08
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-09
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-10
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-11
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-12
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-13
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-14
FORMULA_NAME IBMB2S565S3960-PT-none-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679434454769

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=IBMB2S565S3960-PT-none
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 21:34:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 21:34:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 21:34:16] [INFO ] Load time of PNML (sax parser for PT used): 44 ms
[2023-03-21 21:34:16] [INFO ] Transformed 273 places.
[2023-03-21 21:34:16] [INFO ] Transformed 179 transitions.
[2023-03-21 21:34:16] [INFO ] Parsed PT model containing 273 places and 179 transitions and 572 arcs in 104 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 108 out of 273 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 273/273 places, 179/179 transitions.
Ensure Unique test removed 59 places
Reduce places removed 69 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 70 rules applied. Total rules applied 70 place count 204 transition count 178
Discarding 6 places :
Symmetric choice reduction at 1 with 6 rule applications. Total rules 76 place count 198 transition count 172
Iterating global reduction 1 with 6 rules applied. Total rules applied 82 place count 198 transition count 172
Applied a total of 82 rules in 26 ms. Remains 198 /273 variables (removed 75) and now considering 172/179 (removed 7) transitions.
// Phase 1: matrix 172 rows 198 cols
[2023-03-21 21:34:16] [INFO ] Computed 38 place invariants in 24 ms
[2023-03-21 21:34:16] [INFO ] Implicit Places using invariants in 216 ms returned []
[2023-03-21 21:34:16] [INFO ] Invariant cache hit.
[2023-03-21 21:34:16] [INFO ] Implicit Places using invariants and state equation in 110 ms returned []
Implicit Place search using SMT with State Equation took 351 ms to find 0 implicit places.
[2023-03-21 21:34:16] [INFO ] Invariant cache hit.
[2023-03-21 21:34:16] [INFO ] Dead Transitions using invariants and state equation in 120 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 198/273 places, 172/179 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 498 ms. Remains : 198/273 places, 172/179 transitions.
Support contains 108 out of 198 places after structural reductions.
[2023-03-21 21:34:17] [INFO ] Flatten gal took : 32 ms
[2023-03-21 21:34:17] [INFO ] Flatten gal took : 13 ms
[2023-03-21 21:34:17] [INFO ] Input system was already deterministic with 172 transitions.
Incomplete random walk after 10000 steps, including 38 resets, run finished after 300 ms. (steps per millisecond=33 ) properties (out of 65) seen :55
Incomplete Best-First random walk after 10001 steps, including 5 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 10) seen :6
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 6 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :1
Running SMT prover for 2 properties.
[2023-03-21 21:34:17] [INFO ] Invariant cache hit.
[2023-03-21 21:34:17] [INFO ] [Real]Absence check using 0 positive and 38 generalized place invariants in 5 ms returned sat
[2023-03-21 21:34:17] [INFO ] After 145ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-21 21:34:17] [INFO ] [Nat]Absence check using 0 positive and 38 generalized place invariants in 5 ms returned sat
[2023-03-21 21:34:18] [INFO ] After 62ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-21 21:34:18] [INFO ] After 96ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :2
Attempting to minimize the solution found.
Minimization took 27 ms.
[2023-03-21 21:34:18] [INFO ] After 185ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :2
Fused 2 Parikh solutions to 1 different solutions.
Finished Parikh walk after 276 steps, including 0 resets, run visited all 2 properties in 5 ms. (steps per millisecond=55 )
Parikh walk visited 2 properties in 6 ms.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 9 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 172 transitions.
Computed a total of 95 stabilizing places and 77 stable transitions
Graph (complete) has 263 edges and 198 vertex of which 135 are kept as prefixes of interest. Removing 63 places using SCC suffix rule.6 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 142 are kept as prefixes of interest. Removing 56 places using SCC suffix rule.1 ms
Discarding 56 places :
Also discarding 48 output transitions
Drop transitions removed 48 transitions
Ensure Unique test removed 23 places
Reduce places removed 24 places and 1 transitions.
Drop transitions removed 49 transitions
Trivial Post-agglo rules discarded 49 transitions
Performed 49 trivial Post agglomeration. Transition count delta: 49
Iterating post reduction 0 with 49 rules applied. Total rules applied 50 place count 118 transition count 74
Reduce places removed 49 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 53 rules applied. Total rules applied 103 place count 69 transition count 70
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 107 place count 65 transition count 70
Performed 17 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 17 Pre rules applied. Total rules applied 107 place count 65 transition count 53
Deduced a syphon composed of 17 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 3 with 35 rules applied. Total rules applied 142 place count 47 transition count 53
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 147 place count 42 transition count 48
Iterating global reduction 3 with 5 rules applied. Total rules applied 152 place count 42 transition count 48
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 154 place count 41 transition count 47
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 156 place count 40 transition count 46
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 157 place count 40 transition count 45
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 159 place count 39 transition count 45
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 4 with 3 rules applied. Total rules applied 162 place count 39 transition count 42
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 4 with 2 rules applied. Total rules applied 164 place count 39 transition count 40
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 166 place count 37 transition count 40
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 166 place count 37 transition count 39
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 168 place count 36 transition count 39
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 6 with 2 rules applied. Total rules applied 170 place count 36 transition count 37
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 6 with 1 rules applied. Total rules applied 171 place count 36 transition count 36
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 172 place count 35 transition count 36
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 8 with 1 rules applied. Total rules applied 173 place count 35 transition count 36
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 8 with 1 rules applied. Total rules applied 174 place count 34 transition count 35
Ensure Unique test removed 2 places
Iterating post reduction 8 with 2 rules applied. Total rules applied 176 place count 32 transition count 35
Discarding 1 places :
Symmetric choice reduction at 9 with 1 rule applications. Total rules 177 place count 31 transition count 33
Iterating global reduction 9 with 1 rules applied. Total rules applied 178 place count 31 transition count 33
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 9 with 1 rules applied. Total rules applied 179 place count 30 transition count 32
Applied a total of 179 rules in 32 ms. Remains 30 /198 variables (removed 168) and now considering 32/172 (removed 140) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 30/198 places, 32/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 32 places
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 166 transition count 172
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 47 place count 151 transition count 157
Iterating global reduction 1 with 15 rules applied. Total rules applied 62 place count 151 transition count 157
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 63 place count 151 transition count 156
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 65 place count 149 transition count 154
Iterating global reduction 2 with 2 rules applied. Total rules applied 67 place count 149 transition count 154
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 68 place count 148 transition count 153
Iterating global reduction 2 with 1 rules applied. Total rules applied 69 place count 148 transition count 153
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 70 place count 147 transition count 152
Iterating global reduction 2 with 1 rules applied. Total rules applied 71 place count 147 transition count 152
Applied a total of 71 rules in 30 ms. Remains 147 /198 variables (removed 51) and now considering 152/172 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 147/198 places, 152/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 152 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 135 are kept as prefixes of interest. Removing 63 places using SCC suffix rule.1 ms
Discarding 63 places :
Also discarding 53 output transitions
Drop transitions removed 53 transitions
Ensure Unique test removed 22 places
Reduce places removed 23 places and 1 transitions.
Drop transitions removed 61 transitions
Trivial Post-agglo rules discarded 61 transitions
Performed 61 trivial Post agglomeration. Transition count delta: 61
Iterating post reduction 0 with 61 rules applied. Total rules applied 62 place count 112 transition count 57
Reduce places removed 61 places and 0 transitions.
Graph (trivial) has 34 edges and 51 vertex of which 5 / 51 are part of one of the 1 SCC in 1 ms
Free SCC test removed 4 places
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 64 rules applied. Total rules applied 126 place count 47 transition count 55
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 134 place count 45 transition count 49
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 11 Pre rules applied. Total rules applied 134 place count 45 transition count 38
Deduced a syphon composed of 11 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 3 with 23 rules applied. Total rules applied 157 place count 33 transition count 38
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 159 place count 31 transition count 36
Iterating global reduction 3 with 2 rules applied. Total rules applied 161 place count 31 transition count 36
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 163 place count 30 transition count 35
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 165 place count 29 transition count 34
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 166 place count 29 transition count 33
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 168 place count 28 transition count 33
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 4 with 3 rules applied. Total rules applied 171 place count 28 transition count 30
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 4 with 1 rules applied. Total rules applied 172 place count 28 transition count 29
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 173 place count 27 transition count 29
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 2 Pre rules applied. Total rules applied 173 place count 27 transition count 27
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 6 with 4 rules applied. Total rules applied 177 place count 25 transition count 27
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 6 with 2 rules applied. Total rules applied 179 place count 25 transition count 25
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 181 place count 24 transition count 25
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 182 place count 24 transition count 25
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 6 with 1 rules applied. Total rules applied 183 place count 23 transition count 24
Ensure Unique test removed 2 places
Iterating post reduction 6 with 2 rules applied. Total rules applied 185 place count 21 transition count 24
Discarding 1 places :
Symmetric choice reduction at 7 with 1 rule applications. Total rules 186 place count 20 transition count 22
Iterating global reduction 7 with 1 rules applied. Total rules applied 187 place count 20 transition count 22
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 7 with 1 rules applied. Total rules applied 188 place count 19 transition count 21
Applied a total of 188 rules in 20 ms. Remains 19 /198 variables (removed 179) and now considering 21/172 (removed 151) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 19/198 places, 21/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 30 places
Iterating post reduction 0 with 30 rules applied. Total rules applied 30 place count 168 transition count 172
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 45 place count 153 transition count 157
Iterating global reduction 1 with 15 rules applied. Total rules applied 60 place count 153 transition count 157
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 61 place count 153 transition count 156
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 63 place count 151 transition count 154
Iterating global reduction 2 with 2 rules applied. Total rules applied 65 place count 151 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 67 place count 149 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 69 place count 149 transition count 152
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 71 place count 147 transition count 150
Iterating global reduction 2 with 2 rules applied. Total rules applied 73 place count 147 transition count 150
Applied a total of 73 rules in 15 ms. Remains 147 /198 variables (removed 51) and now considering 150/172 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 147/198 places, 150/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 150 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 156 are kept as prefixes of interest. Removing 42 places using SCC suffix rule.1 ms
Discarding 42 places :
Also discarding 35 output transitions
Drop transitions removed 35 transitions
Ensure Unique test removed 24 places
Reduce places removed 25 places and 1 transitions.
Drop transitions removed 67 transitions
Trivial Post-agglo rules discarded 67 transitions
Performed 67 trivial Post agglomeration. Transition count delta: 67
Iterating post reduction 0 with 67 rules applied. Total rules applied 68 place count 131 transition count 69
Reduce places removed 67 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 68 rules applied. Total rules applied 136 place count 64 transition count 68
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 137 place count 63 transition count 68
Performed 17 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 17 Pre rules applied. Total rules applied 137 place count 63 transition count 51
Deduced a syphon composed of 17 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 18 places and 0 transitions.
Iterating global reduction 3 with 35 rules applied. Total rules applied 172 place count 45 transition count 51
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 3 with 1 rules applied. Total rules applied 173 place count 44 transition count 51
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 175 place count 42 transition count 49
Iterating global reduction 4 with 2 rules applied. Total rules applied 177 place count 42 transition count 49
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 179 place count 41 transition count 48
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 181 place count 40 transition count 47
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 182 place count 40 transition count 46
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 184 place count 39 transition count 46
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 5 with 5 rules applied. Total rules applied 189 place count 39 transition count 41
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 5 with 1 rules applied. Total rules applied 190 place count 39 transition count 40
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 6 with 2 rules applied. Total rules applied 192 place count 38 transition count 39
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 193 place count 37 transition count 39
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 8 with 3 Pre rules applied. Total rules applied 193 place count 37 transition count 36
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 8 with 6 rules applied. Total rules applied 199 place count 34 transition count 36
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 8 with 1 rules applied. Total rules applied 200 place count 34 transition count 35
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 8 with 1 rules applied. Total rules applied 201 place count 34 transition count 35
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 8 with 1 rules applied. Total rules applied 202 place count 33 transition count 34
Ensure Unique test removed 2 places
Iterating post reduction 8 with 2 rules applied. Total rules applied 204 place count 31 transition count 34
Discarding 1 places :
Symmetric choice reduction at 9 with 1 rule applications. Total rules 205 place count 30 transition count 32
Iterating global reduction 9 with 1 rules applied. Total rules applied 206 place count 30 transition count 32
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 9 with 1 rules applied. Total rules applied 207 place count 29 transition count 31
Applied a total of 207 rules in 18 ms. Remains 29 /198 variables (removed 169) and now considering 31/172 (removed 141) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 29/198 places, 31/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 32 places
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 166 transition count 172
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 47 place count 151 transition count 157
Iterating global reduction 1 with 15 rules applied. Total rules applied 62 place count 151 transition count 157
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 63 place count 151 transition count 156
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 65 place count 149 transition count 154
Iterating global reduction 2 with 2 rules applied. Total rules applied 67 place count 149 transition count 154
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 69 place count 147 transition count 152
Iterating global reduction 2 with 2 rules applied. Total rules applied 71 place count 147 transition count 152
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 73 place count 145 transition count 150
Iterating global reduction 2 with 2 rules applied. Total rules applied 75 place count 145 transition count 150
Applied a total of 75 rules in 13 ms. Remains 145 /198 variables (removed 53) and now considering 150/172 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 145/198 places, 150/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 150 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 25 places
Iterating post reduction 0 with 25 rules applied. Total rules applied 25 place count 173 transition count 172
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 37 place count 161 transition count 160
Iterating global reduction 1 with 12 rules applied. Total rules applied 49 place count 161 transition count 160
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 50 place count 161 transition count 159
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 52 place count 159 transition count 157
Iterating global reduction 2 with 2 rules applied. Total rules applied 54 place count 159 transition count 157
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 56 place count 157 transition count 155
Iterating global reduction 2 with 2 rules applied. Total rules applied 58 place count 157 transition count 155
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 60 place count 155 transition count 153
Iterating global reduction 2 with 2 rules applied. Total rules applied 62 place count 155 transition count 153
Applied a total of 62 rules in 13 ms. Remains 155 /198 variables (removed 43) and now considering 153/172 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 155/198 places, 153/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 153 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 137 are kept as prefixes of interest. Removing 61 places using SCC suffix rule.1 ms
Discarding 61 places :
Also discarding 52 output transitions
Drop transitions removed 52 transitions
Ensure Unique test removed 24 places
Reduce places removed 25 places and 1 transitions.
Drop transitions removed 63 transitions
Trivial Post-agglo rules discarded 63 transitions
Performed 63 trivial Post agglomeration. Transition count delta: 63
Iterating post reduction 0 with 63 rules applied. Total rules applied 64 place count 112 transition count 56
Reduce places removed 63 places and 0 transitions.
Graph (trivial) has 36 edges and 49 vertex of which 3 / 49 are part of one of the 1 SCC in 0 ms
Free SCC test removed 2 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 65 rules applied. Total rules applied 129 place count 47 transition count 55
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 2 with 5 rules applied. Total rules applied 134 place count 46 transition count 51
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 135 place count 45 transition count 51
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 12 Pre rules applied. Total rules applied 135 place count 45 transition count 39
Deduced a syphon composed of 12 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 4 with 25 rules applied. Total rules applied 160 place count 32 transition count 39
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 162 place count 30 transition count 37
Iterating global reduction 4 with 2 rules applied. Total rules applied 164 place count 30 transition count 37
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 166 place count 29 transition count 36
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 168 place count 28 transition count 35
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 169 place count 28 transition count 34
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 171 place count 27 transition count 34
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 5 with 2 rules applied. Total rules applied 173 place count 27 transition count 32
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 5 with 2 Pre rules applied. Total rules applied 173 place count 27 transition count 30
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 5 with 4 rules applied. Total rules applied 177 place count 25 transition count 30
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 5 with 2 rules applied. Total rules applied 179 place count 25 transition count 28
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 5 with 2 rules applied. Total rules applied 181 place count 24 transition count 28
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 182 place count 23 transition count 27
Ensure Unique test removed 2 places
Iterating post reduction 5 with 2 rules applied. Total rules applied 184 place count 21 transition count 27
Discarding 1 places :
Symmetric choice reduction at 6 with 1 rule applications. Total rules 185 place count 20 transition count 25
Iterating global reduction 6 with 1 rules applied. Total rules applied 186 place count 20 transition count 25
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 6 with 1 rules applied. Total rules applied 187 place count 19 transition count 24
Applied a total of 187 rules in 13 ms. Remains 19 /198 variables (removed 179) and now considering 24/172 (removed 148) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 19/198 places, 24/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 0 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 24 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 31 places
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 167 transition count 172
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 45 place count 153 transition count 158
Iterating global reduction 1 with 14 rules applied. Total rules applied 59 place count 153 transition count 158
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 60 place count 153 transition count 157
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 61 place count 152 transition count 156
Iterating global reduction 2 with 1 rules applied. Total rules applied 62 place count 152 transition count 156
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 63 place count 151 transition count 155
Iterating global reduction 2 with 1 rules applied. Total rules applied 64 place count 151 transition count 155
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 65 place count 150 transition count 154
Iterating global reduction 2 with 1 rules applied. Total rules applied 66 place count 150 transition count 154
Applied a total of 66 rules in 13 ms. Remains 150 /198 variables (removed 48) and now considering 154/172 (removed 18) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 150/198 places, 154/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 154 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 31 places
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 167 transition count 172
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 47 place count 151 transition count 156
Iterating global reduction 1 with 16 rules applied. Total rules applied 63 place count 151 transition count 156
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 64 place count 151 transition count 155
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 66 place count 149 transition count 153
Iterating global reduction 2 with 2 rules applied. Total rules applied 68 place count 149 transition count 153
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 70 place count 147 transition count 151
Iterating global reduction 2 with 2 rules applied. Total rules applied 72 place count 147 transition count 151
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 74 place count 145 transition count 149
Iterating global reduction 2 with 2 rules applied. Total rules applied 76 place count 145 transition count 149
Applied a total of 76 rules in 17 ms. Remains 145 /198 variables (removed 53) and now considering 149/172 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 145/198 places, 149/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 144 are kept as prefixes of interest. Removing 54 places using SCC suffix rule.0 ms
Discarding 54 places :
Also discarding 45 output transitions
Drop transitions removed 45 transitions
Ensure Unique test removed 27 places
Reduce places removed 28 places and 1 transitions.
Drop transitions removed 64 transitions
Trivial Post-agglo rules discarded 64 transitions
Performed 64 trivial Post agglomeration. Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 65 place count 116 transition count 62
Reduce places removed 64 places and 0 transitions.
Graph (trivial) has 39 edges and 52 vertex of which 5 / 52 are part of one of the 1 SCC in 1 ms
Free SCC test removed 4 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 66 rules applied. Total rules applied 131 place count 48 transition count 61
Reduce places removed 1 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 138 place count 47 transition count 55
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 15 Pre rules applied. Total rules applied 138 place count 47 transition count 40
Deduced a syphon composed of 15 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 3 with 31 rules applied. Total rules applied 169 place count 31 transition count 40
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 171 place count 29 transition count 38
Iterating global reduction 3 with 2 rules applied. Total rules applied 173 place count 29 transition count 38
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 175 place count 28 transition count 37
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 177 place count 27 transition count 36
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 178 place count 27 transition count 35
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 180 place count 26 transition count 35
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 4 with 3 rules applied. Total rules applied 183 place count 26 transition count 32
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 3 Pre rules applied. Total rules applied 183 place count 26 transition count 29
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 4 with 6 rules applied. Total rules applied 189 place count 23 transition count 29
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 191 place count 23 transition count 27
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 193 place count 22 transition count 27
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 194 place count 21 transition count 26
Ensure Unique test removed 2 places
Iterating post reduction 4 with 2 rules applied. Total rules applied 196 place count 19 transition count 26
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 197 place count 18 transition count 24
Iterating global reduction 5 with 1 rules applied. Total rules applied 198 place count 18 transition count 24
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 199 place count 17 transition count 23
Applied a total of 199 rules in 11 ms. Remains 17 /198 variables (removed 181) and now considering 23/172 (removed 149) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 17/198 places, 23/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 146 are kept as prefixes of interest. Removing 52 places using SCC suffix rule.1 ms
Discarding 52 places :
Also discarding 45 output transitions
Drop transitions removed 45 transitions
Ensure Unique test removed 26 places
Reduce places removed 27 places and 1 transitions.
Drop transitions removed 68 transitions
Trivial Post-agglo rules discarded 68 transitions
Performed 68 trivial Post agglomeration. Transition count delta: 68
Iterating post reduction 0 with 68 rules applied. Total rules applied 69 place count 119 transition count 58
Reduce places removed 68 places and 0 transitions.
Graph (trivial) has 40 edges and 51 vertex of which 5 / 51 are part of one of the 1 SCC in 0 ms
Free SCC test removed 4 places
Iterating post reduction 1 with 69 rules applied. Total rules applied 138 place count 47 transition count 58
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 144 place count 47 transition count 52
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 12 Pre rules applied. Total rules applied 144 place count 47 transition count 40
Deduced a syphon composed of 12 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 13 places and 0 transitions.
Iterating global reduction 3 with 25 rules applied. Total rules applied 169 place count 34 transition count 40
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 171 place count 32 transition count 38
Iterating global reduction 3 with 2 rules applied. Total rules applied 173 place count 32 transition count 38
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 175 place count 31 transition count 37
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 177 place count 30 transition count 36
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 178 place count 30 transition count 35
Performed 1(complex) Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 180 place count 29 transition count 35
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 4 with 2 rules applied. Total rules applied 182 place count 29 transition count 33
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 182 place count 29 transition count 31
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 186 place count 27 transition count 31
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 4 with 1 rules applied. Total rules applied 187 place count 26 transition count 30
Ensure Unique test removed 2 places
Iterating post reduction 4 with 2 rules applied. Total rules applied 189 place count 24 transition count 30
Discarding 1 places :
Symmetric choice reduction at 5 with 1 rule applications. Total rules 190 place count 23 transition count 28
Iterating global reduction 5 with 1 rules applied. Total rules applied 191 place count 23 transition count 28
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 5 with 1 rules applied. Total rules applied 192 place count 22 transition count 27
Applied a total of 192 rules in 10 ms. Remains 22 /198 variables (removed 176) and now considering 27/172 (removed 145) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 22/198 places, 27/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 1 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 29 places
Iterating post reduction 0 with 29 rules applied. Total rules applied 29 place count 169 transition count 172
Discarding 14 places :
Symmetric choice reduction at 1 with 14 rule applications. Total rules 43 place count 155 transition count 158
Iterating global reduction 1 with 14 rules applied. Total rules applied 57 place count 155 transition count 158
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 58 place count 155 transition count 157
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 60 place count 153 transition count 155
Iterating global reduction 2 with 2 rules applied. Total rules applied 62 place count 153 transition count 155
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 64 place count 151 transition count 153
Iterating global reduction 2 with 2 rules applied. Total rules applied 66 place count 151 transition count 153
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 68 place count 149 transition count 151
Iterating global reduction 2 with 2 rules applied. Total rules applied 70 place count 149 transition count 151
Applied a total of 70 rules in 12 ms. Remains 149 /198 variables (removed 49) and now considering 151/172 (removed 21) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 149/198 places, 151/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Graph (complete) has 263 edges and 198 vertex of which 170 are kept as prefixes of interest. Removing 28 places using SCC suffix rule.0 ms
Discarding 28 places :
Also discarding 25 output transitions
Drop transitions removed 25 transitions
Ensure Unique test removed 30 places
Drop transitions removed 67 transitions
Trivial Post-agglo rules discarded 67 transitions
Performed 67 trivial Post agglomeration. Transition count delta: 67
Iterating post reduction 0 with 67 rules applied. Total rules applied 68 place count 140 transition count 80
Reduce places removed 67 places and 0 transitions.
Graph (trivial) has 41 edges and 73 vertex of which 4 / 73 are part of one of the 1 SCC in 0 ms
Free SCC test removed 3 places
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 7
Iterating post reduction 1 with 75 rules applied. Total rules applied 143 place count 70 transition count 73
Reduce places removed 7 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 11 rules applied. Total rules applied 154 place count 63 transition count 69
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 15 Pre rules applied. Total rules applied 154 place count 63 transition count 54
Deduced a syphon composed of 15 places in 0 ms
Ensure Unique test removed 2 places
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 3 with 32 rules applied. Total rules applied 186 place count 46 transition count 54
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 3 with 2 rules applied. Total rules applied 188 place count 45 transition count 53
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 189 place count 44 transition count 53
Discarding 2 places :
Symmetric choice reduction at 5 with 2 rule applications. Total rules 191 place count 42 transition count 51
Iterating global reduction 5 with 2 rules applied. Total rules applied 193 place count 42 transition count 51
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 5 with 8 rules applied. Total rules applied 201 place count 38 transition count 47
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 202 place count 38 transition count 46
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 6 with 3 rules applied. Total rules applied 205 place count 38 transition count 43
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 205 place count 38 transition count 42
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 6 with 2 rules applied. Total rules applied 207 place count 37 transition count 42
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 208 place count 37 transition count 42
Applied a total of 208 rules in 9 ms. Remains 37 /198 variables (removed 161) and now considering 42/172 (removed 130) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 37/198 places, 42/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 2 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 32 places
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 166 transition count 172
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 48 place count 150 transition count 156
Iterating global reduction 1 with 16 rules applied. Total rules applied 64 place count 150 transition count 156
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 65 place count 150 transition count 155
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 67 place count 148 transition count 153
Iterating global reduction 2 with 2 rules applied. Total rules applied 69 place count 148 transition count 153
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 71 place count 146 transition count 151
Iterating global reduction 2 with 2 rules applied. Total rules applied 73 place count 146 transition count 151
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 75 place count 144 transition count 149
Iterating global reduction 2 with 2 rules applied. Total rules applied 77 place count 144 transition count 149
Applied a total of 77 rules in 13 ms. Remains 144 /198 variables (removed 54) and now considering 149/172 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 144/198 places, 149/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 6 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 172/172 transitions.
Ensure Unique test removed 31 places
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 167 transition count 172
Discarding 13 places :
Symmetric choice reduction at 1 with 13 rule applications. Total rules 44 place count 154 transition count 159
Iterating global reduction 1 with 13 rules applied. Total rules applied 57 place count 154 transition count 159
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 59 place count 152 transition count 157
Iterating global reduction 1 with 2 rules applied. Total rules applied 61 place count 152 transition count 157
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 63 place count 150 transition count 155
Iterating global reduction 1 with 2 rules applied. Total rules applied 65 place count 150 transition count 155
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 67 place count 148 transition count 153
Iterating global reduction 1 with 2 rules applied. Total rules applied 69 place count 148 transition count 153
Applied a total of 69 rules in 11 ms. Remains 148 /198 variables (removed 50) and now considering 153/172 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 148/198 places, 153/172 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 5 ms
[2023-03-21 21:34:18] [INFO ] Input system was already deterministic with 153 transitions.
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 7 ms
[2023-03-21 21:34:18] [INFO ] Flatten gal took : 7 ms
[2023-03-21 21:34:18] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-21 21:34:18] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 198 places, 172 transitions and 430 arcs took 1 ms.
Total runtime 2551 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT IBMB2S565S3960-PT-none
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/365
CTLFireability

FORMULA IBMB2S565S3960-PT-none-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA IBMB2S565S3960-PT-none-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679434615057

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/365/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/365/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/365/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 10 (type EXCL) for 3 IBMB2S565S3960-PT-none-CTLFireability-01
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 10 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-01
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 65 (type EXCL) for 60 IBMB2S565S3960-PT-none-CTLFireability-12
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 84 (type FNDP) for 18 IBMB2S565S3960-PT-none-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type EQUN) for 18 IBMB2S565S3960-PT-none-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 91 (type SRCH) for 18 IBMB2S565S3960-PT-none-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 84 (type FNDP) for IBMB2S565S3960-PT-none-CTLFireability-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
sara: try reading problem file /home/mcc/execution/365/CTLFireability-85.sara.
lola: CANCELED task # 85 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-02 (obsolete)
lola: CANCELED task # 91 (type SRCH) for IBMB2S565S3960-PT-none-CTLFireability-02 (obsolete)
lola: LAUNCH task # 87 (type FNDP) for 57 IBMB2S565S3960-PT-none-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 57 IBMB2S565S3960-PT-none-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 92 (type SRCH) for 57 IBMB2S565S3960-PT-none-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 65 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-12
lola: result : true
lola: markings : 324
lola: fired transitions : 324
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808

sara: try reading problem file /home/mcc/execution/365/CTLFireability-89.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 45 (type EXCL) for 44 IBMB2S565S3960-PT-none-CTLFireability-08
lola: time limit : 180 sec
lola: memory limit: 32 pages

lola: FINISHED task # 87 (type FNDP) for IBMB2S565S3960-PT-none-CTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 92 (type SRCH) for IBMB2S565S3960-PT-none-CTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 89 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-11 (obsolete)
lola: FINISHED task # 85 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-02
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 93 (type FNDP) for 28 IBMB2S565S3960-PT-none-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 28 IBMB2S565S3960-PT-none-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SRCH) for 28 IBMB2S565S3960-PT-none-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 97 (type SRCH) for IBMB2S565S3960-PT-none-CTLFireability-04
lola: result : unknown
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 101 (type FNDP) for 75 IBMB2S565S3960-PT-none-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 93 (type FNDP) for IBMB2S565S3960-PT-none-CTLFireability-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 45 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-08
lola: result : false
lola: markings : 2218
lola: fired transitions : 3478
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 101 (type FNDP) for IBMB2S565S3960-PT-none-CTLFireability-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 94 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-04 (obsolete)
lola: LAUNCH task # 82 (type EXCL) for 81 IBMB2S565S3960-PT-none-CTLFireability-15
lola: time limit : 225 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/365/CTLFireability-94.sara.

lola: FINISHED task # 94 (type EQUN) for IBMB2S565S3960-PT-none-CTLFireability-04
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ 0 3 0 0 5 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ 0 1 0 0 5 0 0 1
IBMB2S565S3960-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-07: EU 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ 0 2 0 0 5 0 0 4
IBMB2S565S3960-PT-none-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
82 CTL EXCL 5/225 4/32 IBMB2S565S3960-PT-none-CTLFireability-15 656843 m, 131368 m/sec, 3533935 t fired, .

Time elapsed: 5 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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82 CTL EXCL 10/225 6/32 IBMB2S565S3960-PT-none-CTLFireability-15 1202743 m, 109180 m/sec, 7043309 t fired, .

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82 CTL EXCL 15/225 9/32 IBMB2S565S3960-PT-none-CTLFireability-15 1809189 m, 121289 m/sec, 10298087 t fired, .

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82 CTL EXCL 20/225 11/32 IBMB2S565S3960-PT-none-CTLFireability-15 2316557 m, 101473 m/sec, 13582155 t fired, .

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82 CTL EXCL 25/225 14/32 IBMB2S565S3960-PT-none-CTLFireability-15 2787735 m, 94235 m/sec, 16904350 t fired, .

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79 CTL EXCL 5/235 4/32 IBMB2S565S3960-PT-none-CTLFireability-14 836544 m, 167308 m/sec, 3615131 t fired, .

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79 CTL EXCL 10/235 7/32 IBMB2S565S3960-PT-none-CTLFireability-14 1303011 m, 93293 m/sec, 7008813 t fired, .

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79 CTL EXCL 15/235 9/32 IBMB2S565S3960-PT-none-CTLFireability-14 1775393 m, 94476 m/sec, 10355747 t fired, .

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79 CTL EXCL 20/235 11/32 IBMB2S565S3960-PT-none-CTLFireability-14 2257548 m, 96431 m/sec, 13598758 t fired, .

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79 CTL EXCL 25/235 13/32 IBMB2S565S3960-PT-none-CTLFireability-14 2670875 m, 82665 m/sec, 16817235 t fired, .

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79 CTL EXCL 30/235 15/32 IBMB2S565S3960-PT-none-CTLFireability-14 3050398 m, 75904 m/sec, 19993150 t fired, .

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79 CTL EXCL 35/235 17/32 IBMB2S565S3960-PT-none-CTLFireability-14 3471467 m, 84213 m/sec, 23129242 t fired, .

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79 CTL EXCL 40/235 19/32 IBMB2S565S3960-PT-none-CTLFireability-14 3894211 m, 84548 m/sec, 26246458 t fired, .

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79 CTL EXCL 45/235 20/32 IBMB2S565S3960-PT-none-CTLFireability-14 4273921 m, 75942 m/sec, 29227726 t fired, .

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79 CTL EXCL 50/235 22/32 IBMB2S565S3960-PT-none-CTLFireability-14 4642979 m, 73811 m/sec, 32175122 t fired, .

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79 CTL EXCL 55/235 24/32 IBMB2S565S3960-PT-none-CTLFireability-14 5070025 m, 85409 m/sec, 35347774 t fired, .

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79 CTL EXCL 60/235 26/32 IBMB2S565S3960-PT-none-CTLFireability-14 5497342 m, 85463 m/sec, 38474095 t fired, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 CTL EXCL 65/235 27/32 IBMB2S565S3960-PT-none-CTLFireability-14 5890304 m, 78592 m/sec, 41528756 t fired, .

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IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ 0 3 0 0 5 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ 0 1 0 0 5 0 0 1
IBMB2S565S3960-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-07: EU 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ 0 2 0 0 5 0 0 4
IBMB2S565S3960-PT-none-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 CTL EXCL 70/235 29/32 IBMB2S565S3960-PT-none-CTLFireability-14 6289123 m, 79763 m/sec, 44669683 t fired, .

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IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ 0 3 0 0 5 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ 0 1 0 0 5 0 0 1
IBMB2S565S3960-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-07: EU 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ 0 2 0 0 5 0 0 4
IBMB2S565S3960-PT-none-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 CTL EXCL 75/235 31/32 IBMB2S565S3960-PT-none-CTLFireability-14 6643459 m, 70867 m/sec, 47691563 t fired, .

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IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ 0 3 0 0 5 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ 0 1 0 0 5 0 0 1
IBMB2S565S3960-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-07: EU 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ 0 2 0 0 5 0 0 4
IBMB2S565S3960-PT-none-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
79 CTL EXCL 80/235 32/32 IBMB2S565S3960-PT-none-CTLFireability-14 7011564 m, 73621 m/sec, 50540855 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
IBMB2S565S3960-PT-none-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ 0 3 0 0 5 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ 0 1 0 0 5 0 0 1
IBMB2S565S3960-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-07: EU 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ 0 2 0 0 5 0 0 4
IBMB2S565S3960-PT-none-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
IBMB2S565S3960-PT-none-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 71 (type EXCL) for 60 IBMB2S565S3960-PT-none-CTLFireability-12
lola: time limit : 246 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-12
lola: result : true
lola: markings : 1448
lola: fired transitions : 1781
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 47 IBMB2S565S3960-PT-none-CTLFireability-09
lola: time limit : 287 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-09
lola: result : true
lola: markings : 323
lola: fired transitions : 322
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 IBMB2S565S3960-PT-none-CTLFireability-06
lola: time limit : 313 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-06
lola: result : true
lola: markings : 350
lola: fired transitions : 354
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 IBMB2S565S3960-PT-none-CTLFireability-05
lola: time limit : 344 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-05
lola: result : true
lola: markings : 219
lola: fired transitions : 218
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 IBMB2S565S3960-PT-none-CTLFireability-03
lola: time limit : 382 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-03
lola: result : false
lola: markings : 4789
lola: fired transitions : 6082
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 3 IBMB2S565S3960-PT-none-CTLFireability-01
lola: time limit : 430 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-01
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 3 IBMB2S565S3960-PT-none-CTLFireability-01
lola: time limit : 492 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-01
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 IBMB2S565S3960-PT-none-CTLFireability-01
lola: time limit : 574 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-01
lola: result : false
lola: markings : 322
lola: fired transitions : 322
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 47 IBMB2S565S3960-PT-none-CTLFireability-09
lola: time limit : 689 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-09
lola: result : true
lola: markings : 17
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 IBMB2S565S3960-PT-none-CTLFireability-07
lola: time limit : 861 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-07
lola: result : true
lola: markings : 63698
lola: fired transitions : 421032
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 IBMB2S565S3960-PT-none-CTLFireability-10
lola: time limit : 1148 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-10
lola: result : false
lola: markings : 889
lola: fired transitions : 1140
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 28 IBMB2S565S3960-PT-none-CTLFireability-04
lola: time limit : 1722 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-04
lola: result : true
lola: markings : 98
lola: fired transitions : 258
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 IBMB2S565S3960-PT-none-CTLFireability-00
lola: time limit : 3444 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for IBMB2S565S3960-PT-none-CTLFireability-00
lola: result : true
lola: markings : 126
lola: fired transitions : 320
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
IBMB2S565S3960-PT-none-CTLFireability-00: CTL true CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-01: CONJ false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-02: DISJ true findpath
IBMB2S565S3960-PT-none-CTLFireability-03: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-04: CONJ true CONJ
IBMB2S565S3960-PT-none-CTLFireability-05: CTL true CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-06: CTL true CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-07: EU true state space /EU
IBMB2S565S3960-PT-none-CTLFireability-08: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-09: CONJ true CONJ
IBMB2S565S3960-PT-none-CTLFireability-10: CTL false CTL model checker
IBMB2S565S3960-PT-none-CTLFireability-11: AG false findpath
IBMB2S565S3960-PT-none-CTLFireability-12: CONJ true CONJ
IBMB2S565S3960-PT-none-CTLFireability-13: EF true findpath
IBMB2S565S3960-PT-none-CTLFireability-14: CTL unknown AGGR
IBMB2S565S3960-PT-none-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="IBMB2S565S3960-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is IBMB2S565S3960-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415600098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/IBMB2S565S3960-PT-none.tgz
mv IBMB2S565S3960-PT-none execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;