fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r231-tall-167856415500050
Last Updated
May 14, 2023

About the Execution of LoLa+red for HypertorusGrid-PT-d3k3p2b06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
0.000 200480.00 0.00 0.00 ??F??????????TF? normal

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415500050.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HypertorusGrid-PT-d3k3p2b06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415500050
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 984K
-rw-r--r-- 1 mcc users 8.2K Feb 26 11:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 26 11:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 26 11:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 11:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 26 11:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 26 11:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K Feb 26 11:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rwxr-xr-x 1 mcc users 522K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-00
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-01
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-02
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-03
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-04
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-05
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-06
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-07
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-08
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-09
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-10
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-11
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-12
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-13
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-14
FORMULA_NAME HypertorusGrid-PT-d3k3p2b06-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679429306876

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HypertorusGrid-PT-d3k3p2b06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 20:08:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 20:08:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 20:08:28] [INFO ] Load time of PNML (sax parser for PT used): 94 ms
[2023-03-21 20:08:28] [INFO ] Transformed 513 places.
[2023-03-21 20:08:28] [INFO ] Transformed 972 transitions.
[2023-03-21 20:08:28] [INFO ] Parsed PT model containing 513 places and 972 transitions and 3888 arcs in 159 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Support contains 156 out of 513 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 49 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
// Phase 1: matrix 972 rows 513 cols
[2023-03-21 20:08:28] [INFO ] Computed 190 place invariants in 48 ms
[2023-03-21 20:08:29] [INFO ] Implicit Places using invariants in 567 ms returned []
[2023-03-21 20:08:29] [INFO ] Invariant cache hit.
[2023-03-21 20:08:29] [INFO ] Implicit Places using invariants and state equation in 471 ms returned []
Implicit Place search using SMT with State Equation took 1063 ms to find 0 implicit places.
[2023-03-21 20:08:29] [INFO ] Invariant cache hit.
[2023-03-21 20:08:29] [INFO ] Dead Transitions using invariants and state equation in 350 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1469 ms. Remains : 513/513 places, 972/972 transitions.
Support contains 156 out of 513 places after structural reductions.
[2023-03-21 20:08:30] [INFO ] Flatten gal took : 101 ms
[2023-03-21 20:08:30] [INFO ] Flatten gal took : 63 ms
[2023-03-21 20:08:30] [INFO ] Input system was already deterministic with 972 transitions.
Support contains 152 out of 513 places (down from 156) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 450 ms. (steps per millisecond=22 ) properties (out of 79) seen :78
Finished Best-First random walk after 501 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=83 )
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 47 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 44 ms
[2023-03-21 20:08:31] [INFO ] Input system was already deterministic with 972 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 15 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 31 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 30 ms
[2023-03-21 20:08:31] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 12 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 27 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 29 ms
[2023-03-21 20:08:31] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 10 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 27 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 28 ms
[2023-03-21 20:08:31] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 24 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 28 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 29 ms
[2023-03-21 20:08:31] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 21 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 26 ms
[2023-03-21 20:08:31] [INFO ] Flatten gal took : 28 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 20 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 27 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 5 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 23 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 6 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 27 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 5 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 22 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 14 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 23 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 13 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 22 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 12 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 22 ms
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:32] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 12 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:32] [INFO ] Flatten gal took : 23 ms
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:33] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 5 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 22 ms
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:33] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 5 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:33] [INFO ] Input system was already deterministic with 972 transitions.
Starting structural reductions in LTL mode, iteration 0 : 513/513 places, 972/972 transitions.
Applied a total of 0 rules in 5 ms. Remains 513 /513 variables (removed 0) and now considering 972/972 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 513/513 places, 972/972 transitions.
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 21 ms
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 24 ms
[2023-03-21 20:08:33] [INFO ] Input system was already deterministic with 972 transitions.
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:33] [INFO ] Flatten gal took : 25 ms
[2023-03-21 20:08:33] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-21 20:08:33] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 513 places, 972 transitions and 3888 arcs took 5 ms.
Total runtime 5219 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HypertorusGrid-PT-d3k3p2b06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA HypertorusGrid-PT-d3k3p2b06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d3k3p2b06-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d3k3p2b06-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679429507356

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
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33 CTL EXCL 5/199 7/32 HypertorusGrid-PT-d3k3p2b06-CTLFireability-08 754848 m, 150969 m/sec, 960069 t fired, .

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33 CTL EXCL 10/199 15/32 HypertorusGrid-PT-d3k3p2b06-CTLFireability-08 1637956 m, 176621 m/sec, 2083344 t fired, .

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33 CTL EXCL 20/199 31/32 HypertorusGrid-PT-d3k3p2b06-CTLFireability-08 3432577 m, 180278 m/sec, 4366011 t fired, .

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54 CTL EXCL 5/210 15/32 HypertorusGrid-PT-d3k3p2b06-CTLFireability-15 1417673 m, 283534 m/sec, 1430273 t fired, .

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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 462 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d3k3p2b06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HypertorusGrid-PT-d3k3p2b06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415500050"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d3k3p2b06.tgz
mv HypertorusGrid-PT-d3k3p2b06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;