Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r231-tall-167856415500042.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is HypertorusGrid-PT-d2k3p2b04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r231-tall-167856415500042
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 7.9K Feb 26 11:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 26 11:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 10:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 26 10:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:17 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:17 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 11:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 11:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Feb 26 11:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 132K Feb 26 11:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rwxr-xr-x 1 mcc users 79K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-00
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-02
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-03
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-04
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-05
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-06
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-07
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-08
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-09
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-10
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-11
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-12
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-13
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-14
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679428832904

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=HypertorusGrid-PT-d2k3p2b04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-21 20:00:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-21 20:00:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 20:00:34] [INFO ] Load time of PNML (sax parser for PT used): 40 ms
[2023-03-21 20:00:34] [INFO ] Transformed 117 places.
[2023-03-21 20:00:34] [INFO ] Transformed 144 transitions.
[2023-03-21 20:00:34] [INFO ] Parsed PT model containing 117 places and 144 transitions and 576 arcs in 95 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 79 out of 117 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 11 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
// Phase 1: matrix 144 rows 117 cols
[2023-03-21 20:00:34] [INFO ] Computed 46 place invariants in 22 ms
[2023-03-21 20:00:34] [INFO ] Implicit Places using invariants in 230 ms returned []
[2023-03-21 20:00:34] [INFO ] Invariant cache hit.
[2023-03-21 20:00:34] [INFO ] Implicit Places using invariants and state equation in 109 ms returned []
Implicit Place search using SMT with State Equation took 362 ms to find 0 implicit places.
[2023-03-21 20:00:34] [INFO ] Invariant cache hit.
[2023-03-21 20:00:34] [INFO ] Dead Transitions using invariants and state equation in 82 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 457 ms. Remains : 117/117 places, 144/144 transitions.
Support contains 79 out of 117 places after structural reductions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 32 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 14 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Support contains 78 out of 117 places (down from 79) after GAL structural reductions.
Finished random walk after 173 steps, including 0 resets, run visited all 50 properties in 42 ms. (steps per millisecond=4 )
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 11 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 4 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 8 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 8 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 10 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 8 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 9 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 7 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 12 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 3 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 7 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 7 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 5 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 4 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 1 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 4 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 4 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 117/117 places, 144/144 transitions.
Applied a total of 0 rules in 2 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 117/117 places, 144/144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 5 ms
[2023-03-21 20:00:35] [INFO ] Input system was already deterministic with 144 transitions.
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:35] [INFO ] Flatten gal took : 6 ms
[2023-03-21 20:00:36] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-21 20:00:36] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 117 places, 144 transitions and 576 arcs took 1 ms.
Total runtime 1793 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT HypertorusGrid-PT-d2k3p2b04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA HypertorusGrid-PT-d2k3p2b04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679429073160

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 79 (type EXCL) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 99 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 79 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : true
lola: markings : 87
lola: fired transitions : 87
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 31 (type EXCL) for 30 HypertorusGrid-PT-d2k3p2b04-CTLFireability-02
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 31 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-02
lola: result : true
lola: markings : 77
lola: fired transitions : 137
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 80 (type EXCL) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 77 (type FNDP) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type EQUN) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SRCH) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type SRCH) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 77 (type FNDP) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 78 (type EQUN) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01 (obsolete)
lola: CANCELED task # 80 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01 (obsolete)
lola: FINISHED task # 80 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 78 (type EQUN) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 62 (type EXCL) for 57 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 68 (type EXCL) for 67 HypertorusGrid-PT-d2k3p2b04-CTLFireability-13
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EFAGEF EXCL 5/224 8/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-13 1842294 m, 368458 m/sec, 4145176 t fired, .

Time elapsed: 6 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EFAGEF EXCL 10/224 15/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-13 3574694 m, 346480 m/sec, 8085917 t fired, .

Time elapsed: 11 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EFAGEF EXCL 15/224 22/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-13 5237768 m, 332614 m/sec, 11840596 t fired, .

Time elapsed: 16 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EFAGEF EXCL 20/224 30/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-13 7209450 m, 394336 m/sec, 15898533 t fired, .

Time elapsed: 21 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 68 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 74 (type EXCL) for 73 HypertorusGrid-PT-d2k3p2b04-CTLFireability-15
lola: time limit : 238 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 CTL EXCL 5/238 8/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-15 1695413 m, 339082 m/sec, 4216699 t fired, .

Time elapsed: 31 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 CTL EXCL 10/238 16/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-15 3288914 m, 318700 m/sec, 8211048 t fired, .

Time elapsed: 36 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 CTL EXCL 15/238 23/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-15 4842257 m, 310668 m/sec, 12115704 t fired, .

Time elapsed: 41 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 CTL EXCL 20/238 30/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-15 6407195 m, 312987 m/sec, 16045216 t fired, .

Time elapsed: 46 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 74 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 51 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 65 (type EXCL) for 64 HypertorusGrid-PT-d2k3p2b04-CTLFireability-12
lola: time limit : 253 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-12
lola: result : false
lola: markings : 695
lola: fired transitions : 724
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 HypertorusGrid-PT-d2k3p2b04-CTLFireability-10
lola: time limit : 273 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 5/273 14/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-10 3034298 m, 606859 m/sec, 3843411 t fired, .

Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 10/273 25/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-10 5429547 m, 479049 m/sec, 7550382 t fired, .

Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 55 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 52 (type EXCL) for 51 HypertorusGrid-PT-d2k3p2b04-CTLFireability-09
lola: time limit : 294 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-09
lola: result : true
lola: markings : 149
lola: fired transitions : 245
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 HypertorusGrid-PT-d2k3p2b04-CTLFireability-08
lola: time limit : 321 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-08
lola: result : true
lola: markings : 53
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 HypertorusGrid-PT-d2k3p2b04-CTLFireability-05
lola: time limit : 353 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-05
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04
lola: time limit : 392 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/392 5/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 1029803 m, 205960 m/sec, 2286516 t fired, .

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/392 9/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 1972906 m, 188620 m/sec, 4444133 t fired, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 15/392 13/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 2866687 m, 178756 m/sec, 6536274 t fired, .

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 20/392 17/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 3750711 m, 176804 m/sec, 8571485 t fired, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 25/392 21/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 4655294 m, 180916 m/sec, 10596774 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 30/392 25/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 5531371 m, 175215 m/sec, 12624821 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 35/392 29/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 6395063 m, 172738 m/sec, 14564858 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ 0 2 0 0 12 0 0 6
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 14 (type EXCL) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 436 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : false
lola: markings : 637
lola: fired transitions : 1889
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 3 HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: time limit : 499 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-01
lola: result : true
lola: markings : 69
lola: fired transitions : 70
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00
lola: time limit : 582 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/582 7/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 1436919 m, 287383 m/sec, 3256481 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/582 13/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 2748494 m, 262315 m/sec, 6247500 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/582 18/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 3966378 m, 243576 m/sec, 9068008 t fired, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/582 24/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 5171791 m, 241082 m/sec, 11773297 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/582 29/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 6298828 m, 225407 m/sec, 14340243 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 86 (type EXCL) for 42 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06
lola: time limit : 692 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 AGEF EXCL 5/692 9/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 1990784 m, 398156 m/sec, 4393982 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 AGEF EXCL 10/692 15/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 3592628 m, 320368 m/sec, 8227887 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 AGEF EXCL 15/692 22/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 5275288 m, 336532 m/sec, 12052626 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 AGEF EXCL 20/692 26/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 6342685 m, 213479 m/sec, 14521536 t fired, .

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
86 AGEF EXCL 25/692 32/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 7650055 m, 261474 m/sec, 17454187 t fired, .

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 86 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07
lola: time limit : 858 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 5/858 5/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 1145865 m, 229173 m/sec, 2669936 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 10/858 10/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 2392991 m, 249425 m/sec, 5127711 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 15/858 13/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 3090114 m, 139424 m/sec, 7496256 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 20/858 17/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 4030190 m, 188015 m/sec, 10495350 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 25/858 21/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 5277984 m, 249558 m/sec, 12965257 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 30/858 24/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 6003344 m, 145072 m/sec, 15148771 t fired, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 35/858 27/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 6747591 m, 148849 m/sec, 17699410 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 1 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 EFAGEF EXCL 40/858 32/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 7970050 m, 244491 m/sec, 19991028 t fired, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 46 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 1 0 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 34 (type EXCL) for 33 HypertorusGrid-PT-d2k3p2b04-CTLFireability-03
lola: time limit : 1129 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-03
lola: result : false
lola: markings : 65
lola: fired transitions : 68
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 71 (type EXCL) for 70 HypertorusGrid-PT-d2k3p2b04-CTLFireability-14
lola: time limit : 1694 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-14
lola: result : false
lola: markings : 161
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 57 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11
lola: time limit : 3389 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 0 1 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 CTL EXCL 5/3389 9/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11 1760414 m, 352082 m/sec, 2949742 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 0 1 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 CTL EXCL 10/3389 14/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11 3029347 m, 253786 m/sec, 4797793 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 0 1 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 CTL EXCL 15/3389 23/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11 4913276 m, 376785 m/sec, 7551345 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 0 1 0 3 0 0 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 CTL EXCL 20/3389 30/32 HypertorusGrid-PT-d2k3p2b04-CTLFireability-11 6565122 m, 330369 m/sec, 9973388 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 60 (type EXCL) for HypertorusGrid-PT-d2k3p2b04-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ 0 0 0 0 3 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF 0 0 0 0 1 0 1 0
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
HypertorusGrid-PT-d2k3p2b04-CTLFireability-00: CTL unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-01: DISJ true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-02: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-03: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-04: CTL unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-05: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-06: EFAG unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-07: EFAGEF unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-08: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-09: CTL true CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-10: CTL unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-11: DISJ unknown DISJ
HypertorusGrid-PT-d2k3p2b04-CTLFireability-12: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-13: EFAGEF unknown AGGR
HypertorusGrid-PT-d2k3p2b04-CTLFireability-14: CTL false CTL model checker
HypertorusGrid-PT-d2k3p2b04-CTLFireability-15: CTL unknown AGGR


Time elapsed: 236 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d2k3p2b04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is HypertorusGrid-PT-d2k3p2b04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r231-tall-167856415500042"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d2k3p2b04.tgz
mv HypertorusGrid-PT-d2k3p2b04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;